Capacitive Divider Research Articles

Effects and optimizations of image charge technology on the imaging performance of capacitive division image readout MCP detectors

A finite element model is proposed to investigate the impact of image charge technology on the imaging performance of capacitive division image readout (C-DIR) devices. Through detailed simulation analysis, we explore the charge density of the induction layer and each electrode layer in the multilayer capacitive anode. The position nonlinearity is calculated for various resistances per square of the induction layer and substrate thicknesses. The simulation results indicate a strong linear correlation between the position nonlinearity and substrate thickness, and an exponential decay relationship with the logarithmic resistance per square of the induction layer. The C-DIR detector is experimentally tested for imaging nonlinearity and counting rate, with the resistance per square of the induction layer ranging from 0.005 to 1000 MΩ, and the substrate thickness ranging from 1 to 5 mm. The experimental results validate the simulation conclusions and reveal the impact of the “charge accumulation effect” and “shielding effect” on the imaging performance of the detector, as well as the “imaging compression” phenomenon. Optimized image charge readout technology enables the C-DIR detector to achieve an imaging nonlinearity of 1.53% in the experiment.

Research on Fixed-Slope On-Chip Soft-Start Method Applied to Buck DC–DC Converter

A fixed-slope soft-start method applicable to Buck converters for on-chip integration is proposed to address the issue of varying power stresses (device voltage, current stress) during start-up with different output voltages. The main mechanism involves combining feedback coefficient sampling with a fixed-slope reference voltage to achieve a slow rise in the reference voltage by equating the soft-start charging current to a pulse current through the on-chip integration of a small capacitor. This allows for fixed-slope start-ups for different set output voltages. Spike elimination techniques are employed to address charging current spikes caused by pulse periods, enhancing precise control over the soft-start time. By replacing the traditional resistor divider network with a capacitive divider network in the soft-start method, DC power consumption is minimized. Upon completion of the soft start, a smooth transition to a steady-state operation occurs, with the automatic shutdown of the soft-start module reducing static power consumption. A specific circuit design and layout verification based on 0.18 μm high-voltage BCD technology demonstrates that the proposed method maintains a fixed-slope start-up of approximately 5 mV/μs within the chip’s output range of 0.9 V to 4 V, with a slope control accuracy of up to 98%. The soft-start circuit effectively eliminates surge currents generated during start-up under full load conditions of 3 A and no-load conditions of 0 A, reducing the overall surge current by 44% and enabling a stable voltage rise and the smooth transition to a steady-state operation.

Characterization and Design of a PLC Coupling System Based on Capacitive Divider Embedded in MV Cable Head

Characterization and Design of a PLC Coupling System Based on Capacitive Divider Embedded in MV Cable Head

Analysis and modeling of the influence of gate leakage current on threshold voltage and subthreshold swing in p-GaN gate AlGaN/GaN high electron mobility transistors

In this paper, the p-GaN gate AlGaN/GaN high electron mobility transistors (HEMTs) with varying combinations of gate metal work function and gate geometry are fabricated and investigate the influence of gate leakage current (IGS) on the threshold voltage (VTH) and subthreshold swing (SS). The unique dependence of VTH and SS on gate geometry for different metals is observed, which is different from traditional field-effect transistors. A novel hybrid physics model, consisting of the traditional capacitance divider model and hole injection model, is proposed to explain this phenomenon, and the results exhibit an excellent agreement with the experimental data. The holes traverse the gate/p-GaN Schottky barrier by thermal emission or tunneling and inject into the p-GaN layer, generating the IGS. Expanding upon the traditional capacitance divider model, a portion of the injected holes accumulate at the p-GaN/AlGaN interface and induce the corresponding electrons at the AlGaN/GaN heterojunction, which promotes channel conduction. Hence, the transfer curves display the correlation between IGS and VTH as well as SS. The results show that high IGS can alleviate the instability of VTH caused by the lithographic overlay error, and simultaneously optimize SS. This work offers a novel perspective for examining the turn-on mechanism of p-GaN HEMTs, thereby contributing to device design.

Capacitive Sensor for Monitoring the Condition of Suspended High-Voltage Insulation

The purpose of the work is to develop the design of a sensor for monitoring the condition of high-voltage power lines suspended insulation. To achieve this goal, a diagnostic criterion was selected, the operating principle and design of the insulation monitoring sensor were determined. As a diagnostic criterion is considered a changing of voltage on the insulator plate due to a change in the distribution of electrical potential on the insulators, caused of damage in the insulators string. For the diagnostic system implementation was adopted a sensor based on a capacitive divider. The calculations confirm the pos-sibility of registration a damaged element in a insulators string by getting of voltage change at the sen-sors output. The calculation results were verified by modeling in the Multisim software. The parameters of the sensor were calculated, correctness of it is confirmed by the results of laboratory measurements of the new insulators plate capacitances, as well as insulators destroyed as a result of operation. The most important results of the research are the selection of the optimal diagnostic criterion and research-ing of the proposed design sensor effectiveness for assessing the suspended insulation condition. The significance of the results obtained lies in the fact that the developed design of a sensor allows one to obtain prompt information about the presence of damage in the insulation. The use of the proposed sensor design will make possible creation a continuous diagnostic system and identify damage at an early stage, which will ensure timely maintenance.

The Design, Fabrication, and Evaluation of a Phase-Resolved Partial Discharge Sensor Embedded in a MV-Class Bushing.

This paper proposes a novel phase-resolved partial discharge (PRPD) sensor embedded in a MV-class bushing for high-accuracy insulation analysis. The design, fabrication, and evaluation of a PRPD sensor embedded in a MV-class bushing aimed to achieve the detection of partial discharge (PD) pulses that are phase-synchronized with the applied primary HV signal. A prototype PRPD sensor was composed of a flexible printed circuit board (PCB) with dual-sensing electrodes, utilizing a capacitive voltage divider (CVD) for voltage measurement, the D-dot principle for PD detection, and a signal transducer with passive elements. A PD simulator was prepared to emulate typical PD defects, i.e., a metal protrusion. The voltage measurement precision of the prototype PRPD sensor was satisfied with the accuracy class of 0.2 specified in IEC 61869-11, as the maximum corrected voltage error ratios and corrected phase errors in 80%, 100%, and 120% of the rated voltage (13.2 kilovolts (kV)) were less than 0.2% and 10 min, respectively. In addition, the prototype PRPD sensor had good linearity and high sensitivity for PD detection compared with a conventional electrical detection method. According to performance evaluation tests, the prototype PRPD sensor embedded in the MV-class bushing can measure PRPD patterns phase-synchronized with the primary voltage without any additional synchronization equipment or system. Therefore, the prototype PRPD sensor holds potential as a substitute for conventional commercial PD sensors. Consequently, this advancement could lead to the enhancement of power system monitoring and maintenance, contributing to the digitalization and minimization of power apparatus.

The Concentrator for Single-Phase Inverters with Three-Phase Output Using Magnetically Coupled Reactors

This paper presents a passive concentrator for single-phase inverters with a three-phase output, which uses magnetically coupled reactors. Due to the development of renewable energy systems, the proposed systems may enable the easier integration of converters in the form of inverters with the power system. Two variants of cooperation of the concentrator with single-phase voltage inverters were considered. The first variant proposed a system topology in which three single-phase full-bridge inverters were connected to the concentrator, while the other variant proposed six half-bridge inverters. A control system of the inverters that does not use PWM was developed. A common star point was created for the supply voltages in the form of a capacitive divider covering all the inverters. An analysis of the concentrator system was presented, taking into account the cooperation with inverters. The overall power of the TDSλ system was defined and the relationship for its determination was given. Simulation studies were described, presenting the obtained voltage and current waveforms. The impact of changing the supply voltage of the inverters on the operation of the concentrator and the shape of the output voltages was assessed. The proposed systems allow you to connect 3 or 6 single-phase inverters. The use of magnetically coupled reactors enables the use of a magnetic system of lower power and size. The described concentrators enable the generation of multi-level three-phase output voltage with a low THD content.

A method for tracing impulse voltage peak value using weighted frequency components

This paper studies a method for synthesizing impulse voltage peak error based on frequency energy weight. The research designed three capacitive voltage dividers with a voltage rating of 1 kV, 10 kV, and 200 kV, respectively, and measured their response characteristics using the step wave response test. The scale factor and linearity of the 1 kV capacitor divider were measured at different frequencies and impulse voltages to verify the equivalence of voltage coefficients under power frequency and impulse. Using boundary conditions obtained from AC voltage standard sources and impulse voltage standard generators, the equivalence of 200 kV power frequency voltage coefficient and impulse voltage coefficient was derived.

A Five-Level Transformer-Less Grid-Tied Inverter Structure With Capacitive Voltage Divider Concept With Leakage Current Elimination

This paper presents a novel single-phase inverter with six switches and five levels that shares a common ground and does not require a transformer. The proposed inverter is intended for use in photovoltaic systems that are connected to the grid. The proposed inverter is derived from the concept of a capacitive voltage divider (CVD) circuit, so that, the leakage current will be eliminated. The CVD circuit produces three levels of output voltages in the proposed inverter. The proposed novel inverter has several significant advantages, such as the elimination of leakage current without the need for additional components, the ability to transfer reactive power fully, and the use of fewer components compared to current five-level transformer-less inverters. Additionally, the voltage stress is evenly distributed across power switches, resulting in higher efficiency. Furthermore, the inverter is designed to automatically balance voltage in capacitors without requiring an additional control system. The proposed inverter achieves these advantages using a suitable switching scheme. The paper also includes an explanation of the proposed circuit, the process for designing minimum capacitors, theoretical loss calculation, and a comparison of features with similar topologies todemonstrate the efficiency of the proposedinverter. Inaddition, a 1 kVA experimental prototype is constructed to showcase the effectiveness of the proposed inverter.

A Compact and Efficient Boost Converter in a 28 nm CMOS with 90 mV Self-Startup and Maximum Output Voltage Tracking ZCS for Thermoelectric Energy Harvesting.

There are increasing demands for the Internet of Things (IoT), wearable electronics, and medical implants. Wearable devices provide various important daily applications by monitoring real-life human activities. They demand low-cost autonomous operation in a miniaturized form factor, which is challenging to realize using a rechargeable battery. One promising energy source is thermoelectric generators (TEGs), considered the only way to generate a small amount of electric power for the autonomous operation of wearable devices. In this work, we propose a compact and efficient converter system for energy harvesting from TEGs. The system consists of an 83.7% efficient boost converter and a 90 mV self-startup, sharing a single inductor. Innovated techniques are applied to adaptive maximum power point tracking (A-MPPT) and indirect zero current switching (I-ZCS) controllers for efficient operation. The startup circuit is realized using a gain-boosted tri-state buffer, which achieves 69.8% improved gain at the input VIN = 200 mV compared to the conventional approach. To extract the maximum power, we use an A-MPPT controller based on a simple capacitive divider, achieving 95.2% tracking efficiency. To address the challenge of realizing accurate voltage or current sensors, we propose an I-ZCS controller based on a new concept of maximum output voltage tracking (MOVT). The integrated circuit (IC) is fabricated using a 28 nm CMOS in a compact chip area of 0.03 mm2. The compact size, which has not been obtained with previous designs, is suitable for wearable device applications. Measured results show successful startup operation at an ultralow input, VIN = 90 mV. A peak conversion efficiency of 85.9% is achieved for the output of 1.07 mW.

Characterization of a capacitive voltage divider

Voltage dividers are devices designed to reduce high voltages according to a transformation ratio to facilitate their measurement for different purposes. Among them is the detection of transient overvoltages in medium voltage lines. It is convenient to know the transformation ratio of the sensor and its working frequency range for the correct measurement of overvoltages. This article shows the characterization process of an air-insulated capacitive voltage divider used to measure induced voltages in distribution networks. A detailed description of the device is shown, such as how it works and the tests carried out for its characterization. The parameters of its equivalent circuit are obtained by modeling the voltage divider in the CST Studio 2021 software; through laboratory tests, its experimental transformation ratio is obtained; and through a frequency sweep applied to the divider, its frequency response is determined. Indeed, the experimental transformation ratio is 10667.46:1, and the frequency range obtained experimentally is between 60 Hz and 4 MHz, different data from those given by the manufacturer. These experimental data can be used as a reference for the capacitive voltage divider.

Imaging Linearity Modeling and Optimization of Capacitive Division Image Readout (C-DIR) for Microchannel Plate Imaging Detectors

A three-dimensional lumped parameter circuit model based on the nodal analysis to simulate signal propagation and position response characteristics of capacitive division image readout (C-DIR) is proposed. The current pulses, charge collection efficiency, and position reconstruction patterns are calculated for different electrical parameters (charge division capacitor C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">c</sub> , perimeter capacitor C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</sub> , diagonal capacitor C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d</sub> , electrode parasitic capacitor C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sub> , and the sheet resistance of the resistive layer R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Ge</sub> ), and their influence on imaging linearity is investigated. The simulation results show that R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Ge</sub> affects the amplitude, pulse width, and polarity of the current pulse in the C-DIR. The sheet resistance of the resistive layer needs to be larger than 10MΩ for the charge to be efficiently collected by the readout electronics. Several capacitance ratios (C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">c</sub> /C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</sub> , C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">c</sub> /C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sub> , C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">c</sub> /C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d</sub> ) mainly affect the imaging linearity. It has been found that to obtain good detector imaging performance, C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">c</sub> /C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</sub> should be less than 0.01, C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">c</sub> /C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sub> should be larger than 100, C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">c</sub> /C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d</sub> should be larger than 10, and when R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Ge</sub> is larger than 10MΩ, the imaging nonlinearity (RMS) can be less than 1%. The reliability of the simulation results was verified by experimental measurements of a prototype C-DIR detector designed by ourselves. An optimized imaging performance with imaging nonlinearity (RMS) of 2.18% was achieved.

Medium-Voltage Testbed for Comparing Advanced Power Line Sensors vs. Measurement Transformers with Electrical Grid Events

Electrical utilities have relied upon potential transformers (PTs) and current transformers (CTs) for very accurate metering and to provide reliable signals for protective relays. Less expensive alternative sensing technologies offer the possibility of wider deployment, particularly in grids that employ distributed energy resources. In this work, the performance of an advanced medium-voltage sensor is compared with that of a reference PT and a CT and experimentally evaluated for different power grid scenarios on an advanced outdoor power line sensor testbed at the U.S. Department of Energy’s Oak Ridge National Laboratory. The sensor is based on a capacitive divider for voltage monitoring and a Rogowski coil with an integrator for current monitoring. The advanced outdoor power line sensor testbed has a real-time simulator that is used to generate transient scenarios (e.g., electrical faults, capacitor bank operation, and service restoration), while the analog signals are recorded by the same high-resolution power meter. The behaviors of analog signals, harmonic components, total harmonic distortion, and crest factors are assessed for this power line sensor and compared with those of the reference PT/CT because of the absence of testing standards for advanced outdoor power line sensors.

Regulating the DC Voltage of Capacitive Divider Through Variable Switching Dead-Time in the Three-Phase Inverter With an Active Filter

In three-phase inverters, high output common-mode voltage (CMV) will bring many negative effects. The active filter with a capacitive voltage divider (CVD) can effectively suppress the peaks of CMV both in the time-domain and frequency-domain. In practice, it is found that the dc voltage of active filter from the CVD will deviate. In this paper, it is found that the deviation comes from the switching dead-time of the active filter. Based on the study in regard to the influence of switching dead-time on the dc voltage of CVD, a variable switching dead-time (VSDT) scheme is proposed. The VSDT scheme can make the voltage of CVD approach the ideal voltage and lead the maximum spectral peak of the CMV to the lowest. The feasibility and effectiveness of the VSDT scheme are verified by the simulations and experiments in a three-phase inverter.

Analysis of the Control System for a Soft Starter of an Induction Motor Based on a Multi-Zone AC Voltage Converter

The development trends of the modern world of power electronics dictate the requirements for the use of AC voltage converters as soft starters for induction motors. A direct connection of the motors to the mains voltage negatively affects both the motor itself and the mains system as a whole due to high starting currents values, which entail, as a rule, more frequent accidents and shorten the drive system service life. Modern methods of motor acceleration are implemented in practice by means of frequency converters, which require the presence of both a rectifier and an inverter in the structure of the device. The paper presents a study of the control system of a multi-zone AC voltage single-stage regulator. The use of capacitive voltage dividers will also compensate for the consumed reactive power. The article analyzes the features of modern soft starters, describes the circuit design, presents a mathematical calculation by the differential equations algebraization method, a performed simulation modeling in Matlab/Simulink, and also an assembled experimental stand. Particular attention is paid to the definition of the multizonality concept of the proposed converter and the analysis of the control method. The developed algorithm of the double-loop automatic control system will minimize the influence of induction motors on the mains voltage and thus improve electromagnetic compatibility.

Fiber Optic Voltage Sensor Based on Capacitance Current Measurement With Temperature and Wavelength Error Correction Capability

Traditional optical voltage transformers (OVTs) based on electro-optical and inverse piezoelectric effects are gradually exposing their accuracy and reliability issues. In contrast, fibers for measuring electricity have unique properties and significant advantages in the high-voltage power industry, especially fiber optic current sensor (FOCS), which has been widely used in the field of high-voltage measurement. As a result, a novel fiber optical voltage sensor (FOVS) is proposed, which uses FOCS to measure the current flowing through the capacitive voltage divider (CVD) and then calculates the primary voltage proportional to it. In order to solve the inherent temperature- and wavelength -dependent errors and achieve high accuracy, a novel closed-loop signal processing method, which aims to minimize the influence of temperature-sensitive components such as CVD, quarter waveplate, and sensing fiber on the measurement accuracy of the system, is presented. A 110-kV FOVS prototype with a rated voltage of 110/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$({3})^{1/2}$ </tex-math></inline-formula> kV and a rated frequency of 50 Hz is developed and tested. The results show that after temperature and wavelength correction, the accuracy reaches the metering class of 0.2% and protection class of 3P specified in GB/T20840.7-2007

Construction and Evaluation of an Optical Medium Voltage Transducer Module Aimed at a 132 kV Optical Voltage Sensor for WAMPAC Systems.

This paper reports on the construction and characterization of an optical voltage transducer module for applications in the field of wide-area monitoring, protection, and control (WAMPAC). The optical medium voltage transducer (MVT) module was designed to be combined with a capacitive voltage divider (CVD) to form a voltage sensor intended for 132 kV high voltage (HV) networks. The MVT module comprises a combination of a piezoelectric transducer (PZT) and a fiber Bragg grating (FBG) as a core optical sensing element. Changes in the input voltage across the PZT translate into strain being detected by the FBG. The resultant FBG peak wavelength can be calibrated in terms of the input voltage to obtain a precise voltage measurement. The module was experimentally evaluated in the laboratory, and its performance was assessed based on the requirements specified by the IEC standards for electronic voltage transformers and low power voltage transformers. The results of accuracy tests demonstrate that the MVT module is free from hysteresis, within the experimental error, and is capable of simultaneously meeting the requirements for 0.1 metering and 1P protection classes specified by the IEC 60044-7 and IEC 61869-11 standards.

Non-contact Voltage Measurement Technique for On-Line Monitoring of Transient Overvoltages

The electric power system is continuously growing in its size, complexity and required reliability. There is an increased risk due to transient overvoltages which can deteriorate the insulation for different power system components. There is a need for monitoring of transient voltages to better monitor the effects due to them on the insulation of the components. It can be achieved using a non-contact voltage measurement technique. The study elucidates the theory and practical application of the non-contact voltage measurements. The measurement of voltage is achieved by utilizing the stray parasitic capacitance between the high voltage conductor and the ground. A metal plate is used as a sensor to detect the voltage, which indirectly acts as a capacitance divider for voltage measurement. The current study uses operational amplifier based differential-integrator circuit topology in order to accurately measure the voltage over a wide bandwidth of 20 Hz - 1 MHz. The measurement technique is used for measurement of three phase voltages and a methodology is proposed for it. The sensor system is also tested in an online test scenario in a substation for monitoring the shunt reactor switching transients.

Remote determining the location of a single-phase earth fault in 6-10 kV networks based on voltage sensors

The article considers a method for determining the location of a single-phase earth fault by voltage values measured in steady state on the damaged phase. A voltage sensor based on a capacitive voltage divider is presented.

Разработка модели переходных процессов в трансформаторе при емкостном характере нагрузки

Voltage transformers with capacitive loading during transients can cause significant distortion of the secondary voltage of the ship's network. For the analysis, a well-known nonlinear model of a single-phase two-winding transformer is used, in which the magnetic flux is divided into “working” and leakage fluxes coupled to individual windings that close outside the core. For practical purposes, when using such transformers, it is important to know both the conditions for the occurrence of autoparametric oscillations and the dynamics of the transient process. It is convenient to carry out a comparative evaluation of capacitive power take-off schemes on a computer, which makes it possible to reproduce non-linear characteristics and vary parameters over a wide range, which is difficult in physical modeling. The results of the study of a short circuit downstream of the reactor in the capacitor selection circuit proved that the short circuit at the terminals of the intermediate transformer does not affect the elements of the upper arm of the voltage divider, but significantly affects the lower arm of the divider and the compensating reactor, as a result, subharmonics appear. It is shown that the developed model is convenient for studying the influence of transient processes (short circuits) on the elements of a voltage divider. The applied model is universal for ship power networks and can be used for both capacitive and inductive dividers. A divider circuit with specific parameters has been modeled and relevant studies have been carried out. Mathematical results are verified on a physical model, which confirmed the correctness of the mathematical model. It has been inferred that a decrease in the phase voltage leads to a decrease in the overvoltage on the divider elements during a short circuit behind the compensating reactor of the power take-off circuit.