Capacitive Crosstalk Research Articles

Design and Analysis of a New Tuning Fork Structure for Resonant Pressure Sensor.

This paper presents a micromachined resonant pressure sensor. The sensor is designed to optimize the sensitivity and reduce the cross-talk between the driving electrodes and sensing electrodes. The relationship between the sensitivity of the sensor and the main design parameters is analyzed both theoretically and numerically. The sensing and driving electrodes are optimized to get both high sensing capacitance and low cross-talk. This sensor is fabricated using a micromachining process based on a silicon-on-insulator (SOI) wafer. An open-loop measurement system and a closed-loop self-oscillation system is employed to measure the characteristics of the sensor. The experiment result shows that the sensor has a pressure sensitivity of about 29 Hz/kPa, a nonlinearity of 0.02%FS, a hysteresis error of 0.05%FS, and a repeatability error of 0.01%FS. The temperature coefficient is less than 2 Hz/°C in the range of −40 to 80 °C and the short-term stability of the sensor is better than 0.005%FS.

A novel 3D detector configuration enabling high quantum efficiency, low crosstalk, and low output capacitance

The benefits of pixelated planar direct conversion semiconductor radiation detectors comprising a thick fully depleted substrate are that they offer low crosstalk, small output capacitance, and that the planar configuration simplifies manufacturing. In order to provide high quantum efficiency for high energy X-rays and Gamma-rays such a radiation detector should be as thick as possible. The maximum thickness and thus the maximum quantum efficiency has been limited by the substrate doping concentration: the lower the substrate doping the thicker the detector can be before reaching the semiconductor material's electric breakdown field. Thick direct conversion semiconductor detectors comprising vertical three-dimensional electrodes protruding through the substrate have been previously proposed by Sherwood Parker in order to promote rapid detection of radiation. An additional advantage of these detectors is that their thickness is not limited by the substrate doping, i.e., the size of the maximum electric field value in the detector does not depend on detector thickness. However, the thicker the substrate of such three dimensional detectors is the larger the output capacitance is and thus the larger the output noise is. In the novel direct conversion pixelated radiation detector utilizing a novel three dimensional semiconductor architecture, which is proposed in this work, the detector thickness is not limited by the substrate doping and the output capacitance is small and does not depend on the detector thickness. In addition, by incorporating an additional node to the novel three-dimensional semiconductor architecture it can be utilized as a high voltage transistor that can deliver current across high voltages. Furthermore, it is possible to connect a voltage difference of any size to the proposed novel three dimensional semiconductor architecture provided that it is thick enough—this is a novel feature that has not been previously possible for semiconductor components. Yet another feature of the novel three dimensional semiconductor architecture is that despite the thick substrate it can also be efficiently cooled.

Speedster-EXD: a new event-driven hybrid CMOS x-ray detector

The Speedster-EXD is a new 64x64 pixel, 40 $\mu$m pixel pitch, 100 $\mu$m depletion depth hybrid CMOS X-ray detector (HCD) with the capability of reading out only those pixels containing event charge, thus enabling fast effective frame rates. A global charge threshold can be specified, and pixels containing charge above this threshold are flagged and read out. The Speedster detector has also been designed with other advanced in-pixel features to improve performance, including a low-noise, high-gain CTIA amplifier that eliminates interpixel capacitance crosstalk (IPC), and in-pixel Correlated Double Sampling (CDS) subtraction to reduce reset noise. We measure the best energy resolution on the Speedster-EXD detector to be 206 eV (3.5 %) at 5.89 keV and 172 eV (10.0 %) at 1.49 keV. The average IPC to the four adjacent pixels is measured to be 0.25 $\pm$ 0.2 % (i.e. consistent with zero). The pixel-to-pixel gain variation is measured to be 0.80 $\pm$ 0.03 %, and a Monte Carlo simulation is applied to better characterize the contributions to the energy resolution.

Experimental study of multilayer SiCN barrier film in 45/40 nm technological node and beyond

With feature size of device scaled down 45nm technological node and beyond, the backend of the line (BEOL) faces too many problems such as resistance–capacitance (RC) delay, crosstalk noise, and power consumption. In order to improve RC delay, the SiCN dielectric constant had to further decrease through introducing C2H4 gas to increase its carbon content. The SiCNkI (k~5.3) and SiCNkII (k~3.8) were characterized by spectroscopic ellipsometer, fourier transform infrared spectroscopy (FTIR), Rutherford backscattering spectrometry–hydrogen forward scattering (RBS–HFS), X-ray reflectivity (XRR), Hg probe, four point bending (4-PB) test, scanning electron microscope (SEM), and transmission electron microscope (TEM). Results indicated that the hardness and modulus and density of the SiCNkII were lower than that of the SiCNkI. RBS–HFS and FTIR examination indicated that SiCNkII barrier film had high carbon content and terminating CH3 group to cause low cross-linking and density of dielectric films resulting in large volume. 4-PB test combined with transmission electron microscope (TEM) examination demonstrated that the crack occurred in the interface between SiCNkII film/SiCNkI bilayer barrier film and low k film. After adding SiCNkI barrier film, no crack was found using SiCNkI/SiCNkII film/SiCNkI tri-layer barrier film. In addition, the capacitance and RC reduction ratios were improved to about 7–8% using the SiCNkII/SiCNkI bilayer barrier film.

Evolution of a designless nanoparticle network into reconfigurable Boolean logic.

Natural computers exploit the emergent properties and massive parallelism of interconnected networks of locally active components. Evolution has resulted in systems that compute quickly and that use energy efficiently, utilizing whatever physical properties are exploitable. Man-made computers, on the other hand, are based on circuits of functional units that follow given design rules. Hence, potentially exploitable physical processes, such as capacitive crosstalk, to solve a problem are left out. Until now, designless nanoscale networks of inanimate matter that exhibit robust computational functionality had not been realized. Here we artificially evolve the electrical properties of a disordered nanomaterials system (by optimizing the values of control voltages using a genetic algorithm) to perform computational tasks reconfigurably. We exploit the rich behaviour that emerges from interconnected metal nanoparticles, which act as strongly nonlinear single-electron transistors, and find that this nanoscale architecture can be configured in situ into any Boolean logic gate. This universal, reconfigurable gate would require about ten transistors in a conventional circuit. Our system meets the criteria for the physical realization of (cellular) neural networks: universality (arbitrary Boolean functions), compactness, robustness and evolvability, which implies scalability to perform more advanced tasks. Our evolutionary approach works around device-to-device variations and the accompanying uncertainties in performance. Moreover, it bears a great potential for more energy-efficient computation, and for solving problems that are very hard to tackle in conventional architectures.

Preparation of porous ultra low k films using different sacrificial porogen precursors for 28 nM technological node

In order to reduce resistance capacitance (RC) delay and crosstalk between adjacent interconnect lines, the porous ultra low k (PULK) film with dielectric constant value ranging from 2.4 to 2.6 was introduced to be used as an insulator of the Cu integration in back end of the line (BEOL) for 28nm technological node. In this paper, the PULK films were deposited by plasma enhanced chemical vapor deposition (PECVD) using two different sacrificial organic porogen precursors of bicycloheptadiene (BCHD) and alpha-terpinene (ATRP), and then the above co-deposited films were expose to UV radialization for removing sacrificial organic porogens to create pores. The effects of the different sacrificial organic porogen on the PULK film properties such as the dielectric constant, pore and porosity, k shift, mechanic strength, and RC were studied in detail. Results indicated that the hardness and modulus of the PULK film for the BCHD and ATRP precursors were 0.7 and 5.1GPa and 1.0 and 7.1Gpa, and their pore radiuses and porosities were 1.18nm and 25% and 0.95nm and 23%. The dielectric constant value of the PULK film for the BCHD and ATRP precursors were measured as 2.48 and 2.59 with Hg probe. The adhesion test indicated that the interfacial strength of the PULK film for the ATRP precursor was higher than that of the PULK film for the BCHD precursor. By the RC examination, it was seen that RC curve of the PULK film for the ATRP precursor was located below the curve of the PULK film for the BCHD precursor.

Analysis and Validation of a Planar High-Frequency Contactless Absolute Inductive Position Sensor

This paper presents a low cost precise and reliable inductive absolute position measurement system. It is suitable for rough industrial environments, offers a high inherent resolution (0.1%-0.01% of measurement range), can measure target position over a wide measurement range, and can potentially measure multiple target locations simultaneously. The basic position resolution is improved by adding two additional finer pitched receive channels. The sensor works on principles similar to contactless resolvers. It consists of a rectangular antenna printed circuit board and a passive LC resonant circuit. A mathematical model and the equivalent circuit of this kind of sensor are explained in detail. Such sensors suffer from transmitter to receiver coil capacitive crosstalk, which results in a phase sensitive offset. This crosstalk will be analyzed by measurements. Moreover, the mechanical transducer arrangement, the measurement setup, and the measured results will be presented.

A 6.5-Gb/s 1-mW/Gb/s/CH Simple Capacitive Crosstalk Compensator in a 130-nm Process

A capacitive crosstalk compensator (CXC) at a transmitter is presented. It employs double-path capacitive coupling to cancel accurately crosstalk-induced jitter. A mode detector and an additional clock for compensation are eliminated, and only buffers and capacitors are used. The simple architecture consumes low power (1 mW/Gb/s/CH) and occupies small area (0.009 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /CH). The chip was fabricated in a 130-nm CMOS process. CXC has the maximum jitter reduction of 34.1 ps (90.5%) and the maximum voltage improvement of 26.6 mV. CXC operates at up to 6.5 Gb/s.

Characterization of Si hybrid CMOS detectors for use in the soft X-ray band

We report on the characterization of four Teledyne Imaging Systems HAWAII Hybrid Si CMOS detectors designed for X-ray detection. Three H1RG detectors were studied along with a specially configured H2RG. Read noise measurements were performed, with the lowest result being 7.1e− RMS. Interpixel capacitive crosstalk (IPC) was measured for the three H1RGs and for the H2RG. The H1RGs had IPC upper limits of 4.0–5.5% (up & down pixels) and 8.7–9.7% (left & right pixels), indicating a clear asymmetry. Energy resolution is reported for two X-ray lines, 1.5 & 5.9keV, at multiple temperatures between 150 and 210K. The best resolution measured at 5.9keV was 250eV (4.2%) at 150K, with IPC contributing significantly to this measured energy distribution. The H2RG, with a unique configuration designed to decrease the capacitive coupling between ROIC pixels, had an IPC of 1.8±1.0% indicating a dramatic improvement in IPC with no measurable asymmetry. We also measured dark current as a function of temperature for each detector. For the detector with the lowest dark current, at 150K, we measured a dark current of 0.020±0.001 (e−s−1pixel−1). There is also a consistent break in the fit to the dark current data for each detector. Above 180K, all the data can be fit by the product of a power law in temperature and an exponential. Below 180K the dark current decreases more slowly; a shallow power law or constant must be added to each fit, indicating a different form of dark current is dominant in this temperature regime. Dark current figures of merit at 293K are estimated from the fit for each detector.

A New Spatially Rearranged Bundle of Mixed Carbon Nanotubes as VLSI Interconnection

Scaling of device dimensions down to nanometer range helps achieve unprecedented switching speed and multifunctional processing capabilities of nanoelectronic circuits and systems. However, interconnect constraints in the existing and emerging applications are expected to become the primary bottlenecks unless radical change is introduced in the design and technology of on-chip signal communication medium. In response to this demand, various novel and innovative interconnect solutions like carbon nanotube (CNT) are currently being explored as alternatives to metal wires. This paper proposes a unique structure of mixed CNT bundle with a specific arrangement of single-wall and multi-wall CNTs in the bundle. A comprehensive modeling and analysis of the conductance, inductance, and capacitance of the proposed mixed CNT bundle reveals that there will be no significant decrease in the overall conductance of the bundle, but the structural arrangement clearly reduces capacitive crosstalk between neighboring signal lines. Inductive crosstalk is seen to remain unchanged.

Simultaneous current, force and dissipation measurements on the Si(111) 7×7 surface with an optimized qPlus AFM/STM technique.

We present the results of simultaneous scanning-tunneling and frequency-modulated dynamic atomic force microscopy measurements with a qPlus setup. The qPlus sensor is a purely electrical sensor based on a quartz tuning fork. If both the tunneling current and the force signal are to be measured at the tip, a cross-talk of the tunneling current with the force signal can easily occur. The origin and general features of the capacitive cross-talk will be discussed in detail in this contribution. Furthermore, we describe an experimental setup that improves the level of decoupling between the tunneling-current and the deflection signal. The efficiency of this experimental setup is demonstrated through topography and site-specific force/tunneling-spectroscopy measurements on the Si(111) 7×7 surface. The results show an excellent agreement with previously reported data measured by optical interferometric deflection.

Test Pattern Generation for Multiple Aggressor Crosstalk Effects Considering Gate Leakage Loading in Presence of Gate Delays

Decreasing process geometries and increasing operating frequencies have made VLSI circuits more susceptible to signal integrity related failures. Capacitive crosstalk on long signal nets is of particular concern. A typical long net is capacitively coupled with multiple aggressors and also tend to have multiple fan-outs. Gate leakage current that originates in fan-out receivers, terminates in the driver causing a shift in driver output voltage. This effect becomes more prominent as gate oxide is scaled more aggressively. Thus, in nano-scale CMOS circuits, noise margin gets eroded by both aggressor crosstalk noise as well as gate leakage loading from fan-outs. In this paper, we present an automatic test pattern generation solution which uses 0-1 integer linear programming to maximize the cumulative voltage noise at a given victim net because of crosstalk and loading in conjunction with propagating the fault effect to an observation point. The target ISCAS benchmark circuits are assumed to have unit gate delays. Results demonstrate both the viability of a solution as well as a need to consider both sources of noise for signal integrity analysis. Pattern pairs generated by this technique are useful for both manufacturing test application as well as signal integrity verification.

Compensation Technique for Capacitive Crosstalk in Continuous-Time Electro-Mechanical Sigma-Delta Modulators

This paper presents a readout interface for gyroscopes, where the Coriolis rate signal is converted into a bitstream using a 4th-order continuous-time electro-mechanical sigma-delta modulator. The used gyroscope has separate sense and feedback electrodes allowing full continuous-time readout. A severe drawback arises when a gyroscope with this non-collocated design is employed, since the readout is active during force-feedback. Charge feed-through, caused by parasitic capacitances of the sensor in combination with force-feedback signals, drive the charge integrator front-end into saturation. This paper presents a technique for the compensation of this capacitive crosstalk, enabling stable closed-loop readout interfaces.

Three-electrode self-actuating self-sensing quartz cantilever: Design, analysis, and experimental verification

We present a novel quartz cantilever for frequency-modulation atomic force microscopy (FM-AFM) which has three electrodes: an actuating electrode, a sensing electrode, and a ground electrode. By applying an ac signal on the actuating electrode, the cantilever is set to vibrate. If the frequency of actuation voltage closely matches one of the characteristic frequencies of the cantilever, a sharp resonance should be observed. The vibration of the cantilever in turn generates a current on the sensing electrode. The arrangement of the electrodes is such that the cross-talk capacitance between the actuating electrode and the sensing electrode is less than 10(-16) F, thus the direct coupling is negligible. To verify the principle, a number of samples were made. Direct measurements with a Nanosurf easyPPL controller and detector showed that for each cantilever, one or more vibrational modes can be excited and detected. Using classical theory of elasticity, it is shown that such novel cantilevers with proper dimensions can provide optimized performance and sensitivity in FM-AFM with very simple electronics.

Robust On-Chip Signaling by Staggered and Twisted Bundle

Existing shield insertion for multiple signal nets can lead to a nonuniformly distributed, capacitive-coupling length and inductive return paths, introducing large delays and delay variation by crosstalk. This article discusses a twisted, staggered interconnect structure that reduces both inductive and capacitive crosstalk. The proposed design reduces delay by 25% and reduces delay variation by 25times compared to designs employing coplanar shields.

A new and efficient approach for estimating the accurate time-domain response of single and capacitive coupled distributed RC interconnects

This paper describes a novel yet highly efficient approach for estimating the time-domain response of capacitive coupled distributed RC interconnects. By using this method, the voltage signal at any particular point in such wires can be accurately and quickly obtained with very low computational cost. The proposed model exhibits a very good agreement with HSPICE simulations with worst-case error less than 3% and can be readily implemented in CAD analysis tools. This paper also presents an efficient model to estimate the capacitive crosstalk in high-speed very large scale integration (VLSI) circuits. Experimental results show that the maximum error of our peak noise predictions is less than 2.5%. In addition, this work presents an efficient artificial neural network (ANN)-based technique for modeling the time-domain response of interconnects and crosstalk noise. While existing fast noise estimation metrics may overestimate or underestimate the coupling noise, the simulation results demonstrate the ability of this approach to successfully predict coupling noise with a very good accuracy as compared to HSPICE in modest CPU times. Thereby, the proposed models and techniques can be used to predict the signal integrity for designing high-speed and high-density VLSI circuits.

Reducing Interconnect Delay Uncertainty via Hybrid Polarity Repeater Insertion

Capacitive crosstalk between adjacent signal wires has significant effect on performance and delay uncertainty of point-to-point on-chip buses in deep submicrometer (DSM) VLSI technologies. We propose a hybrid polarity repeater insertion technique that combines inverting and non-inverting repeater insertion to achieve constant average effective coupling capacitance per wire transition for all possible switching patterns. Theoretical analysis shows the superiority of the proposed method in terms of performance and delay uncertainty compared to conventional and staggered repeater insertion methods. Simulations at the 90-nm node on semi-global METAL5 layer show around 25% reduction in worst case delay and around 86% delay uncertainty minimization compared to standard bus with optimal repeater configuration. The reduction in worst case capacitive coupling reduces peak energy which is a critical factor for thermal regulation and packaging. Isodelay comparisons with standard bus show that the proposed technique achieves considerable reduction in total buffers area, which in turn reduces average energy and peak current. Comparisons with staggered repeater which is one of the simplest and most effective crosstalk reduction techniques in the literature show that hybrid polarity repeater offers higher performance, less delay uncertainty, and reduced sensitivity to repeater placement variation.

Indentation fracture of low-dielectric constant films: Part I. Experiments and observations

Advanced microelectronic interconnection structures will need dielectrics of low permittivity to reduce capacitive delays and crosstalk, but this reduction in permittivity typically necessitates an increase in the porosity of the material, which is frequently accompanied by reduced mechanical reliability. Failure by brittle fracture remains a typical manufacturing and reliability hurdle for this class of materials. Part I of this two-part work explores the instrumented indentation and indentation fracture responses of a variety of organosilicate low-dielectric constant (low-κ) films. Three different chemical varieties of low-κ material were tested. The influence of film thickness on the fracture response is also explored systematically. Correlations are made between instrumented indentation responses and differing modes of fracture. It is demonstrated that the elastic response of the composite film + substrate systems can be simply tied to the fraction of the total indentation strain energy in the film. These results are then used in the companion paper, Part II [D.J. Morris and R.F. Cook, J. Mater. Res.23, 2443 (2008)], to derive and use a fracture mechanics model to measure fracture properties of low-κ films.

Crosstalk Characterization in Geiger-Mode Avalanche Photodiode Arrays

Following our work on Geiger-mode avalanche photodiode arrays, we have recently been dealing with the crosstalk issue in newly developed dense arrays with a minimum distance between pixel centers of 84 mum. In this paper, we present our crosstalk measurement approach, including the experimental setup and the offline calculation methods. Different characterizations of the crosstalk probability PCT versus capacitance have been performed to extrapolate the PCT when no measurement setup loads the pixels. We also present results regarding the crosstalk probability versus pixel distance and bias. Moreover, by adopting a slightly different approach, the probability density decay time has been measured to investigate about crosstalk origin.

Kelvin force microscopy at the second cantilever resonance: An out-of-vacuum crosstalk compensation setup

We investigate the gap-voltage control loop in a Kelvin force microscopy setup with simultaneous non-contact topography imaging. The Kelvin controller electrostatically excites the second resonance of the cantilever at about 6.3 times the first resonance frequency and adjusts the DC component of the gap voltage to cancel the oscillation amplitude at this frequency, while the non-contact topography imaging is based on a frequency control loop that maintains a constant frequency of the mechanically excited first resonance of the cantilever by adjusting the tip–sample separation. Due to the self-excitation of the first resonance in our setup, it has to be considered that the electrostatic excitation at the second resonance frequency is applied to a closed feedback loop and cannot be considered as a simple superposition to the oscillation at the first resonance frequency. In particular, special care has to be taken about internal capacitive crosstalk between the tip bias and the cantilever deflection output signal. It is shown that such a coupling cannot be corrected by subtraction of a constant offset at the demodulator output since the crosstalk is sent into the self-excitation loop and is multiplied by the closed loop transfer function. We present a circuit that actively compensates, outside the vacuum environment, the internal crosstalk by adding to the deflection output a dephased fraction of the electrostatic excitation signal.