Butterfly Elements Research Articles

Design of Combined Radix-2, Radix- 4 and Radix-8 based Single Path Delay Feedback (SDF) FFT

Objectives: FFT algorithm is used for enhancing the performance of DFT.In the previous years, various types of FFT algorithms have been introduced. Particularly, the pipeline algorithms have been reputed as proper algorithms for processing high-speed data. Some pipeline FFT algorithms like split radix, radix-2 and the mixed radix have been developed. Methods: In the existing method of Radix-2 SDF FFT has more hardware utilization and also computational stages are increased. Findings: To conquer this problem, we developed a combined radix-2, 4 & 8 butterfly elements based Single path Delay Feedback (SDF) fast fourier transform method for reducing the computational stages in this paper. The developed method has the identical number of multipliers and the smaller number of stages and butterfly elements than the existing radix-2 FFT. Improvements: This architecture offers 62.47% reduction in LUTs, 58.78% reduction in slices, and 37.85% reduction in delay and 30.86% reduction in power consumption than the existing method.

Simulation of 32-Point Split-Radix Multipath Delay Commutator (SRMDC) based FFT Architecture

Background: Fast Fourier Transform (FFT) processor is the important method in Orthogonal Frequency Division Multiplexing (OFDM) communication systems. Split-Radix Fast Fourier Transform (SRFFT) estimates the least number of multiplications compared to other FFT algorithm; hence SRFFT is the best for the implementation of low power FFT processor. Methods: In this paper, the proposed “pipelined 32-point Split-Radix Multi-path Delay Commutator (SFMDC) FFT” architecture is designed. The MDC architecture has advantages in reducing the low chip area and lower power consumption. The SR-FFT algorithm has changing the numbers of butterfly elements in successive stages. The 32-point SR-MDC FFT architecture is to determine the frequency transformation techniques. The Split-Radix FFT algorithm is based on radix-2 and radix-4 algorithm and it is related to mixed radix FFT. Findings: The performance evaluation of proposed architecture is determined through VLSI System. Less area, low power consumption and high speed are the main parameters in this design. The proposed structure provides high throughput rate and low hardware complexity. Improvements: The goal of this proposed work is to reduce the slices and LUTs and power consumption and also to enhance the performances of the FFT processor than the existing method. The proposed method has been evaluated by using ModelSim 6.3C and synthesis results has been validated by using Xilinx Plan ahead 12.4.

Eight‐channel decoupled array for cervical spinal cord imaging at 3T: six‐channel posterior and two‐channel anterior array coil

AbstractThe purpose of this study was to develop a dedicated high signal‐to‐noise ratio (SNR) radio frequency coil for cervical spinal cord (CSC) imaging without using the preamp decoupling technique. A novel eight‐channel CSC array was constructed using butterfly, loop (circular), and rectangular elements. The adjacent elements were decoupled by the critical geometrical overlapping, and most non‐adjacent elements were decoupled using the loop and butterfly elements. The performance of the proposed CSC coil was compared with the performance of the standard manufacturer's coil (Siemens' head, neck, and spine array) at 3T MRI system in T2‐weighted images, diffusion tensor images, and ultrahigh‐b diffusion‐weighted images. In T2‐weighted images, the SNR improvement of the eight‐channel CSC coil was 1.4–2.0 times over the manufacturer's coil at the different levels of the CSC vertebrae. Higher contrast between white matter and gray matter was observed in the diffusion‐weighted (b = 500 s/mm2) images and the fractional anisotropy maps obtained using the eight‐channel CSC coil compared with the manufacturer's coil. The eight‐channel CSC coil yielded 2.0 times higher SNR compared with the manufacturer's coil from the white matter region of the ultrahigh‐b (b = 7348 s/mm2) radial diffusion‐weighted images.

A Novel Architecture of Area Efficient FFT Algorithm for FPGA Implementation

Fast Fourier transform (FFT) of large number of samples requires huge hardware resources of field programmable gate arrays (FPGA), which needs more area and power. In this paper, we have presented an area efficient architecture of a FFT processor that reuses the butterfly elements several times. The FFT processor is simulated using VHDL and the results are validated on Virtex-6 FPGA. The proposed architecture out performs the conventional architecture of a N-point FFT processor in terms of area which is reduced by a factor of logN 2with negligible increase in processing time.

Low power reconfigurable FP-FFT core with an array of folded DA butterflies

A variable length (32 ~ 2,048), low power, floating point fast Fourier transform (FP-FFT) processor is designed and implemented using energy-efficient butterfly elements. The butterfly elements are implemented using distributed arithmetic (DA) algorithm that eliminates the power-consuming complex multipliers. The FFT computations are scheduled in a quasi-parallel mode with an array of 16 butterflies. The nodes of the data flow graph (DFG) of the FFT are folded to these 16 butterflies for any value of N by the control unit. Register minimization is also applied after folding to decrease the number of scratch pad registers to (log 2 N − 1) × 16. The real and imaginary parts of the samples are represented by 32-bit single-precision floating point notation to achieve high precision in the results. Thus, each sample is represented using 64 bits. Twiddle factor ROM size is reduced by 25% using the symmetry of the twiddle factors. Reconfigurability based on the sample size is achieved by the control unit. This distributed floating point arithmetic (DFPA)-based design of FFT processor implemented in 45-nm process occupies an area of 0.973 mm2 and dissipates a power of 68 mW at an operating frequency of 100 MHz. When compared with FFT processor designed in the same technology with multiplier-based butterflies, this design shows 33% less area and 38% less power. The throughput for 2,048-point FFT is 222 KS/s and the energy spent per FFT is 7.4 to 14 nJ for 64 to 2,048 points being one among the most energy-efficient FFT processors.

Multiregional comparison of the ecological and phylogenetic structure of butterfly species richness gradients

AbstractAim To examine butterfly species richness gradients in seven regions/countries and to quantify geographic mean root distance (MRD) patterns. My primary goal is to determine the extent to which an explanation for butterfly richness patterns based on tropical niche conservatism and the evolution of cold tolerance, proposed for the fauna of Canada and the USA, applies to other parts of the world.Location USA/Canada, Mexico, Europe/NW Africa, Transbaikal Siberia, Chile, South Africa and Australia.Methods Digitized range maps for butterfly species in each region were used to map richness patterns in summer (for all areas) and winter (for USA/Canada, Europe/NW Africa and Australia). A phylogeny resolved to subfamily was used to map the geographic MRD patterns. Regression trees and general linear models examined climatic and vegetation correlates of species richness and MRD within and among regions.Results Various combinations of climate and vegetation were strong predictors of species richness gradients within regions, but unresolved ‘regional’ factors contributed to the multiregional pattern. Regionally based differences in phylogenetic structure also exist, but MRD is negatively correlated with temperature both within and across areas. MRD patterns consistent with tropical niche conservatism occur in most areas. With a possible partial exception of Mexico, faunas in cold climates and in mountains are more derived than faunas in lowlands and tropical/subtropical climates. In USA/Canada, Europe and Australia, winter faunas are more derived than summer faunas.Main conclusions The phylogenetic pattern previously found in the USA and Canada is widespread in both the Northern and Southern Hemispheres, and niche conservatism and the evolution of cold tolerance is the likely explanation for the development of the global butterfly species richness gradient over evolutionary time. Contemporary climate also influences species richness patterns but is unlikely to be a complete explanation globally. The importance of climate is also manifested in the seasonal loss of more basal butterfly elements outside the tropics in winter.

Magnetostatic simulation for accurate design of low field MRI phased‐array coils

AbstractRadiofrequency receiver phased‐array coils in magnetic resonance imaging systems are used to pick up the signals emitted by the nuclei with high signal‐to‐noise ratio and a large region of sensitivity. The quality of obtained images strongly depends upon the correct choice of the coils geometry and typology. In this work, we propose a fast coil simulation method, which permits to design phased‐array coils with great accuracy. The developed algorithm exploits magnetostatic analysis to obtain accurate calculation of the mutual inductances between the array coils and the magnetic field pattern. Using the simulator, we designed a novel phased‐array coil composed of a couple of rectangular butterfly elements. © 2007 Wiley Periodicals, Inc. Concepts Magn Reson Part B (Magn Reson Engineering) 31B: 140–146, 2007

A method for preamplifier‐decoupling improvement in quadrature phased‐array coils

To improve preamplifier decoupling in a quadrature phased-array coil using a new quadrature combiner configuration. A commercial six-element quadrature cervical-thoracic-lumbar (CTL) coil was used on a 1.5 T GE Signa Lx Scanner. The new combiner configuration is designed based on the fact that when one compares the amount of flux linkage of two loops with butterfly elements separated by the same distance, the loop elements have much higher coupling than the butterfly elements. The results are demonstrated using an imaging-based element coupling measurement method. The new quadrature combiner configuration has introduced an approximately -8dB improvement in preamplifier decoupling. One-dimensional quadrature phased arrays can be built even if the preamplifier is not integrated in the coil. If the combiner is placed between the coil and the preamplifiers, the butterflies should be on the high impedance side of the quadrature combiner. The loops should see the low input impedance of the preamplifiers.

Contemporary geography dominates butterfly diversity gradients within the Aegean archipelago (Lepidoptera: Papilionoidea, Hesperioidea)

AbstractAim We compare the influence of contemporary geography and historical influences on butterfly diversity for islands in the Aegean archipelago.Location The Aegean archipelago (Greece) and two islands (Cyprus and Megisti) in the Levantine Sea.Methods Thirty‐one islands were examined. Data are taken from own surveys (Coutsis and Olivier) and from the literature. Stepwise multiple regression is used to determine relationships between species richness, frequency, rarity and endemicity against potential geographical predictors. Stepwise logit regression is used to determine geographical predictors of species incidence on islands. Inter‐island and inter‐species associations have been examined using multivariate ordination and clustering techniques.Results The Aegean butterfly fauna is characterized by decreasing diversity and rarity, and increasing homogeneity, from the periphery to the present geographical centre of the archipelago (Cyclades). Diversity and rarity are shown to relate closely to species richness, and species richness, in turn, is largely explained by contemporary geography, particularly the degree of isolation from the nearest mainland sources of Greece or Turkey, and island dimensions. Islands towards the centre of the archipelago are characterized by a group of mobile species (n ≥ 20 species) with extensive ranges across Europe; species that would have recolonized Santorini (Thira) following the VI6 eruption there c. 1630 bc. Endemic components, indicative of autochthonous evolutionary events, are few (5% of species are endemic) compared to known sedentary organisms (molluscs and isopods), but exceed those for more mobile animals (i.e. birds); their distribution is mainly confined to large isolated islands along the Aegean arc (i.e. Kriti) and in the Dodecanese group.Main conclusions Contemporary geography, i.e. processes currently operating in ecological time, dominates butterfly diversity gradients (species richness, frequency, rarity and incidence) in the archipelago. Two reasons are suggested to account for the lack of endemism and the pattern of decreasing diversity into the Cyclades. First, relict butterfly elements may have become extinct on all but a few larger islands, particularly from environmental changes since the Neolithic (fire and overgrazing). Second, colonization from the continental landmasses is ongoing with more mobile species transferring even to the most isolated islands.

Efficient FFT structures using a mixed complex number system

Abstract This paper describes a hardware structure for fast Fourier transform (FFT) computation thai is particularly suited to input data presented sequentially. The algorithm allows different representations of complex numbers to be used in the same processing system so that the FFT can be computed by using multiplication-free butterfly elements based on the radix numbers of 2, 3, 4 and 6. In comparison with previous designs in the literature, the new algorithm provides significant hardware savings on the requirements of data memory and multipliers. Furthermore, the FFT size N, which is usually a composite number of 2 or 4, can be more flexible. Efficient data format conversions between different number systems are also provided.

A VLSI architecture for pipeline fft processor

AbstractThis paper considers the fast‐Fourier transform (FFT) which processes a large amount of data, such as image. As a structure for the one‐dimensional FFT processor, aiming at eliminating some restrictions in VLSI design, the constant‐geometry type FFT algorithm and the bit‐serial pipeline floating‐point arithmetic are discussed. The major results are as follows. (1) Using the constant‐geometry algorithm, the memory elements to perform the rearrangement characteristic to FFT can be realized by a uniform structure and uniform control scheme throughout the stages. The memory element for N‐point FFT can be constructed as a simple and regular structure using 2 of N/2‐stage shift‐registers. (2) The multiplication cell with code extender, the serial structure of normalization circuit and the shifter, and the parallel operation covering a longer length than the input word length are employed. By those schemes, the pipeline operation of floatingpoint arithmetic is realized without a guard bit. By this scheme, the restriction in VLSI using the butterfly elements can be reduced drastically. (3) As an additional effect of the regular structure of the memory element, the automatic defecttolerant operation is made possible, using the effective k‐out‐of‐n redundant structure and the self‐testing. By this scheme, the restriction for the VLSI chip‐area can be reduced when the number of sampling points is increased. (4) The one‐dimensional FFT processor can be realized as a modular structure, which is a cascade connection of two kinds of VLSI, i. e., butterfly element and the memory elements.