Butterfly Curves Research Articles

Perovskite Oxides Tunable by Electromechanical and Electrothermal Couplings

Objectives: Oxides hold the great promise for emerging electronic applications (other than conventional CMOS components such as gate oxides) because they can significantly increase the operational range of temperature and bias voltage due to the much higher bandgap energy than semiconductors. However, using the oxides for such novel purposes requires their electronic properties to be properly tuned and tailored to specific device applications. Therefore, this work seeks to develop the way to address this challenge by focusing on the tunable characteristics of perovskite oxides driven by their unique electromechanical and electrothermal couplings. Among various types of oxides, crystalline perovskite titanate structures such as STO (SrTiO3) have been chosen as the representative material platform in this study, due to their multifunctional properties and well-established growth techniques. New Results: Previously, researchers have demonstrated the heat-induced tunable electrical characteristics of STO doped with various impurities [1-2]. Due to the complex chemistry where both the thermal and doping effects contribute to the observed change in electrical properties, accurate physical origin of the STO’s tunable behavior has not been clearly identified. In this work, we focused on an undoped, 1 mm-thick STO crystal to quantitatively measure its response when solely exposed to an external stimulus such as mechanical pressure.Fig. 1 depicts the C-AFM (conductive atomic force microscope) experimental setup to study the tunable behavior of STO driven by an electromechanical coupling. The commercially available conductive tip (Asyelec.01-R2) was used to apply a bias voltage (Vbias = 2V) while in contact with the top surface of the STO sample. This enables simultaneous measurement of electrical response during the experiment. The force was applied and varied by changing the set-point voltage (Vsetpoint, kept below 3V to prevent any possible damage to the measurement system) that is used to make the cantilever tip bent with the varying height. Conversion from the control parameter (Vsetpoint) to the mechanical pressure (N/m2) was conducted through precise calibration of the C-AFM measurement setup, including spring constant (0.92 N/m) and deflection sensitivity (0.0576 mm/V) (Table 1).Fig. 2 shows the measured electrical conductivity vs. applied pressure plot for the undoped STO sample used in the experiment. To ensure statistically meaningful data, each experiment was performed repetitively (at least 10 times) and both the mean (data points) and standard deviation (error bars) values were presented in the figure. A clear trend of increase in electrical conductivity with increasing pressure was observed, which is best attributed to creation of oxygen vacancies by mechanical stress in STO [3]. This will surely help researchers study the fundamental electromechanical coupling-driven behavior of perovskite oxide thin films. Fig. 3 further presents the C-AFM image when pressure was applied to the STO surface (the white particles are believed to be due to pile-up of electronic charges upon the application of localized electrical bias).We next studied the electrothermal coupling-driven conductance change in STO by performing a systematic study of thermal annealing (at temperatures ranging from 200°C to 800°C and in dry air). For this study, a sufficient amount of oxygen vacancies was purposely introduced when the STO thin film was prepared (see Fig. 4 for the device schematic). Because subsequent annealing annihilated oxygen vacancies, decrease in electrical conductivity was observed in STO samples annealed at high temperatures (Fig. 5). The reasoning of relating the observed trend in Fig. 5 to the change in the number of oxygen vacancies upon thermal annealing is well supported by measuring the hysteretic behavior of the STO thin film. Fig. 6 shows a measured butterfly curve that is typical for memristor devices where removal and restoration of oxygen vacancies play a key role as the switching mechanism. Significance: This work is of significant importance for the development of future electronic devices with significantly enhanced reliability features. By demonstrating that electrical characteristics of multifunctional oxide thin films can be largely tuned by external stimuli such as mechanical pressure and thermal annealing, it will spark various research initiatives in using the oxide for novel, more versatile applications.

Low power, high-performance reversible logic enabled CNTFET SRAM cell with improved stability

Abstract With aggressive scaling of device feature size, performance of conventional MOS SRAM is affected and reliability, leakage power dissipation, and testing related issues arise due to short channel effects. So CNTFET device is promising and ideal candidate to replace existing MOS technology because of its excellent performance and high thermal stability. In this paper design and analysis of CNTFET SRAM cell, Reverse Logic enabled SRAM (RL-SRAM) and RL-SRAM with body bias is presented at 32 nm using Vdd 0.7 V. Adiabatic technique is incorporated in SRAM cell that uses reversible logic, plays an important role to reduce power consumption by recycling the energy stored at node capacitance instead of dissipating in form of heat. By incorporating of reversible logic with SRAM, 60.72% and 65.20% reduction in leakage power dissipation and improvement of 55.34% and 64.77% in delay is achieved for CNTFET RL-SRAM and RL-SRAM with body bias respectively in comparison of CNTFET SRAM cell. Results are also compared with previous work [1] , which shows significant improvement in average power consumption, delay, and leakage power dissipation is achieved using CNTFET SRAM cell design without affecting the system performance. Stability of the memory cell is also examined by using butterfly curve and N-curve analysis.

Performance comparison of 6T SRAM bit-cells based on side-contacted FED and CMOS

Designing a Static Random-Access Memory (SRAM) cell configuration that copes with conventional complementary metal-oxide-semiconductor (CMOS) constraints on the cell area is desired to satisfy high packing density in integrated digital circuits. This paper analyzes and compares performance parameters of 6T SRAM bit-cells based on the side-contacted field-effect diode (S-FED) and conventional CMOS at 180 nm technology node. Steady-state responses demonstrate that in the worst-case, by applying weak logic 0/1 to the bit-lines, strong logic data is stored in the S-FED-based cell with superior write margin and lower power consumption by about one order of magnitude in comparison with the CMOS-based one. Comparing static noise margin reveals that S-FED-based cells enjoy prominent stability, especially in the read and hold operations with ~3X and 29% improvements, respectively, to the CMOS-based versions. In addition, enhancement of read-stability is attained utilizing S-FED-based cell, as well as decrement of subthreshold current and static power dissipation, compared with the CMOS-based one. Sensitivity analyses extracted from Monte Carlo simulations and butterfly curves indicate that S-FED-based cell successfully tolerates process and supply voltage variations in all operation modes, superior to the CMOS-based counterpart.

A VDD Correction Method for Static Stability Test of SRAM Bit Cell

SRAM stability is a major concern in nanometer CMOS technologies. As the most important metrics of SRAM static stability, the static characteristics of SRAM are derived by static characteristic curves (read butterfly curve, standby butterfly curve, read N curve, write N curve and WNM curve). This paper deduces the read butterfly curve transfer function as an example to show the effect of supply voltage deviation. In order to increase the quantity of SRAM DUTs (Device under Tests) and test accuracy, we propose a test method with VDD correction which eliminates the effect of supply voltage deviation. First, an addressable test structure is applied, where the transmission gates are used to force and sense the node voltages, and then correct the voltages. Second, a test algorithm with fast convergence combining the bisection method and PID (Proportion Integral Differential) algorithm is proposed to correct the voltages. SPICE simulations show that the proposed method reduces the error from approximately 10% (commonly used methods) to less than 2%. It is further implemented in a standard 55nm CMOS process, and the static characteristic curves of 1k-bits SRAM DUTs are measured within the accuracy range of 1 mV, which fit well with the simulation results, indicating the method can accurately measure 1k-bits DUTs.

Electric field dependence of ferroelectric stability in BiFeO3 thin films co-doped with Er and Mn

Bi0.9Er0.1Fe1−xMnxO3 (BEFMxO, x = 0.00–0.03) films are synthesized by a sol–gel technique. The BEFO film exhibits a conduction mechanism based on electron tunneling. The high applied electric field causes dissociation of the defect complex, and the resulting oxygen vacancies contribute to fake polarization. Consequently, the BEFO film has poor polarization stability at high applied electric fields. Coexistence of two phases (with space groups R3c:H and R3m:R) and reduced concentrations of oxygen vacancies and Fe2+ in BEFMxO are achieved by co-doping with Er and Mn. The presence of bulk-based conduction in the BEFMxO films then leads to ferroelectric domain switching contributing to the real polarization and to excellent ferroelectric stability. In addition, the BEFM0.02O film shows a typical symmetrical butterfly curve, the highest remnant polarization of ~109 μC/cm2, and the highest switching current of ~1.66 mA. It also has the smallest oxygen vacancy concentration and thus the smallest amount of defect complex, which means that there are fewer pinning effects on ferroelectric domains and therefore excellent ferroelectric stability. This excellent ferroelectric stability makes the BEFMxO films obtain good stability and reliability in the application of ferroelectric memory devices.

Design and analysis of CMOS based 6T SRAM cell at different technology nodes

The CMOS technology is rapidly growing towards large scale integration on a single chip leading to smaller size consuming smaller area. The demand for speed and efficiency are also increasing day by day. With continues down scaling of technologies, the integral density of the chip increases. Stability and reliability of any memory device such as SRAM, DRAM in different environments, is a critical issue. In this paper, the design and analysis of CMOS based 6T SRAM cell at different technology nodes is demonstrated. The main purpose of this paper is to simulate 6T SRAM to evaluate the performance at different CMOS technology nodes (180 nm, 90 nm, 65 nm, 45 nm) with the help of predictive technology model (PTM) file. The constancy of the SRAM bit cell in terms of static noise margin (SNM) is analysed by butterfly curve method. Simulations are done using BSIM3 model PTM files on HSPICE tool. The results shown in this paper clearly indicate that as we proceed from 180 nm to 45 nm delay reduces and stability improves i.e. read static noise margin (RSNM) is improved by 7.72% while write static noise margin (WSNM) is improved by 5.94% of the 6T SRAM cell.

Design and performance analysis of 6T SRAM cell on different CMOS technologies with stability characterization

With the advent of portable devices, the demand for static random-access memory (SRAM) is increasing with large use of SRAM in System on Chip and high-performance VLSI circuits. SRAM optimization has become a focal point for research work, as 60% to 70% area of the chip is consumed by the memories. The performance parameters optimization can lead to the overall optimization of the performance of the chip. In this paper design and analysis of the 6T SRAM cell at different technologies using PTM (Predictive Technology Model) model has done with the aim of reducing power dissipation while maintaining stability. Then the performance of SRAM cell is compared on the basis of power dissipation i.e. dynamic power dissipation and static power dissipation, delay, Power Delay Product (PDP) and Static Noise Margin (SNM).SRAM cell read stability and write-stability are major concerns in nanometer CMOS technologies, due to the progressive increase in intra-die variability and Vdd scaling. Cell stability is also examined by the calculation of SNM with the help of the butterfly curve method at different CMOS technologies. Effect of variation of channel length on static power consumption, dynamic power consumption, delay, PDP and SNM is also measured. SNM variation is also observed with the variation of the supply voltage.

Study on Temperature Characteristics of Ceramic Materials for Piezoelectric Actuators and Model Modification

The performance of piezoelectric actuator ceramics under strong electric field(20 kV/cm) and variable temperature (30~150℃) were tested on a piezoelectric ceramic thermo-electro-mechanical multi-field loading test bench. The variation of hysteresis loop, strain loop, free capacitor and dielectric loss tangent with temperature was analyzed. A mathematical model of displacement characteristics of ceramic materials considering temperature effect is established, and the accuracy of the model is verified. The results show that the hysteresis loops become slender with the increasing of temperature, while the residual polarization, maximum polarization and coercive field decrease. The effect of the temperature on the residual polarization and coercive field is stronger than that on maximum polarization. The strain loop presents a typical butterfly curve, and the negative strain decreases gradually to 0.12% with the increasing of temperature. In the unipolar electric field, the residual polarization varies slightly with the increasing of temperature, and the maximum polarization increases about 40%. The piezoelectric constant of the material increases linearly. The free capacitor and dielectric loss tangent increases continuously. The higher the temperature, the greater the increase.

Differential Spin Hall Effect-Based Nonvolatile Static Random Access Memory for Energy-Efficient and Fast Data Restoration Application

Spintronics, being a burgeoning area of research, aims to incorporate magnetic tunnel junction (MTJ), as a basic storage building block, to various electronic applications. In continuation of many device structure using MTJ such as spin-transfer torque (STT)-MTJ, spin Hall effect (SHE)-MTJ, spin–orbit torque (SOT)-MTJ, domain wall-based MTJ, and complementary polarizer MTJ, this paper presents a differential spin Hall effect (DSHE). The working and operational analysis of the DSHE-based memory element is presented. It provides 50% improved write energy and more than 1.5 times faster read as compared to a single-ended SHE-MTJ. The device structure is well suited for various differential circuit applications, for example, nonvolatile static random access memory (NVSRAM), nonvolatile flip flop (NVFF), magnetic full adder, and nonvolatile differential sense latch, with a fast and energy-efficient operation. In addition, DSHE-MTJ application for NVSRAM (named as DSNVM) is proposed. Performance of DSNVM is compared with the STT+SHE-based NVSRAM (named as SHENVM). DSNVM shows improved performance in terms of area overhead, restoration delay, and energy. DSNVM provides 40% faster restoration and 16.7% lesser energy as compared to SHENVM. Furthermore, a computational investigation for cell stability is depicted using butterfly curve and N-curve methods. Usually, write noise margins deteriorate in NVSRAMs due to the constituent NV cell. However, read as well as write noise margin is improved in DSNVM.

Multiferroic properties of La/Er/Mn/Co multi-doped BiFeO3 thin films

Abstract Bi0.9-xLaxEr0.1Fe0.96Co0.02Mn0.02O3 (BLaxEFMCO) thin films were prepared by sol-gel method. The grain size, grain boundary resistance, oxygen vacancies and the amount of Fe2+ of the films were reduced by multi-ion doping to reduce the built-in electric field of the films. An applied voltage was adopted to regulate the effects of the directional alignment of the oxygen vacancies, defects, and defect pairs on the ferroelectric domains at the grain boundaries to control the ferroelectric polarization of the films. Meanwhile, the capacitance peak also reveals the effects of the ferroelectric domains switching, the migration of oxygen vacancies, and the directional alignment of defect pairs on the ferroelectric properties. In addition, the remnant polarization value of the BLa0.01EFMCO thin film reaches 152 μC/cm2, the squareness of the hysteresis loop (Rsq) is calculated to be 1.03, and the maximum switching current is 1.50 mA. The typical butterfly curves under positive and negative electric fields indicate the films with the enhanced ferroelectric properties. Moreover, the BLa0.01EFMCO thin film exhibits the enhanced ferromagnetic properties, and its saturation magnetization (Ms) is 2.32 emu/cm3. Therefore, the ferroelectric properties of the BFO film can be enhanced by the multi-ion doped BFO film to reduce the grain boundary resistance (Rgb), the interface Schottky barrier formed by the asymmetric electrode material at the top and bottom of the film, and the built-in electric field formed by the film internal defect or defect pairs.

Total ionizing dose effects on innovative silicon-on-insulator static random access memory cell

The static random access memory (SRAM), as a common and important high-speed storage module in modern digital circuit systems, plays an important role in improving the performances of electronic systems. The data about the total ionizing dose (TID) radiation effect of SRAM cell have not been rich in the literature so far. In this work, a novel 6-transistor SRAM cell (6T LB SRAM cell) based on L-type gate body-contact (LB) MOSFET device is designed and fabricated by 130nm silicon-on-insulator (SOI) process. The LB MOSFET follows the center-symmetric layout design of the SRAM cell, reducing the area by approximately 22% compared with the SRAM cell using the T-type gate MOSFET contact device (6T TB SRAM cell) of the same device size. The electrical performance difference between LB MOSFET and other devices is compared. Besides this, the variations of the leakage current and the reading static noise margin (RSNM) of SRAM cells based on different MOSFETs under various total ionizing doses are also investigated. The test results indicate that the LB MOS successfully suppresses the floating body effect (FBE), and that the drain-induced barrier lowing (DIBL) and drain-to-source breakdown voltage (BVds) characteristics are improved. The performance of this device is similar to that of TB MOS device, but due to the special body contact design, the former has an advantage of smaller area. Due to the use of the body contact device, the leakage current of the 6T LB SRAM cell is significantly smaller than that of the conventional floating device SRAM cell (6T FB SRAM cell), which has lower static power consumption. After <sup>60</sup>Co-γ ray irradiation, the 700 krad(Si) radiation dose only increases the leakage current of 6T LB SRAM cell by 21.9%, which is better than 41.4% of 6T FB SRAM cell. In addition, the 6T LB SRAM cell has an RSNM value similar to that of the 6T TB SRAM cell, and this is 1.93 times higher than the that of 6T FB SRAM cell. The radiation experiment causes the butterfly curve of the 6T FB SRAM cell to be asymmetrically deformed, and the stability of the SRAM cell is deteriorated due to the TID effect. However, the test results show that when the radiation dose reaches 700 krad (Si), the RSNM value of the 6T LB SRAM cell is reduced only by 11.2%. Therefore, 6T LB SRAM cell has stable and reliable practical value.

Effects of DC Bias on Regional Flux and Magnetostriction of a Single-Phase Transformer Core Modeled by 3-D MACC

Traditionally, flux distributions in transformer cores are modeled as a 2-D problem. However, experimental studies indicate that 3-D models are needed. The main reason is that limbs of circular cross section are combined with roughly semi-circular yokes. At the joints, this yields shifts of overlap regions as a reason of significant (off-plane) normal direction (ND) induction $B_{\mathrm {ND}}$ . This paper reports a first corresponding 3-D modeling of a two-package one-phase core with the consideration of non-linear characteristics of material. For corners, the so-called critical induction $B_{\mathrm {CRIT}}$ of joints—as arising close to 1.4 T—is considered. Two instants of the cycle of global magnetization are addressed, i.e., $B_{\mathrm {GL}} = 1.7$ T for normal operation and 1.9 T as a value that may arise for dc bias. For 1.7 T, the results indicate strong inhomogeneity, in particular in the wide main package of the core. On the other hand, 1.9 T is characterized by distinct homogenization. As 3-D effects, the cycle of magnetization involves distinct changes of flux in ND, with values up to more than 0.2 T. Half-cycle saturation is indicated especially for inner (window-sided) corner regions. The corresponding consequences on local magnetostriction (MS) values are over-proportional due to the complex dependence of strain $\lambda$ and induction. The so-called butterfly curve is dynamically passed beyond the turn point and even into its positive range. In particular, this yields distinct distortion of $\lambda$ , which can be assumed as a source of over-proportional rises of A-weighted noise. Apart from MS, further enhancement is to be expected from inter-laminar forces.

(Invited) A Nonvolatile SRAM Based on Ferroelectric HfO2 capacitor for IoT Power Management

A nonvolatile SRAM has been designed and fabricated by integrating with ferroelectric HfO2 capacitors, and its store/recall operation before/after power-off have been experimentally demonstrated. Excellent ferroelectricity and memory characteristics have been obtained in sub-10nm-thick ferroelectric HfO2 capacitor. The NVSRAM with ferroelectric HfO2 capacitor can be a candidate for cost-effective, normally-off and ultralow power embedded memory solution for IoT power management. Introduction IoT edge devices have been playing key roles as sensor node device. The number of IoT edge devices is predicted to be trillions or even more, and then obviously the device must operate at ultralow power in the order of 1mW or less [1]. IoT edge device operates in an intermittent mode where the switching times of a transistor per second is very small in average. Then the power consumption is dominated by standby leakage current especially in high capacity memory such as SRAM. Therefore it is very important to suppress leakage current of a memory cell. One possible approach is to turn off power supply for memory cells. To do so, state information must be stored and recalled, before and after power-off, so that latency and power overhead are mitigated. This is so called normally-off computing and low power nonvolatile memory needs to be integrated to SRAM, which turns out to be nonvolatile SRAM (NVSRAM) [2-4]. There are several architectures for NVSRAM. Ferroelectric NVSRAM has an advantage of low voltage and low power operation [4]. However, conventional ferroelectric material has several issues in CMOS compatibility and scaling. Recently, ferroelectricity has been discovered in HfO2 thin film which is already used in CMOS process as a high-k dielectric [5-7]. Ferroelectric HfO2 opens new paths for ferroelectric-based low power devices including NVSRAM. In this paper, NVSRAM is designed and fabricated by integrating ferroelectric HfO2 in our university lab. We focus on functional device implementation as a proof-of-concept for normally-off computing and IoT power management. Device Operation and Design Consideration In this work, among several ferroelectric NVSRAM architectures [4,8-11], we chose 6T-2C NVSRAM architectures (Fig.1) [4] because of its simple structure, operation principle, and above all its simple process integration with ferroelectric HfO2 capacitor. NVSRAM cell is made of 6T SRAM cell and two ferroelectric capacitors at the SRAM nodes. Bottom electrodes of ferroelectric capacitors are connected to plate line (PL). NVSRAM operates just as normal SRAM with PL is VDD/2. It only needs to flip ferroelectric polarization during store operation before power-off, which mitigates reliability requirement of ferroelectric capacitors. One of the most critical operations is recall. The nodes have opposite polarizations and thus different capacitances. The recall operation makes use of this capacitance imbalance to regenerate node voltages. Capacitor size and voltage ramp rate need to be carefully chosen. We confirmed recall operation in our NVSRAM design by SPICE simulation which was calibrated by our MOSFET and MIM capacitor. Experiments and Discussions NVSRAM was fabricated by following process flow. First SRAM was fabricated by conventional SOI CMOS process. After contact formation, bottom TiN/Ti electrode was deposited by sputtering. Then HfO2 doped with Zr was deposited by ALD system, followed by top TiN electrode deposition by sputtering. MIMS capacitor was formed by simple subtractive etching process. Lastly, RTA was performed to crystalize the HfO2 film. Fig. 2 shows the cross sectional TEM image of the ferroelectric HfO2 capacitor, where we confirmed uniformly crystallized 9nm-thick HfO2 thin film. PV characteristics of the MIM capacitor integrated on SRAM cell does not show any degradation as shown in Fig. 3. We also confirmed sufficient capacitance difference for each polarization state. From retention measurement, more than 1 year retention is estimated. Measured endurance cycle was 1x108 which is close to requirement for IoT power management, 1x109. NVSRAM cell shows no difference in static SRAM butterfly curve from reference SRAM cell on the same chip. Fig. 4 shows the measured waveform of the entire NVSRAM operation. First, data was written in normal SRAM mode, and then store operation was performed before power-off. After arbitrary sleep time, recall operation was performed and the written data was verified. We confirmed correct store and recall operation in NVSRAM and demonstrated nonvolatile functionality with ferroelectric HfO2 capacitors. Summary We experimentally demonstrated the nonvolatile functionality of the NVSRAM integrated with ferroelectric HfO2 capacitor fabricated in the university lab. NVSRAM will enable normally-off computing for IoT power management at low cost. In this work, we focused on demonstrating essential store/recall operations. Design optimization for high density and high speed operation using relevant CMOS technology will be our future work. Figure 1

Ferroelectric properties of BiFeO3 thin films by Sr/Gd/Mn/Co multi-doping

Bi0.97-xSr0.03GdxFe0.94Mn0.04Co0.02O3 (BSGxFMC) thin films were fabricated by sol-gel method. It is found that the formation of oxygen vacancies of BSGxFMC thin films is restrained by multi-doping, leading to the decrease of built-in electric field in depletion layer formed between Au electrode and BFO ferroelectric layer. Hence, the shift phenomena of coercive fields are weakened and the better symmetry of hysteresis loops can be observed in the thin films. Among all the films, BSG0.09FMC thin film exhibits real and excellent ferroelectric properties with a giant remnant polarization of Pr ∼108 μC/cm2, a large switching current of 1.4 mA and a high squareness ratio of 1.18. And the BSG0.09FMC film displays a symmetric-well narrow butterfly curve, which suggests its great ferroelectric behavior. Meanwhile, the remnant polarization of BSG0.09FMC film exhibits the flattest slope with the increase of applied voltages compared with other samples, indicating the greatest ferroelectric stability at different applied voltages. Ferroelectric properties of BSGxFMC thin films have been improved significantly due to the coefficient contributions from the reduced oxygen vacancies ratio, the increased resistance and the structure transition with multi-doping.

Strained Silicon Complementary TFET SRAM: Experimental Demonstration and Simulations

A half SRAM cell with strained Si nanowire complementary tunnel-FETs (TFETs) was fabricated and characterized to explore the feasibility and functionality of 6T-SRAM based on TFETs. Outward-faced n-TFETs are used as access-transistors. Static measurements were performed to determine the SRAM butterfly curves, allowing the assessment of cell functionality and stability. The forward p-i-n leakage of the access-transistor at certain bias configurations leads to malfunctioning storage operation, even without the contribution of the ambipolar behavior. At large VDD, lowering of the bit-line bias is needed to mitigate such effect, demonstrating functional hold, read and write operations. Circuit simulations were carried out using a Verilog-A compact model calibrated on the experimental TFETs, providing a better understanding of the TFET SRAM operation at different supply voltages and for different cell sizing and giving an estimate of the dynamic performance of the cell.

Simulations of statistical domain switching model of PIC151 based on self-adaptive differential evolution algorithm

The nonlinear properties of piezoceramic materials reflect their performance in actual application. Researches of nonlinear properties of piezoceramics are committed to improve piezoelectric properties and to predict the change of material performance. In this study, a two-dimensional model established by using a circular distribution to quantify certain domain properties is focused. Self-adaptive differential evolution algorithm is proposed to optimize spontaneous polarization and spontaneous strain which effects the model a lot for a commercial-grade soft PZT (PIC151). An inverse problem solving is proposed to retrieve dielectric coefficient and piezoelectric coefficient. The optimal results and inverse problem solving values are compared with dielectric and butterfly curves by experiment in literature. The algorithm converges quickly and a good agreement is achieved between retrieved values and experiment results, which means the simulation can character piezoceramic materials properties well.

Predicting the effective response of bulk polycrystalline ferroelectric ceramics via improved spectral phase field methods

Understanding the electromechanical response of bulk polycrystalline ferroelectric ceramics requires scale-bridging approaches. Recent advances in fast numerical methods to compute the homogenized mechanical response of materials with heterogeneous microstructure have enabled the solution of hitherto intractable systems. In particular, the use of a Fourier-based spectral method as opposed to the traditional finite element method has gained significant interest in the homogenization of periodic microstructures. Here, we solve the periodic, electro-mechanically-coupled boundary value problem at the mesoscale of polycrystalline ferroelectrics in order to extract the effective response of barium titanate (BaTiO3) and lead zirconate titanate (PZT) under applied electric fields. Results include the effective electric hysteresis and the associated butterfly curve of strain vs. electric field for mean stress-free electric loading. Computational predictions of the 3D polycrystalline response show convincing agreement with our experimental electric cycling and strain hysteresis data for PZT-5A. In addition to microstructure-dependent effective physics, we also show how finite-difference-based approximations in the spectral solution scheme significantly reduce instability and ringing phenomena associated with spectral techniques and lead to spatial convergence with h-refinement, which have been major challenges when modeling high-contrast systems such as polycrystals.

Growth and characterization of nanocrystalline SrTiOx films: room temperature deposition using RF sputtering system in a pure argon environment

We report a comprehensive description of the structure, optical and electrical properties of as-deposited and annealed SrTiOx (STO) thin films. Nanocrystalline STO films were deposited on p-type Si (1 0 0) and UV-grade fused silica substrates by RF magnetron sputtering at room temperature in a pure argon environment. Well adhered and transparent films with very smooth surfaces were obtained. As-deposited films showed 70% transparency in the visible spectrum, transparency increased to 77% after annealing at 700 °C. The direct and indirect optical band gaps were found to be 2.88 eV and 2.44 eV, for as-deposited films. For annealed films, indirect band gap increased to 2.57 eV while the direct optical band gap value remained constant. Upon annealing, the refractive indices (n) of the films decreased from 2.36 to 2.32. Ag/STO/p-Si device structures were also fabricated and characterized by current–voltage, capacitance-voltage and dielectric measurements. The calculated values are compared with experimental data from the literature and discussed in terms of device performances. A butterfly loop-type hysteresis curve was observed for the voltage-dependent capacitance measurement in annealed thin film devices. Dielectric constants were calculated as 31.7 and 57.4 for as-deposited and annealed films at 100 kHz, respectively. Charge storage capacity was found to be >4.5 µC cm−2 for as-deposited and 3.5 µC cm−2 for annealed films.

Spin-wave instabilities of ferromagnetic nanowire stripes under parallel pumping

A microscopic (or Hamiltonian-based) theory is presented for the spin-wave instability thresholds in ferromagnetic nanowires under conditions of parallel pumping with a microwave field. A dipole-exchange Hamiltonian is employed in which the external magnetic field is either longitudinal or transverse to the length of the nanowire. This contrasts with most previous work on nonlinear spin waves which concentrate on situations where a macroscopic (or continuum) theory is appropriate. In nanowire stripes with lateral dimensions of order 100 nm or less, the quantization of the eigenmodes becomes modified due to strong spatial confinement and edge effects, making it appropriate to employ a microscopic dipole-exchange approach analogous to that used recently for ultrathin films. Numerical applications are presented for the dependence of the threshold microwave field amplitude for instability on the static applied field (the analog of the butterfly curves). The cases of longitudinal and transverse applied fields are found to lead to distinctly different behaviors, which are illustrated using EuS and permalloy as materials with different ratios of dipolar to exchange interactions. Structural effects due to the discrete spin-wave branches lead to structural aspects of the butterfly curves that are significantly modified compared with those for ultrathin films due to the edge modes in the nanowires.

Experimental and theoretical investigation of temperature-dependent electrical fatigue studies on 1-3 type piezocomposites

1-3 type piezocomposites are very attractive materials for transducers and biomedical application, due to its high electromechanical coupling effects. Reliability study on 1-3 piezocomposites subjected to cyclic loading condition in transducer application is one of the primary concern. Hence, this study focuses on 1-3 piezocomposites for various PZT5A1 fiber volume fraction subjected to electrical fatigue loading up-to 106 cycles and at various elevated temperature. Initially experiments are performed on 1-3 piezocomposites, in order to understand the degradation phenomena due to various range in amplitude of electric fields (unipolar & bipolar), frequency of applied electric field and for various ambient temperature. Performing experiments for high cycle fatigue and for different fiber volume fraction of PZT5A1 is a time consuming process. Hence, a simplified macroscopic uni-axial model based on physical mechanisms of domain switching and continuum damage mechanics has been developed to predict the non-linear fatigue behaviour of 1-3 piezocomposites for temperature dependent electrical fatigue loading conditions. In this model, damage effects namely domain pinning, frozen domains and micro cracks, are considered as a damage variable (ω). Remnant variables and material properties are considered as a function of internal damage variable and the growth of the damage is derived empirically based on the experimental observation to predict the macroscopic changes in the properties. The measured material properties and dielectric hysteresis (electric displacement vs. electric field) as well as butterfly curves (longitudinal strain vs. electric field) are compared with the simulated results. It is observed that variation in amplitude of bipolar electric field and temperature has a strong influence on the response of 1-3 piezocomposites.