Bulk Built-in Current Sensors Research Articles

PS-BBICS: Pulse stretching bulk built-in current sensor for on-chip measurement of single event transients

The bulk built-in current sensor (BBICS) is a cost-effective solution for detection of energetic particle strikes in integrated circuits. With an appropriate number of BBICSs distributed across the chip, the soft error locations can be identified, and the dynamic fault-tolerant mechanisms can be activated locally to correct the soft errors in the affected logic. In this work, we introduce a pulse stretching BBICS (PS-BBICS) constructed by connecting a standard BBICS and a custom-designed pulse stretching cell. The aim of PS-BBICS is to enable the on-chip measurement of the single event transient (SET) pulse width, allowing to detect the linear energy transfer (LET) of incident particles, and thus assess more accurately the radiation conditions. Based on Spectre simulations, we have shown that for the LET from 1 to 100 MeV cm2 mg−1, the SET pulse width detected by PS-BBICS varies by 620–800 ps. The threshold LET of PS-BBICS increases linearly with the number of monitored inverters, and it is around 1.7 MeV cm2 mg−1 for ten monitored inverters. On the other hand, the SET pulse width is independent of the number of monitored inverters for LET > 4 MeV cm2 mg−1. It was shown that supply voltage, temperature and process variations have strong impact on the response of PS-BBICS.

Detection of Transient Faults in Nanometer Technologies by using Modular Built-In Current Sensors

Soft error resilience is an increasingly important requirement of integrated circuits realized in CMOS nanometer technologies. Among the several approaches, Bulk Built-in Current Sensors (BBICS) offer a promising solution as they are able to detect particle strikes immediately after its occurrence. Based on this idea we demonstrate a novel modular BBICS (mBBICS) that tackles the main problems of these integrated sensors – area, leakage, and robustness. Simulations based on a predictive nanometer technology indicate competitive response times for high performance applications at the cost of 25 % area overhead and very low power penalty. Thereby, all simulated particle strikes that lead to transient faults could be detected. Additionally, reliability analysis proved the robustness of the proposed mBBICS against wide variations of temperature and process parameters.

A BICS-based strategy for mitigating the effects of single event transients on SAR converter

This paper presents a new strategy to mitigate the effects of single event transients (SETs) on the analog part of the Successive Approximation Register (SAR) Analog-To-Digital Converter (ADC). According to the mechanism of error, a series of bulk built-in current sensors (BICS) and D Flip-Flops constitutes a feedback control circuit, which is used to distinguish a negative effect of SETs on SAR ADC and produce related control signal. By sampling backup signal and canceling offset voltage of comparator, the imbalanced charge of capacitor array and storage capacitor of comparator due to a particle strike can be restored respectively. Meanwhile, SAR logic will repeat the comparison of the current step instead of reading the erroneous comparison result by shielding the edge of current clock signal. On the basis of this method, the fault is not propagated to the remaining conversions, thus substantially reducing the conversion error magnitude. In addition, this BICS-based technique can be combined with conventional radiation-hardened methods to achieve higher reliability. Finally, the circuit level fault injection simulation results demonstrate that this proposed method significantly mitigates influence of SETs on the analog part of the SAR ADC in 130 nm CMOS process.

Assessing body built-in current sensors for detection of multiple transient faults

Over the last few years, many architectures of body or bulk built-in current sensors (BBICSs) have been proposed to detect transient faults (TFs) in integrated circuits, all of them assessed through simulations in which only single TFs affect the circuit under run-time test. This work assesses and demonstrates the ability of a BBICS architecture in also detecting multiple and simultaneous TFs. Based on the classical double-exponential transient current model, multiple fault effects on a case-study circuit have been simulated with the injection of several current sources approximately representing the Gaussian distribution of a laser beam attack. Results show the BBICS architecture is able to detect multiple TFs simultaneously perturbing sensitive nodes of the case-study circuit.

Architectures of bulk built-in current sensors for detection of transient faults in integrated circuits

Today's integrated circuits are liable to operate under transient faults created either by radiation or malicious sources of perturbation. Among the many techniques for the detection of transient faults, Bulk Built-In Current Sensors (BBICS) present attractive low-cost and efficient features for the protection of circuits. This article provides a survey of published BBICS architectures and compares them with regard to their sensitivities in detecting transient faults. Moreover, a new dynamic BBICS architecture is introduced with improved detection sensitivity, negligible power consumption, and reduced area overhead.

Towards high-sensitive built-in current sensors enabling detection of radiation-induced soft errors

Soft error resilience is an increasingly important requirement of integrated circuits realized in CMOS nanometer technologies. Among the several approaches, Bulk Built-in Current Sensors (BBICS) offer a promising solution able to detect particle strikes immediately after its occurrence. Principal challenges for its wide application in common designs are area costs and robustness, both directly related to the sensor's sensitivity. Following this requirement, this work presents strategies enabling the design of high-sensitive BBICS. In detail, we are proposing three approaches based on gate voltage control, body biasing, and stack forcing that can be integrated in all state-of-the-art BBICS architectures. In order to verify the feasibility of this approaches, the proposed techniques have been integrated in a modular BBICS realized in a commercial 65nm technology. Simulation results indicate an increase of the detection sensitivity by up to factor 6, leading to 17% area overhead, response times around 1ns, a negligible power penalty, and high robustness against wide variations of temperature and process parameters.

A novel carbon nanotubefet based bulk built-in current sensor for single event upset detection

The continuous scaling down of circuits has resulted in the development of carbon nanotubes (CNT) which provides a better alternative of silicon. High device packing densities is one of the advantageous factors of CNTFET compared to CMOS technology. This paper describes the new bulk current based built-in current sensor (BBICS) for the detection of single event upset (SEU) in CNTFET SRAM with less number of transistors compared to previous designs. The advantage of it is that its ability to detect low ranges of micro-current. The complete circuit, both SRAM and Sensor are built with CNTFET. This also possesses the advantage of being used in the detection of negative current pulses with the addition of an inverter circuit. This circuit operates best for two different technology nodes. This built-in current sensor is connected to the bulk terminal of the CNTFET SRAM. PVT analysis and power dissipation analysis were done for the proposed circuit.

Exploration of Noise Impact on Integrated Bulk Current Sensors

Current CMOS (Complementary Metal Oxide Semiconductor) technologies show an increasing susceptibility to a rising amount of failure sources. This includes also radiation induced soft errors, which requires countermeasures on several design levels. Hereby, BBICS (Bulk Built-In Current Sensors) represent a promising approach on circuit level. However, it is expected that these circuits, like similar sensors measuring substrate effects, are strongly susceptible to substrate noise. The intention of this work is an in-depth noise analysis of representative bulk sensors based on extracted layout data. Thereby, several aspects are considered, like sensor activation thresholds, impact of the distance to the noise source, and noise generation by test circuits. Results indicate that already noise RMS level of 5 to 9 % of the supply voltage can lead to false detections, which are values in the same order of magnitude of noise generated by test circuits.

Impact of Total Ionizing Dose on Bulk Built-In Current Sensors with Dynamic Storage Cell

Integrated circuits operating in space and harsh radiation environments are subject to the progressive accumulation of Total Ionizing Dose (TID), as well as to Single Event Transients (SET) produced by single energetic particles. We designed Bulk Built-In Current Sensors with Dynamic Storage Cell (DynBICS) to detect SET induced by ionizing radiation in NMOS and PMOS transistors. In this work the impact of TID on a complementary pair of DynBICS circuits is studied. The DynBICS were manufactured in IBM 130 nm technology and proved to be resistant to TID effects up to the limit of 600 krad (Si). The total dose reached in the test campaign was 616 krad (Si) from a 60Co gamma source. The ability of the DynBICS to detect SET remained fairly stable, and the impact of the accumulated dose on the performance of the circuit is discussed in detail.

Soft Error Detection and Correction Technique for Radiation Hardening Based on C-element and BICS

Higher density of integration and lower power technologies are becoming more sensitive to soft errors caused by radiations. Not only memories and latches are being affected but also combinatorial circuits. Hardening by design techniques based on increasing the amount of charge representing the bit and redundancy techniques have been used over the years. However, what happens if the hardening is affected? Who guards the guardians? This brief proposes a system that acts as a single-event transient (SET) filter and as a checkpoint with self-healing properties to prevent SET propagation. This is achieved due to feedback using bulk built-in current sensors.

Improving the ability of Bulk Built-In Current Sensors to detect Single Event Effects by using triple-well CMOS

Bulk Built-In Current Sensors (bbicss) were introduced to detect the anomalous transient currents induced in the bulk of integrated circuits when hit by ionizing particles. To date, the experimental testing of only one bbics architecture was reported in the scientific bibliography. It reports an unexpected weakness in its ability to monitor nmos transistors. Based on experimental measures, we propose an explanation of this weakness and also the use of triple-well cmos to offset it. Further, we introduce a new bbics architecture well suited for triple-well that offers high detection sensitivity and low area overhead.

Simulation Evaluation of an Implemented Set of Complementary Bulk Built-In Current Sensors With Dynamic Storage Cell

This paper describes the design, the physical implementation, and the test procedure for a complementary pair of bulk built-in current sensors (Bulk-BICS) circuits, intended to detect single-event transients (SETs) induced by ionizing radiation on n- and p-type metal-oxide-semiconductor transistors. Electrical characterization of the prototype chip was performed, and the results are presented here. While not subjected to actual ionizing radiation, the performance of the manufactured integrated circuit is evaluated from its response to electrical test signals.

Sensitivity tuning of a bulk built-in current sensor for optimal transient-fault detection

Bulk Built-In Current Sensors (BBICSs) are able to detect anomalous transient currents induced in the bulk of integrated circuits when hit by ionizing particles. This paper presents a new strategy to design BBICSs with optimal transient-fault detection sensitivity while keeping low both area and power overheads. The approach allows increasing the detection sensitivity by setting an asymmetry in the flipping ability of the sensor’s latch. In addition, we introduce a mechanism to tune the delay of the bulk access transistors that improves even more the BBICS detection sensitivity. The proposed design strategy offers a good compromise between fault detection sensitivity and power consumption; moreover it makes feasible the use of several CMOS processes.

Novel transient-fault detection circuit featuring enhanced bulk built-in current sensor with low-power sleep-mode

This work presents a novel circuit for detecting transient faults in combinational and sequential logic. The detection mechanism features a built-in current sensor connected to the bulks of the monitored logic. The proposed circuit was optimized in terms of power consumption and enhanced with low-power sleep-mode. In addition, a calibration method for bulk built-in current sensors is presented. Overhead results indicate an increase of only 15% in power consumption which represents an improvement of factor 7 compared to similar existing sensors.

Using Bulk Built-in Current Sensors to Detect Soft Errors

Connecting a built-in current sensor in the design bulk of a digital system increases sensitivity for detecting transient upsets in combinational and sequential logic. SPICE simulations validate this approach and show only minor penalties in terms of area, performance, and power consumption