Switching Buck Converter Research Articles

A Multitime-Scale Analytical Model of ZVS Buck Converter

This paper presents a modeling method to build the complete and accurate multi-time-scale analytical model for low-voltage eGaN HEMTs based zero voltage switching (ZVS) Buck converter with consideration of parasitic inductors, nonlinear junction capacitors and nonlinear transconductance, etc. The switching steady-state modes and switching transient modes are discussed in detail based on their corresponding equivalent circuits. The state equations of each mode are solved by MATLAB software to obtain the key operating waveforms throughout one switching cycle. Moreover, the established switching steady-state model and switching transient model are numerically merged together through continuous state variables, and then the multi-time-scale model for stable operation is formed based on the iterative method. The waveforms and switching energy losses predicted by the model within one switching cycle are compared with the experimental results, respectively, to verify the accuracy of the model. In the end, the dead time is optimized based on the proposed model, and the optimization result is verified to be effective in reducing the switching energy loss through experiment.

케이블 임피던스 측정 및 검증 방법

This paper present detail description on determining cable parameters of an electrical power cable. A method known as short-open method is employed in this work where the series parameters of a two wire cable are determined by shorting the end of the cable while the shunt parameters are extracted by opening the end terminal of the cable. Network analyzer and LCR meter are utilized in carrying out the short-open method. The measured parameters from both network analyzer and the LCR meter are compared and verified by finding the propagation delay of the cable through an experiment. The propagation delay value from the experiment is compared to a propagation delay value computed from the primary parameters to check for accuracy. The experimental setup constituted of a DSP board, 30kHz buck converter, 150V DC power supply and a 16m power cable. The 16m cable was selected because it was much easier to manage in the laboratory. The cable parameters were extracted at 30kHz frequency which is the same as the buck converter switching frequency. At 30kHz a propagation delay of 84ns was obtained for LCR meter while network analyzer had 83ns. Propagation delay from using the buck converter gave a propagation delay of 84ns which is the same as computed propagation delay value from LCR meter.

Integrated Inductor Design for a Highly Compact Embedded Battery Charger

An integrated inductor for a highly compact embedded battery charger is designed in this article. A zero-voltage switching (ZVS) buck converter is the selected topology to achieve high power density. ZVS is achieved by sizing the inductor based on energy balance and introducing the <inline-formula><tex-math notation="LaTeX">$k$</tex-math></inline-formula> factor. A novel four-leg magnetic core structure is proposed as the integrated inductor. By introducing a modified parameter <inline-formula><tex-math notation="LaTeX">$\alpha _{\mathrm{eff}}$</tex-math></inline-formula> to the improved generalized Steinmetz equation method, the optimal switching frequency for core losses can be found. From the constructed inductor model and semiconductor loss calculation, the design tradeoff and optimization is analyzed. The optimal <inline-formula><tex-math notation="LaTeX">$f_{\mathrm{sw}}$</tex-math></inline-formula> is found to be around 2 MHz, which is when the performance factor for the core material peaks. As a proof of concept, a highly compact prototype, featuring stacked printed circuit board solution, with 16.2 &#x00D7; 19.2 &#x00D7; 6 mm<inline-formula><tex-math notation="LaTeX">$^{3}$</tex-math></inline-formula> dimension is built. The input voltage ranges from 6 to 12 V, and the converter is capable of delivering up to 10 A at the 4-Voutput. Converter peak efficiency of 96&#x0025; is achieved, and the inductor design has a power density of 113.6 W/cm<inline-formula><tex-math notation="LaTeX">$^{3}$</tex-math></inline-formula>. This shows improvement over several state-of-the-art designs. This article is accompanied by a video demonstrating the flux distribution in the magnetic core over the switching period.

Efficient RF-PA Two-Chip Supply Modulator Architecture for 4G LTE and 5G NR Dual-Connectivity RF Front End

This article presents a two-chip supply modulation architecture for efficient RF power amplification using a fully switched-mode supply modulator (SM) and a linear-assisted hybrid SM to support simultaneous transmission on long-term evolution (LTE) and 5G bands. The designed fully switched-mode SM consists of a fast switching buck converter and a slow switching buck converter, and it achieves 88.2% peak efficiency and a low receiver (RX) band noise of −140 dBm/Hz at the SM output. The fully switched-mode SM tracks the envelope of LTE 5-/10-/20-MHz signals with the average switching frequencies of 50/70/120 MHz, respectively. The ET-PA measured using the fully switched-mode SM and LTE band-3 power amplifier module integrated duplexer (PAMiD) saves the dc power consumption of 320 mW at a 23-dBm output power compared to an average power tracking (APT)-PA. The designed 5G new radio (NR) SM consisting of a class-AB linear amplifier (LA) and an interleaved three-level buck–boost converter provides a 160-MHz 3-dB bandwidth to track the envelope of a 100-MHz NR signal. The measured peak SM efficiency is 84.1% at a 3.53-W output power. The measured ET-PA with 5G NR SM and 5G n77 PAMiD achieves an ACLR of −36.9 dBc at a 27.45-dBm output power with a 6-dB peak-to-average-power ratio DFT-spread-OFDM NR 100-MHz quadrature phase shift keying (QPSK) signal. It saves the dc power consumption of 950 mW at a 27-dBm output power compared to APT-PA. An optimal RF power amplifier (RF-PA) supply deployment using the two SMs efficiently supports multiple RF-PA loads while satisfying the dual-transmission requirements of E-UTRAN new radio dual-connectivity (EN-DC) and 5G 100-MHz ET operation. The fully switched-mode SM is implemented in a 130-nm CMOS process, and the die size is 4.0 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The 5G NR SM is implemented in a 90-nm CMOS process, and the die size is 6.75 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

An Interleaved Switching Buck Converter with Soft Switching Condition

An Interleaved Switching Buck Converter with Soft Switching Condition

PWM-Based Finite-Time Tracking of Switched Buck Power Converters

In this paper, the problem of finite-time tracking is investigated for switched buck power converters based on the pulse width modulation (PWM) technique. For the continuous model, an equivalent continuous controller is solved by the backstepping technique, such that all signals are finite-time stable. PWM-based finite-time tracking with the equivalent control input is proposed for the switched buck converter, such that the tracking error converges to an arbitrarily small neighborhood of the origin in finite time, and the origin of the closed-loop system is practically finite-time stable. Simulation results are given to demonstrate the effectiveness of the proposed schemes.

Soft Switching of Buck Converter with Coupled Inductor

Buck converters are step down dc-dc converters to convert fixed dc voltage to controlled dc voltage. Generally, hard switching is used to control dc output voltage of buck converter. But this approach leads to high switching losses. In this paper, we propose a Soft Switching of Buck converter with Coupled Inductor, to reduce the switching losses. The circuit configuration has been designed with minimum components for realizing the soft switching. The Simulation of Soft switching of buck converter with coupled inductor circuit has been carried out using MATLAB/SIMULINK and the results obtained.

PWM-Based Adaptive Trajectory Tracking of Switched Buck Power Converters

Based on pulse width modulation (PWM) technique, adaptive trajectory tracking of switched Buck power converters with parameter uncertainty is investigated in this article. By the aid of the backstepping technique, an equivalent continuous adaptive tracking controller is designed to guarantee the asymptotic stability of the closed-loop error continuous system. For the switched Buck converter with unknown parameters, PWM-based adaptive tracking with the equivalent adaptive continuous control input is proposed such that the closed-loop error digital system is practically asymptotically stable, and the tracking error converges to an arbitrarily small neighborhood of the origin. Simulation results are shown to illustrate the effectiveness of the proposed new control schemes.

Soft Switching Bidirectional Converter for Reflex Charger With Minimum Switches

In this article, a new soft switching bidirectional dc–dc converter for battery charger application based on reflex charge technique is proposed. The proposed bidirectional dc–dc converter applies flyback converter to provide negative current pulses for reflex charge method while providing zero-voltage switching (ZVS) for the buck converter switch which is used to control charging current. The flyback converter switch is also soft switched. Flyback converter switch operates under zero-current switching (ZCS) turn- on and ZVS turn- off conditions. The proposed bidirectional converter applies only two switches to implement a fully soft switched pulsewidth modulation (PWM) bidirectional converter. Hence, the proposed topology provides a fully soft switched bidirectional converter with minimum number of switches using PWM control method. The proposed converter is implemented, analyzed, and experimental results are presented. The experimental results verify the theoretical analysis presented in the article. Efficiency comparison performed shows proper efficiency of proposed converter while applying minimum number of switches.

Improvement of maximum power point tracking (MPPT) efficiency using grey wolf optimization (GWO) algorithm in photovoltaic (PV) system

Photovoltaics are becoming very popular, because the system does not produce pollution and can be installed anywhere, including in remote areas. However, in the use of photovoltaic found some common problems, it is difficult to get maximum and stable power. Therefore, to overcome these problems using Maximum Power Point Tracking method. On a photovoltaic system it is necessary to determine which converter will be used to increase the power output of the photovoltaic. The design of MPPT using gray wolf optimization algorithm that can track the output power quickly and reduce the oscillation in photovoltaic system. The result of the maximum power tracker using the gray wolf optimization algorithm is better than the incremental conductance algorithm of up to 0,4 s. Converters are used using soft - switching buck converter method to overcome the power losses that often arise in PV systems. The result of power output using soft-switching buck converter is greater than using buck converter. When comparing the efficiency of photovoltaic systems using the gray wolf optimization algorithm increases from using the incremental conductance algorithm.

Design of a Wideband Constant-on-Time Control Envelope Amplifier for Wireless Basestation Envelope Tracking Power Amplifiers

Envelope tracking (ET) technology provides the potential for achieving high efficiency in power amplifiers (PAs) with high peak-to-average ratio (PAR) signals. Envelope amplifiers with high fidelity, high efficiency, and wide bandwidth are critical components for the widespread application of envelope tracking. This paper presents the design of a linear-assisted switching buck converter for use in an envelope amplifier. To effectively leverage the high efficiency of buck converters and the wide bandwidth capabilities of linear amplifiers, a parallel combination of these two devices is employed in this work. A novel current-sense constant-on-time (COT) controller is proposed to coordinate this hybrid power supply. The combination mainly enables the switching converter to provide the average power required by the PA with high efficiency, while the wideband linear amplifier provides a wide range of dynamic voltages. The technique improves the efficiency of the envelope amplifier, especially for applications requiring high PAR with wider bandwidth signals. Measurement of the envelope amplifier showed an efficiency of approximately 77% with 10 W output power using LTE downlink signals. The overall ET system was demonstrated by using a GaN PA. The measured average power-added efficiency of the amplifier reached above 45% for an LTE modulated signal with 20 MHz bandwidth and PAR of 8.0 dB, at an average output power of 5 W and gain of 10.1 dB. The measured normalized RMS error is below 2.1% with adjacent channel leakage ratio of -48 dBc at an offset frequency of 20 MHz.

High-Resolution DPWM For DC-DC Buck Converter using Sigma-Delta Modulation Techniques

in this paper, a 13-bit hybrid DPWM structure which consists of a second-order Σ-∆ modulator having 6-bit resolution and a counter-comparator block with the 7-bit resolution is designed. The Σ-∆ modulator is based on error feedback concept which increases the effective resolution of DPWM by 6-bit and at the same time reduces clock power requirements and noise disturbances. The timing simulation waveforms of the designed DPWM architecture are verified and PWM pulses of the desirable duty cycle are generated. The Σ-Δ modulator based DPWM is used to drive the power MOSFETs of switching buck converter and Inductor current output voltage waveforms are observed. Ripple quantities of 17.5% and 0.07% are obtained for Inductor current and output voltage which are within the upper limits of 20% and 1% respectively. The steady value of the output voltage obtained is 0.99955V. The result obtained validates the Hybrid DPWM design.

An All-Digital Low-Noise Switching DC–DC Buck Converter Based on a Multi-sampling Frequency Delta-Sigma Modulation with Enhanced Light-Load Efficiency

This paper presents an all-digital technique to control DC–DC switching buck converters for noise-sensitive low-power applications. The controller is designed based on a multi-sampling frequency digital delta-sigma modulator, whose sampling frequency is adjusted according to the load current. The proposed controller demonstrates the efficiency performance of the digital pulse-width modulation controller counterpart at heavy load while reducing output spikes by 37 dB without any additional processing. At light load, the controller scales down the switching frequency by scaling down delta-sigma modulator sampling frequency. Consequently, light-load efficiency is improved by more than 40% compared to its fixed frequency counterpart. In particular, the proposed solution adopts a unity-gain signal-transfer function delta-sigma modulator that avoids excess phase in the control loop. The proposed technique is compact, scalable and compatible with the standard digital CMOS implementation. Experimental and simulation results characterizing the proposed solution are provided.

Improved active clamped ZVS buck converter with freewheeling current transfer circuit

An improved active clamped zero-voltage switching (ZVS) buck converter with freewheeling current transfer circuit is proposed in this study. Comparing with the traditional active clamped ZVS buck converter, the current of freewheeling diode, the clamping voltage and duty cycle loss are all halved. The reduced current and voltage stress will result in high reliability and efficiency. Moreover, the reduced duty cycle loss will result in a low input voltage. In the improved converter, a small inductor and an auxiliary diode are added to build the freewheeling current transfer circuit. The operating principle of the improved converter is described. The analysis and design considerations of the proposed converter are given. A 1.2 kW prototype converter is set up to validate the improved converter.

Series-Loaded Resonant Converter DC-DC Buck Operating for Low Power

This paper presents the functions of Series-Loaded Resonant Converter (SLRC). Series Loaded Resonant DC-DC converter is a type of soft-switching topology widely known for providing improved efficiency. Zero voltage switching (ZVS) buck converter is more preferable over hard switched buck converter for low power, high frequency DC-DC conversion applications. Zero Voltage switching techniques will be used to improve the efficiency of current and voltage at the series loaded half-bridge rectifier. The results will be described from PSIM simulation, Programming of MATLAB calculation and hardware testing.

Package-embedded spiral inductor characterization with application to switching buck converters

The design and characterization process of a package-embedded spiral inductor is investigated in this paper via comprehensive electromagnetic simulations. A realistic, multi-layer flip-chip package is considered and modeled in a commercial, full wave electromagnetic simulator. At constant package area, parasitic resistance of a given inductance is minimized. The applicability of the proposed package-embedded spiral inductor to a DC-DC switching buck converter is demonstrated. The flexibility of the package is exploited to obtain a relatively high inductance, enabling a reduced switching frequency. Lower switching frequency minimizes the dynamic loss, thereby increasing the power efficiency. An interleaved multi-phase buck regulator with an array of package-embedded spiral inductors is developed. The extracted layout of the overall circuit is evaluated for performance and primary characteristics. The converter produces an output voltage of 0.9V from 1.2V input voltage while supplying a load current of 1A. Power efficiency of approximately 89% is achieved with 3% output ripple voltage.

An efficient soft switching buck converter scheme for charging lead acid battery from PV source

In this paper, a high efficiency soft switched two channel interleaved buck converter scheme for charging a lead acid battery bank is presented. This scheme uses the incremental conductance (INC) maximum power point tracking (MPPT). An internal model control system (IMC) is used for controlling the charging of the battery in the constant current mode, constant voltage mode, and trickle mode depending upon the state of charge (SOC) of the battery. Various subsystems of simulation and the results are presented. The simulation results are validated experimentally by using a 125 W photovoltaic (PV) panel unit and a 36 A H lead acid battery. The real time experiment is performed under climatic conditions of Madurai which is a city located in Tamil Nadu, India. The result of the proposed system has been compared against the Perturb and observe MPPT scheme. The results of both simulation and the experiment reveal that the proposed soft switched, internal model controller incorporated INC scheme of MPPT offers more close tracking of the PV power and is more efficient.

A New Application of the Multi-Resonant Zero-Current Switching Buck Converter: Analysis and Simulation in a PMSG Based WECS

A new application of the three-phase buck-resonant converter is presented in this paper. It is shown that the analyzed converter is suitable to operate as the rectifier stage in low power wind energy conversion systems (WECS) based on permanent magnet synchronous generators (PMSG) with variable wind speed. As main features, it presents a single controlled switch, simple implementation and control, and operates with a high power factor and low harmonic distortion over all wind speed ranges. The converter topology, its design equations and its operation are presented, as well as the simulation results of the PMSG based conversion system. From the analysis carried out in the paper it is concluded that the converter is indicated to be employed in distributed generation and hybrid systems where wind generation is associated with other sources.

A Rapid Switch Bridge Selection Method for Fully Integrated DCDC Buck Converters

This letter presents a method for optimum selection of synchronous buck converter switch bridge topology and devices in the CMOS technology of choice. The comparative method targets maximum power efficiency, and it assumes an application where the dcdc converter is on the same IC as the load with a known constant operating point. As its principal idea, the method circumvents the need for exhaustive comparative simulation work to cover the vast design space of available MOS device and cascode/noncascode topology combinations. Instead, the method narrows the space by using a set of basic parameters to approximate the best combination. The result, thus, provides sharp focus for subsequent detailed design and topology-dependent optimization. The method is illustrated by comparing its results to simulations of synchronous 3.31.65-V buck converters in 45 and 65-nm CMOS with core, I/O, and high-voltage devices.

Online Inverter Fault Diagnosis of Buck-Converter BLDC Motor Combinations

Brushless dc (BLDC) motors are commonly used in space application for its simplicity and high reliability. The fault-tolerant control (FTC) of the motor is important for its continuous operating capacity even under the faulty situation. The fault diagnosis should be achieved in advance in order to implement the FTC strategy. This paper proposes an online model-based inverter fault diagnosis method for three-phase full bridge inverter with buck dc-dc converter based on the high-speed BLDC motor with low inductance and nonideal back electromotive force in a magnetically suspended control moment gyro. The method can detect and identify both open-circuit and short-circuit damages of single switch in buck converter or three-phase full bridge. Also, protective measures are proposed to isolate the fault and avoid the secondary fault. Both simulation and experimental results are taken out to prove the validity and effectiveness of the proposed fault diagnosis method.