Filter design is very important in communication and signal processing applications. This paper proposes the design of high speed area efficient halfband FIR filter structures. For this halfband filters only odd coefficients are considered. Conventional halfband, desensitized and further desensitized halfband FIR filters are the three halfband FIR filters considered here with order 10 and 22. Conventional halfband filters have hk coefficients (h0,h1,h3,h5,….). For desensitized halfband FIR filters the ak coefficients (a0, a1, a2,…) are derived from hk coefficients and for further desensitized halfband FIR filter the bk coefficients(b0,b1,b2,…) are further derived from hk coefficients. This can be exploited in the filter-design process to yield halfband FIR filters with reduced complexity, leading to lower area and higher operating speeds for further desensitized halfband FIR filters. For the filter design modified booth multipliers and ripple carry adders are used to get improved performance. The simulation is done using Verilog and the analysis and synthesis is done with Altera, cyclone II family and the results are reported. The hardware implementation is done using Altera DE2 Board. The results shows that, less area and high speed is achieved with further sensitized halfband filter structures when compared to the other two structures.