Boolean Minimization Research Articles

Boolean Minimization in Social Science Research

Besides an increase in the number of empirical applications, the widening landscape of tailored computer programs attests to the success of qualitative comparative analysis (QCA) as a social research method. Users now have the choice between three graphical user interface (GUI) and three command line interface (CLI) solutions. In addition to different functional foci, each program possesses several technical particularities, some of which the vast majority of end users remain unaware of. Since these particularities may influence results and in turn substantive conclusions, this review is a timely undertaking. More specifically, we compare the two most common GUIs fs/QCA and Tosmana as well as the CLI QCA. By reanalyzing data from a sociological study on rural grassroots associations in Norway, major differences and similarities with respect to truth table construction, minimization algorithms, and prime implicant chart management are illustrated.

A mathematical approach to the boolean minimization problem

Any minimization problem involves a computer algorithm. Many such algorithms have been developed for the boolean minimizations, in diverse areas from computer science to social sciences (with the famous QCA algorithm). For a small number of entries (causal conditions in the QCA) any such algorithm will find a minimal solution, especially with the aid of the modern computers. However, for a large number of conditions a quick and complete solution is not easy to find using an algorithmic approach, due to the extremely large space of possible combinations to search in. In this article I will demonstrate a simple alternative solution, a mathematical method to obtain all possible minimized prime implicants. This method is not only easier to understand than other complex algorithms, but it proves to be a faster method to obtain an exact and complete boolean solution.

Compression of small text files

This paper suggests a novel compression scheme for small text files. The proposed scheme depends on Boolean minimization of binary data accompanied with the adoption of Burrows-Wheeler transformation (BWT) algorithm. Compression of small text files must fulfil special requirements since they have small context. The use of Boolean minimization and Burrows-Wheeler transformation generate better context information for compression with standard algorithms. We tested the suggested scheme on collections of small and medium-sized files. The testing results showed that proposed scheme improve the compression ratio over other existing methods.

Logic Minimization as an Efficient Means of Fuzzy Structure Discovery

Established methods of Boolean minimization have previously unseen potential as an efficient and unrestricted means of fuzzy structure discovery, becoming particularly useful within a design methodology for the automatic development of fuzzy models. Traditionally used in digital systems design, logic minimization tools allow us to exploit the fundamental links between binary (two-valued) and fuzzy (multivalued) logic. In this paper, we show how logic optimization plays an integral role in a two-phase fuzzy model design process. Adaptive logic processing is realized as the discovered Boolean structures are augmented with fuzzy granules and then refined by adjusting connections of fuzzy neurons, helping to further capture the numeric details of the target systems behavior. Accurate and highly interpretable fuzzy models are the result of the entire development process.

A CONFIGWARE APPROACH FOR HIGH-SPEED PARALLEL ANALYSIS OF GENOMIC DATA

Many problems in bioinformatics represent great computational challenges due to the huge amount of biological data to be analyzed. Reconfigurable systems can offer custom-computing machines, with orders of magnitude faster than regular software, running in general-purpose processors. We present a methodology for using a configware system in an interesting problem of molecular biology: the splice junction detection in eukaryote genes. Decision trees were developed using a benchmark of DNA sequences. They were converted into logical equations, simplified, and submitted to a Boolean minimization. The resulting circuit was implemented in reconfigurable parallel hardware and evaluated with a five-fold cross-validation procedure, run in a second level of parallelism. The average accuracy achieved was 90.41% and it takes 18 ns to process each data record with 60 nucleotides.

Stability criterion for a lexicographic Boolean optimization problem

A vector Boolean sequential minimization problem for absolute values of linear functions is considered. Necessary and sufficient condition for stability of this type that is a discrete analogue of the upper Hausdorff semicontinuity of a point-to-set mapping is established. This mapping associates a set of lexicographic optima with each set of problem parameters.

Fuzzy modelling through logic optimization

This study proposes a new logic-driven approach to the development of fuzzy models. We introduce a two-phase design process realizing adaptive logic processing in the form of structural and parametric optimization. By recognizing the fundamental links between binary (two-valued) and fuzzy (multi-valued) logic, effective structural learning is achieved through the use of well-established methods of Boolean minimization encountered in digital systems. This blueprint structure is then refined by adjusting connections of fuzzy neurons, helping to capture the numeric details of the target system’s behavior. The introduced structure along with the learning mechanisms helps achieve high accuracy and interpretability (transparency) of the resulting model.

Optimization of NULL convention self-timed circuits

Self-timed logic design methods are developed using Threshold Combinational Reduction ( TCR) within the NULL Convention Logic (NCL) paradigm. NCL logic functions are realized using 27 distinct transistor networks implementing the set of all functions of four or fewer variables, thus facilitating a variety of gate-level optimizations. TCR optimizations are formalized for NCL and then assessed by comparing levels of gate delays, gate counts, transistor counts, and power utilization of the resulting designs. The methods are illustrated to produce (1) fundamental logic functions that are 2.2–2.3 times faster and require 40–45% fewer transistors than conventional canonical designs, (2) a Full Adder with reduced critical path delay and transistor count over various alternative gate-level synthesis approaches, resulting in a circuit with at least 48% fewer transistors, half as many gate delays to generate the carry output, and the same number of gate delays to generate the sum output, as its nearest competitors, and (3) time, space, and power optimized increment circuits for a 4-bit up-counter, resulting in a throughput-optimized design that is 14% and 82% faster than area- and power-optimized designs, respectively, an area-optimized design that requires 22% and 42% fewer transistors than the speed- and power-optimized designs, respectively, and a power-optimized design that dissipates 63% and 42% less power than the speed- and area-optimized designs, respectively. Results demonstrate support for a variety of optimizations utilizing conventional Boolean minimization followed by table-driven gate substitutions, providing for an NCL design method that is readily automatable.

Knowledge Discovery with Second-Order Relations

This paper presents an induction technique that discovers a set of classification rules, from a set of examples, using second-order relations as a representational model. Second-order relations are database relations in which tuples have sets of atomic values as components. Using sets of values, which are interpreted as disjunctions, provides compact representations that facilitate efficient management and enhance comprehensibility. The second-order relational framework is based on theoretical foundations that link relational database theory, machine learning, and logic synthesis. The rule induction technique can be viewed as a second-order relation compression problem in which the original relation, representing training data, is transformed into a second-order relation with fewer tuples by merging tuples in ways that preserve consistency with the training data. This problem is closely related to two-level Boolean function minimization in logic synthesis. We describe a rule-mining system, SORCER, and compare its performance to two state-of-the-art classification systems: C4.5 and CBA. Experimental results based on the average of error rates ove 26 data sets show that SORCER, using a simple compression scheme, outperforms C4.5 and is competitive to CBA. Using a slightly more sophisticated compression scheme, SORCER outperforms both C4.5 and CBA.

A Boolean minimization procedure using the variable-entered Karnaugh map and the generalized consensus concept

Both the conventional Karnaugh map (CKM) and the variable-entered Karnaugh map (VEKM) are powerful manual tools that have many pictorial and pedagogical advantages. However, while the CKM is suitable only for small-sized problems, the VEKM can handle more variables and hence can be used for a variety of mediumsized applications. This paper presents an advanced and further improved VEKM procedure that aims at obtaining most, if not all, of the irredundant disjunctive forms of an incompletely-specified switching function (ISSF). This procedure differs from previous ones in two respects. First, it is a rather elaborate one employing the concept of the generalized consensus of a set of terms. Second, it uses a more systematic and more precise two-pass strategy that is more likely to capture minor details in the intrinsic structure of the ISSF under consideration. This procedure is intended as a supplement rather than a replacement of more powerful algorithms that have computer implementations but are too complicated to have some graphical insight for the user. Two detailed examples are given to illustrate the rules and steps of the new procedure and to demonstrate its efficiency and power.

Practicing Coercion

When do coercive threats succeed or fail? Does success depend on a uniform set of necessary conditions or do core prerequisites vary depending on context? If prerequisites vary, are some combinations more likely than others to lead to success or provoke challenges? The evidence to date is far from definitive. Critics cite proof from comparative case studies that rational deterrence has failed as a strategy and theory, whereas proponents have compiled an equally impressive body of material to support the same theory. Because each side offers compelling reasons to accept its respective, often contradictory, interpretations of events in relevant crises, the debate over deterrence is not likely to be resolved solely with reference to historical records. This article reevaluates the “crucial” evidence put forward by Lebow and Stein in what has become the most widely cited critique of rational deterrence theory. Viewed through the prism of necessity and sufficiency, their data produce stronger support for the theory's core hypotheses than corresponding evidence compiled by proponents. The author develops this argument further by applying Boolean logic and set theory to data compiled by Huth and Russett and Lebow and Stein. Boolean minimization techniques are used to derive models from competing interpretations of behavior in these cases, which are then compared and evaluated in terms of the theory's predictions.

Assessment of boolean minimization in symbolic empirical learning

We report research on the assessment of Boolean minimization in symbolic empirical learning. We view training examples as logical expressions and implement Boolean Minimization (BM) heuristics to optimize input and to learn symbolic knowledge rules. We base our work on a B M learning system called B M L. B M L includes three components : a preprocessing, a B M, and a postprocessing component. The system incorporates Espresso-II, a popular system in very large scale integration design. The preprocessing and postprocessing components include utilities that support preparation of training exampleson the one hand and assessment of learned output on the other. We test B M L using 10 different domains and compare performance with C4 . 5 , AQ15 , NewId , and CN2 using classification accuracy and rule quality statistics. We conclude by reviewing results and by discussing areas for future research .

Lossless and lossy image compression using boolean function minimization

A novel approach for lossless as well as lossy compression of monochrome images using Boolean minimization is proposed. The image is split into bit planes. Each bit plane is divided into windows or blocks of variable size. Each block is transformed into a Boolean switching function in cubical form, treating the pixel values as output of the function. Compression is performed by minimizing these switching functions using ESPRESSO, a cube based two level function minimizer. The minimized cubes are encoded using a code set which satisfies the prefix property. Our technique of lossless compression involves linear prediction as a preprocessing step and has compression ratio comparable to that of JPEG lossless compression technique. Our lossy compression technique involves reducing the number of bit planes as a preprocessing step which incurs minimal loss in the information of the image. The bit planes that remain after preprocessing are compressed using our lossless compression technique based on Boolean minimization. Qualitatively one cannot visually distinguish between the original image and the lossy image and the value of mean square error is kept low. For mean square error value close to that of JPEG lossy compression technique, our method gives better compression ratio. The compression scheme is relatively slower while the decompression time is comparable to that of JPEG.

Extending Quine-McCluskey for Exclusive-Or logic synthesis

Various forms of Boolean minimization have been used within electronic engineering degrees as a key part of the syllabus. Typically, Karnaugh maps and Quine-McCluskey methods are the principal exhaustive search techniques for digital minimization at the undergraduate level as they are easy to use and simple to understand. Despite the popularity of these methods, they are not well suited to typical digital circuits. Simple examples of such circuits are parity, adders, gray code generators, and so on. The common factor among these is the Exclusive-Or logic gate. This problem is exacerbated by the increasing importance of Exclusive-Or in modern design. This paper proposes an extension to the Quine-McCluskey method which successfully incorporates Exclusive-Or gates within the minimization process. A number of examples are given to demonstrate the effectiveness of this approach. This technique is easy to master as it can be considered to be an extension to the Quine-McCluskey method.

An enhanced two-level Boolean synthesis methodology for fuzzy rules minimization

A new methodology for the minimization of a given set of fuzzy rules is presented. It is based on a novel mapping of fuzzy relations on Boolean functions and exploits existing Boolean synthesis algorithms. In this mapping each fuzzy membership predicate is translated into a Boolean variable and proper constraints on Boolean manipulations are added to guarantee fuzziness translation. The formal consistency of the approach depends on a fuzzy semantic which easily generalizes most of the existing models, granting broad applicability to the suggested procedure. The applicability of an enhanced two-level Boolean minimizer is demonstrated, and the technique is applied to the fuzzy identification of nonlinear systems, consistently reducing the number of rules and easing application of further optimization interventions. >

Exact algorithms for output encoding, state assignment, and four-level Boolean minimization

A novel minimization procedure of prime implicant generation and covering that operates on symbolic outputs, rather than binary-valued outputs, is proposed for solving the output encoding problem. An exact solution to this minimization problem is also an exact solution to the encoding problem. While this covering problem is more complex than the classic unate covering problem, a single logic minimization step replaces O(N-factorial) minimizations. The input encoding problem can be exactly solved using multiple-valued Boolean minimization. An exact algorithm is presented for state assignment by generalizing the proposed output encoding approach to the multiple-valued input case. Four-level Boolean minimization entails finding a cascaded pair of two-level logic functions that implement another logic function, such that the sum of the product terms in the two cascaded functions or truth tables is minimum. Four-level Boolean minimization can be formulated as an encoding problem and solved exactly using the proposed algorithms. Preliminary experimental results are presented which indicate that this approach is significantly more efficient than exhaustive search. Computationally efficient heuristic approaches based on the exact algorithms are proposed for output encoding, state assignment, and four-level Boolean minimization. >

An algorithm for identifying and selecting the primed implicants of a multiple-output Boolean function

A multiple-output Boolean minimization procedure is presented that generates a minimum cover with computational efficiency by extending the directed search algorithm to the multiple-output case. This procedure is applicable to manual execution as well as to automated execution, and to both conventional two-level gating structures and programmable logic arrays (PLAs).< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A Minimizing Algorithm for Sum of Disjoint Products

This paper describes a minimizing version of the Abraham sum-of-disjoint products (sdp) algorithm, called the Abraham-Locks-Revised (ALR) method, as an improved technique for obtaining a disjoint system-reliability formula. The principal changes are: 1) Boolean minimization and rapid inversion are substituted for time-consuming search operations of the inner loop. 2) Paths and terms are ordered both according to size and alphanumerically. ALR reduces the computing cost and data processing effort required to generate the disjoint system formula compared to the seminal 1979 Abraham paper, and obtains a shorter formula than any other known sdp method. Very substantial savings are achieved in processing large paths of complex networks.

DALLAS: Design automation language for logic array structures

This paper presents the design language DALLAS set up for the development of a control unit of a processor implemented in a single VLSI whose size is approximately 200,000 transistors. The processor is a finite state machine and its control unit (70% of the silicon area) has a very large AND-OR network implemented with PLA's. Within the present tool, processor control and operation functions are specified in a powerful high level language, validated and translated into boolean logic and then submitted to boolean minimization. With regard to PLA implementation on silicon, efficient topological minimization is achieved by means of a special folding technique optimized to the specific finite state machine matrix morphology. A 30% reduction of the PLA's active area has been obtained with obvious benefits both in yields and performance.

Global Flow Analysis in Automatic Logic Design

This correspondence concerns applications of optimization techniques based on global flow analysis to the automated design of logic. Previous optimization work on logic design has relied primarily on either local transformations on the circuit graph or on the use of two-level Boolean minimization. Our methods involve linear time algorithms which extend the scope of local optimizations to the entire design. Their use, in some cases, has resulted in a reduction in gate count, in improved control over path length, and in better detection and elimination of redundancy.