Boolean Circuits Research Articles

Information Flows, Graphs and their Guessing Numbers

Valiant's shift problem asks whether all $n$ cyclic shifts on $n$ bits can be realized if $n^{(1+\epsilon)}$ input output pairs ($\epsilon < 1$) are directly connected and there are additionally $m$ common bits available that can be arbitrary functions of all the inputs. If it could be shown that this is not realizable with $m = O({n\over \log \log n})$ common bits then a significant breakthrough in Boolean circuit complexity would follow. In this paper it is shown that in certain cases all cyclic shifts are realizable with $m=(n- n^{\epsilon})/2$ common bits. Previously, no solution with $m < n - o(n)$ was known, and Valiant had conjectured that $m < n/2$ was not achievable. The construction therefore establishes a novel way of realizing communication in the manner of Network Coding for the shift problem, but leaves the viability of the common information approach to proving lower bounds in Circuit Complexity open. The construction uses the graph-theoretic notion of guessing number. As a by-product the paper also establish an interesting link between Circuit Complexity and Network Coding, a new direction of research in multiuser information theory.

On the complexity of a cyclic shift of a set of real numbers

The complexity of implementing a cyclic shift of a 2n-tuple of real numbers by Boolean circuits over the basis consisting of a ternary choice function and all binary Boolean functions is shown to be 2nn.

Remark on minimization of depth of Boolean circuits

It is shown that Lozhkin’s method (1981) for minimization of the depth of formulas with a bounded number of changing types of elements in paths from input to output and Hoover-Klawe-Pippenger’s method (technical report in 1981, journal publication in 1984) for minimization of the depth of circuits with unbounded branching by insertion of trees from buffers with bounded branching of outputs for each buffer are dual to each other and can be proved by one and the same method.

The Complexity of the Descriptiveness of Boolean Circuits over Different Sets of Gates

Any Boolean function can be defined by a Boolean circuit, provided we may use sufficiently strong functions in its gates. On the other hand, what Boolean functions can be defined depends on these gate functions: Each set B of gate functions defines the class of Boolean functions that can be defined by circuits over B. Although these classes have been known since the 1920s, their computational complexity was never investigated. In this paper we will study how difficult it is to decide for a Boolean function f and a class B, whether f is in B. Moreover, we will provide such a decision algorithm with additional information: How difficult is it to decide whether or not f is in B, provided we already know a circuit for f, but with gates from another class A? Given such a circuit, we know that f is in A. Is the problem harder if we do not have a concrete representation for f, but still know that it is from A? For nearly all possible combinations, we show that this is not the case, and that the problem is either in P or coNP-complete.

Inductive Time-Space Lower Bounds for Sat and Related Problems

We improve upon indirect diagonalization arguments for lower bounds on explicit problems within the polynomial hierarchy. Our contributions are summarized as follows. 1. We present a technique that uniformly improves upon most known nonlinear time lower bounds for nondeterminism and alternating computation, on both subpolynomial (n o(1)) space RAMs and sequential one-tape machines with random access to the input. We obtain improved lower bounds for Boolean satisfiability (SAT), as well as all NP-complete problems that have efficient reductions from SAT, and k-SAT, for constant k 2. For example, SAT cannot be solved by random access machines using time and subpolynomial space. 2. We show how indirect diagonalization leads to time-space lower bounds for computation with bounded nondeterminism. For both the random access and multitape Turing machine models, we prove that for all k 1, there is a constant c k > 1 such that linear time with n 1/k nondeterministic bits is not contained in deterministic $$n^{{c}_{k}}$$ time with subpolynomial space. This is used to prove that satisfiability of Boolean circuits with n inputs and n k size cannot be solved by deterministic multitape Turing machines running in $${n^{{k \cdot {c}}_{k}}}$$ time and subpolynomial space.

An information-lossless decomposition theory of relational information systems

Relational information systems, systems that can be represented by tables of finite states, are commonly used in many areas such as logic circuits, finite-state machines, and relational databases. Decomposition is a natural method of handling complex systems and removing redundancies. It splits a table into a network of smaller, simpler, and interrelated new tables. In order to preserve the original features of the system, any valid decomposition must be lossless. Commutative partitions play an important role in the decomposition. The commutative property is essentially a general algebraic formulation of independency of two partitions. We express the interdependency of two commutative partitions by a bipartite graph, and classify the hierarchical independency structures by the topological property of bipartite graphs. In particular, we show that two partitions are decomposable, the strongest version of dependency, if and only if the associate bipartite graph is uniform. We also adopt Shannon's entropy to quantify the amount of information contained in each partition, and formulate the information-lossless decomposition by the entropy conservation identity. Under the assumption of running intersection property, we show that the general formulation of information-lossless decomposition of relational systems is given by the entropy inclusion-exclusion equality. Applications of these formulations to Boolean logic circuits and relational databases are presented to manifest the information-lossless decomposition processes.

Homomorphic Public-Key Cryptosystems and Encrypting Boolean Circuits

Given an arbitrary finite nontrivial group, we describe a probabilistic public-key cryptosystem in which the decryption function is chosen to be a suitable epimorphism from the free product of finite Abelian groups onto this finite group. It extends the quadratic residue cryptosystem (based on a homomorphism onto the group of two elements) due to Rabin – Goldwasser – Micali. The security of the cryptosystem relies on the intractability of factoring integers. As an immediate corollary of the main construction, we obtain a more direct proof (based on the Barrington technique) of Sander-Young-Yung result on an encrypted simulation of a boolean circuit of the logarithmic depth.

Theories for TC0 and Other Small Complexity Classes

We present a general method for introducing finitely axiomatizable "minimal" two-sorted theories for various subclasses of P (problems solvable in polynomial time). The two sorts are natural numbers and finite sets of natural numbers. The latter are essentially the finite binary strings, which provide a natural domain for defining the functions and sets in small complexity classes. We concentrate on the complexity class TC^0, whose problems are defined by uniform polynomial-size families of bounded-depth Boolean circuits with majority gates. We present an elegant theory VTC^0 in which the provably-total functions are those associated with TC^0, and then prove that VTC^0 is "isomorphic" to a different-looking single-sorted theory introduced by Johannsen and Pollet. The most technical part of the isomorphism proof is defining binary number multiplication in terms a bit-counting function, and showing how to formalize the proofs of its algebraic properties.

Interaction in Normative Multi-Agent Systems

The central research question of this paper is how notions developed in interactive computing such as abstract behavior types, the coordination language Reo, and Boolean circuits with registers, can be used to extend logical input/output nets, or lions for short. Lions are based on input/output logic, a deontic logic which is not used as a (non-classical) inference engine deriving output from input, but as a secretarial assistant for logically assisted transformations from input to output. We consider two extensions of input/output logics and lions. First, we consider input/output logics defined on infinite sequences (or streams) of inputs and outputs. Secondly, we consider lions with AND and register gates, formalizing the behavior of channels and connectors. We discuss also the role of interactive computing in normative multi-agent systems motivating the development of lions.

Energy Aware Computing through Probabilistic Switching: A Study of Limits

The main result in this paper establishes the energy savings derived by using probabilistic AND as well as NOT gates constructed from an idealized switch that produces a probabilistic bit (PBIT). A probabilistic switch produces the desired value as an output that is 0 or 1 with probability p, represented as a PBIT, and, hence, can produce the wrong output value with a probability of (1-p). In contrast with a probabilistic switch, a conventional deterministic switch produces a BIT whose value is always correct. Our switch-based gate constructions are a particular case of a systematic methodology developed for building energy-aware networks for computing, using PBITS. Interesting examples of such networks include AND, OR, and NOT gates (or, as functions, Boolean conjunction, disjunction, and negation, respectively). To quantify the energy savings, novel measures of "technology independent" energy complexity are also introduced - these measures parallel conventional machine-independent notions of computational complexity such as the algorithm's running time and space. Networks of switches can be related to Turing machines and to Boolean circuits, both of which are widely known and well-understood models of computation. Our gate and network constructions lend substance to the following thesis (established for the first time by K.V. Palem): the mathematical technique referred to as randomization yielding probabilistic algorithms results in energy savings through a physical interpretation based on statistical thermodynamics and, hence, can serve as a basis for energy-aware computing. While the estimates of the energy saved through PBIT-based probabilistic computing switches and networks developed rely on the constructs and thermodynamic models due to Boltzmann, Gibbs, and Planck, this work has also led to the innovation of probabilistic CMOS-based devices and computing frameworks. Thus, for completeness, the relationship between the physical models on which this work is based and the electrical domain of CMOS-based switching is discussed.

A note on the circuit complexity of PP

In this short note, we show that for any integer k, there are languages in the complexity class PP that do not have Boolean circuits of size n k .

Bounds on an exponential sum arising in Boolean circuit complexity

We study exponential sums of the form S = 2 − n ∑ x ∈ { 0 , 1 } n e m ( h ( x ) ) e q ( p ( x ) ) , where m , q ∈ Z + are relatively prime, p is a polynomial with coefficients in Z q , and h ( x ) = a ( x 1 + ⋯ + x n ) for some 1 ⩽ a < m . We prove an upper bound of the form 2 − Ω ( n ) on | S | . This generalizes a result of J. Bourgain, who establishes this bound in the case where q is odd. This bound has consequences in Boolean circuit complexity. To cite this article: F. Green et al., C. R. Acad. Sci. Paris, Ser. I 341 (2005).

Unrestricted vs restricted cut in a tableau method for Boolean circuits

This paper studies the relative efficiency of variations of a tableau method for Boolean circuit satisfiability checking. The considered method is a nonclausal generalisation of the Davis---Putnam-...

Delay optimization of linear depth boolean circuits with prescribed input arrival times

We consider boolean circuits C over the basis Ω = { ∨ , ∧ } with inputs x 1 , x 2 , … , x n for which arrival times t 1 , t 2 , … , t n ∈ N 0 are given. For 1 ⩽ i ⩽ n we define the delay of x i in C as the sum of t i and the number of gates on a longest directed path in C starting at x i . The delay of C is defined as the maximum delay of an input. Given a function of the form f ( x 1 , x 2 , … , x n ) = g n − 1 ( g n − 2 ( … g 3 ( g 2 ( g 1 ( x 1 , x 2 ) , x 3 ) , x 4 ) … , x n − 1 ) , x n ) where g j ∈ Ω for 1 ⩽ j ⩽ n − 1 and arrival times for x 1 , x 2 , … , x n , we describe a cubic-time algorithm that determines a circuit for f over Ω that is of linear size and whose delay is at most 1.44 times the optimum delay plus some small constant.

DNA algorithm for an unbounded fan-in Boolean circuit

In this paper, we present a new DNA-based evaluation algorithm for a Boolean circuit that employs standard bio-molecular techniques. The algorithm operates on an unbounded fan-in Boolean circuit consisting of AND and OR gates. The whole simulation of our algorithm is proposed in a single test tube in O(1) time complexity and is much easier to implement in the laboratory than previously described models. Furthermore, the algorithm allows for evaluating any number of Boolean circuits in parallel in a single test tube.

Fast parallel molecular solutions for DNA-based supercomputing: the subset-product problem

In this paper our main purpose is to give molecular solutions for the subset-product problem. In order to achieve this, we propose three DNA-based algorithms – parallel adder, parallel multiplier and parallel comparator – that formally verify our designed molecular solutions for the subset-product problem. We also show that Boolean circuits are not needed to perform mathematical operations on a molecular computer. Furthermore, this work indicates that the subset-product problem is solved and also presents clear evidence of the ability of molecular computing to perform complicated mathematical operations.

A Superpolynomial Lower Bound for a Circuit Computing the Clique Function with at most (1/6)log log n Negation Gates

In this paper, we investigate the lower bound on the number of gates in a Boolean circuit that computes the clique function with a limited number of negation gates. To derive strong lower bounds on the size of such a circuit we develop a new approach by combining three approaches: the restriction applied to constant depth circuits due to Hastad, the approximation method applied to monotone circuits due to Razborov, and the boundary covering developed in the present paper. We prove that if a circuit $C$ with at most $\floor{(1/6) \log \log m}$ negation gates detects cliques of size $(\log m)^{3(\log m)^{1/2}}$ in a graph with $m$ vertices, then $C$ contains at least $2^{(1/5)(\log m)^{(\log m)^{1/2}}}$ gates. No nontrivial lower bounds on the size of such circuits were previously known, even if we restrict the number of negation gates to be a constant. Moreover, it follows from a result of Fischer [{\it Lect. Notes Comput. Sci.,} 33 (1974), pp. 71--82] that if one can improve the number of negation gates from $\floor{(1/6)\log\log m}$ to $\floor{2\log m}$ in the statement, then we have P $\neq$ NP. We also show that the problem of lower bounding the negation-limited circuit complexity can be reduced to the one of lower bounding the maximum of the monotone circuit complexity of the functions in a certain class of monotone functions.

PDL for ordered trees

This paper is about a special version of PDL, proposed by Marcus Kracht, for reasoning about sibling ordered trees. It has four basic programs corresponding to the child, parent, left- and right-sibling relations in such trees. The original motivation for this language is rooted in the field of model-theoretic syntax. Motivated by recent developments in the area of semi-structured data, and, especially, in the field of query languages for XML (eXtensible Markup Language) documents, we revisit the language. This renewed interest comes with a special focus on complexity and expressivity aspects of the language, aspects that have so far largely been ignored. We survey and derive complexity results, and spend most of the paper on the most important open question concerning the language: what is its expressive power? We approach this question from two angles: Which first-order properties can be expressed? And which second-order properties? While we are still some way from definitive answers to these questions, we discuss two first-order fragments of the PDL language for ordered trees, and show how the language can be used to express some typical (second-order) problems, like the boolean circuit and the frontier problem.

Derandomizing Polynomial Identity Tests Means Proving Circuit Lower Bounds

We show that derandomizing Polynomial Identity Testing is essentially equivalent to proving arithmetic circuit lower bounds for NEXP. More precisely, we prove that if one can test in polynomial time (or even nondeterministic subexponential time, infinitely often) whether a given arithmetic circuit over integers computes an identically zero polynomial, then either (i) NEXP ⊄ P/poly or (ii) Permanent is not computable by polynomial-size arithmetic circuits. We also prove a (partial) converse: If Permanent requires superpolynomial-size arithmetic circuits, then one can test in subexponential time whether a given arithmetic circuit of polynomially bounded degree computes an identically zero polynomial.Since Polynomial Identity Testing is a coRP problem, we obtain the following corollary: If RP = P (or even coRP ⊆ ∩e > 0 NTIME(2ne), infinitely often), then NEXP is not computable by polynomial-size arithmetic circuits. Thus establishing that RP = coRP or BPP = P would require proving superpolynomial lower bounds for Boolean or arithmetic circuits. We also show that any derandomization of RNC would yield new circuit lower bounds for a language in NEXP.We also prove unconditionally that NEXPRP does not have polynomial-size Boolean or arithmetic circuits. Finally, we show that NEXP ⊄ P/poly if both BPP = P and low-degree testing is in P; here low-degree testing is the problem of checking whether a given Boolean circuit computes a function that is close to some low-degree polynomial over a finite field.

Review of "Boolean Functions and Computation Models by Peter Clote and Evangelos Kranakis", Springer-Verlag, 2002

This wide-ranging monograph covers a number of research areas including Boolean functions and Boolean circuit families, propositional proof systems, sequential and parallel models of computation, and function algebras. If anything links them all together, it is surely complexity.