Bipolar Transistor Amplifier Research Articles

Discussion and Improvement on the Calculation of the Relationship between the Base Emitter of the Bipolar Junction Transistor and the Temperature by Using MATLAB Software

The purpose of this article is to explore and improve the effect of Bipolar Junction Transistor amplifier base-emitter on temperature changes. The prelude starts with Shockley's theory and its formula calculation. Research motivation, literature data and book principles cooperate with MATLAB application software skills to develop programs; it is used to calculate the relationship between various component parameters and temperature changes. The artificial calculation steps are too cumbersome and prone to clerical errors. Therefore, the program approach has been developed with report-style calculation results with both text and pictures. The feature of computer program calculation is the ability to compare and analyze the results produced at different temperatures, rapidly and repeatedly. The lack of known Bipolar Junction Transistors is replaced by Field Effect Transistors that are not affected by temperature. If the Bipolar Junction Transistor is used as the basis for the design, temperature changes must be considered to ensure the design quality. The purpose of this article is to introduce that the process of calculation has made the shift from an artificial-based way to a computer-based one.

High-Resolution Chipless Tag RF Sensor

In this article, a new coupled structure based on microwave planar resonators is proposed to demonstrate the capability of ultrahigh quality factor performance using a chipless passive resonator. The platform is based on two passive split-ring resonators (SRRs), one as a reader, and the other one as the tag. The reader resonator is designed to operate at 2.6-GHz resonance frequency and is coupled to an active feedback loop with a microwave amplifier to compensate for the resonator’s loss and increase the loaded quality factor of the response. The bandwidth of the feedback amplifier is modified such that the amplifier’s gain is higher at the resonance frequency of the tag than that of the reader by adding a capacitor between emitter and collector of the bipolar junction transistor (BJT) amplifier. The tag is designed at 1.6 GHz and is located at a 2.5-mm vertical distance from the reader. As a result, the overall quality factor of about 75 000 is achieved for the tag performing the sensing. The presented technique provides a great practical solution for highly sensitive, noninvasive, and real-time sensing applications. The proposed sensing tag is integrated with a microfluidic chip to highlight its capability for small volume sensing and lab-on-a-chip applications. The sensitivity potential of the design is verified by detecting the concentration of acetone in deionized water. The average sensitivity of the presented sensor is more than 35 kHz/(1% of acetone concentration variation), which is offering extremely high sensitivity of the structure considering the very small volume of the exposed material under the test and the distance between the sensor and the sample.

Rider-Deep-LSTM Network for Hybrid Distance Score-Based Fault Prediction in Analog Circuits

Fault prediction in the analog circuits is a serious problem to be addressed on an immediate basis, as traditionally, the faults in the analog circuits are diagnosed only after their occurrence. Since the outcome of the faults creates highly expensive scenarios in case of the analog circuit industry, there is a need for an effective prediction model that keeps track of the faults prior to their occurrence. Accordingly, this article focuses on the fault prediction model in analog circuits using proposed deep model called, Rider-deep-long short-term memory (LSTM). Here, the significance and precision of the prediction relies on the fault indicator, which is computed based on three distance measures, such as mahalanobis distance, Euclidean distance, and angular distance, and thereby, enables an effective health estimation of the circuit. The estimation is effectively solved using the Rider-deep-LSTM, which is the integration of proposed Rider-Adam algorithm in deep-LSTM, for training the model parameters. The proposed prediction method acquires the Pearson correlation coefficient of 0.9973 and 0.9919 while using the circuits, such as solar power converter and low noise bipolar transistor amplifier.

Multi-Rider Optimization-Based Neural Network for Fault Isolation in Analog Circuits

Fault isolation in electronic circuits is a trending area of interest as analog circuits find valuable application in industry. The failures in circuit systems cause severe issues in the normal functioning of the system that insists on the need for an automatic method of fault isolation in analog circuits. Literature conveys the issues associated with the fault isolation and hence, to address the severity of the faults, a novel model is proposed to isolate the fault causing component in the circuit. The proposed Multi-Rider Optimization-based Neural Network (M-RideNN) isolates the faulty part of the circuit from the fault-free areas such that the fault diagnosis is structured in an effective way. The fault isolation is progressed as four major steps such as establishing the fault dictionary, signal normalization using Linear Predictive Coding (LPC), effective dimensional reduction methodology using Probabilistic Principal Component Analysis (PPCA), and fault isolation using the proposed M-RideNN classifier. Finally, the experimentation using three circuits, namely Triangular Wave Generator (TWG), Bipolar Transistor Amplifier (BTA), differentiator (DIF), and an application circuit, Solar Power Converter (SPC), proves that the proposed M-RideNN classifier offers better classification accuracy of 93.18% with a minimum Mean Square Error (MSE) of 0.0682.

Design and simulation of high frequency colpitts oscillator based on BJT amplifier

Frequency oscillator is one of the basic devices that can be used in most electrical, electronics and communications circuits and systems. There are many types of oscillators depending on frequency range used in an application such as audio, radio and microwave. The needed was appeared to use high and very high frequencies to make the rapid development of advanced technology Colpitts oscillator is one of the most common types of oscillator, it can be used for radio frequency (RF), that its output signal is often utilized at the basic of a wireless communication system in most application. In this research, a Colpitts oscillator is comprised from a bipolar junction transistor (BJT) amplifier with <strong>LC</strong> tank. This design is carrying out with a known Barkhausen criterion for oscillation. Firstly, is carried out using theoretical calculation. The secondary is carried out using simulation (Multisim 13). All the obtained result from the above two approaches are 10 MHz and 9.745 MHz respectively. This result is seen to be very encouraging.

A Genetic algorithm for the optimal design of a multistage amplifier

<span lang="EN-US">The optimal sizing of analog circuits is one of the most complicated processes, because of the number of variables taken into, to the number of required objectives to be optimized and to the constraint functions restrictions. The aim is to automate this activity in order to accelerate the circuits design and sizing. In this paper, we deal with the optimization of the three stage bipolar transistor amplifier performances namely the voltage gain (A<sub>V</sub>), the input impedance (Z<sub>IN</sub>), the output impedance (Z<sub>OUT</sub>), the power consumption (P) and the low and the high cutoff frequency (F<sub>L</sub>,F<sub>H</sub>), through the Genetic Algorithm (GA). The presented optimization problem is of multi-dimensional parameters, and the trade-off of all parameters. In fact, the passive components (Resistors and Capacitors) are selected from manufactured constant values (E12, E24, E48, E96, E192) for the purpose of reduce the cost of design; also, the intrinsic parameters of transistors (hybrid parameters and the junction capacitances) are considered variables in order not to be limited in design. SPICE simulation is used to validate the obtained result/performances.</span>

3.2-mW Ultra-Low-Power 173-207-GHz Amplifier With 130-nm SiGe HBTs Operating in Saturation

This article presents an ultra-low-power silicon germanium heterojunction bipolar transistor (SiGe HBT) amplifier operating at 200 GHz. The amplifier consists of three cascaded gain-cell stages and was implemented in an experimental 130-nm SiGe HBT technology with peak f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> /f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> of 460/600 GHz. In order to achieve the demonstrated extremely low dc power dissipation, the circuit was designed with transistors operating at forward-biased base-collector junction voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BC</sub> ). With 1.3-V supply voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BC</sub> ≈ 0.2 V), this amplifier exhibits a peak gain of 23.5 dB at 180 and 205 GHz with 34-GHz 3-dB bandwidth (BW) from 173 to 207 GHz, consuming 3.2-mW static dc power. Even with a supply voltage of 0.7 V (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BC</sub> ≈ 0.5 V), this amplifier still operates with a peak gain of 18.3 dB at 175 GHz, dissipating an extremely low dc power of 1.73 mW. Compared with the previously reported low-power amplifiers operating around 200 GHz, this article achieves the highest linear gain relative to the dc power consumption with an improvement factor of ten, as well as highly competitive performances in terms of noise figure and 3-dB BW.

A 220-GHz InP DHBT Power Amplifier With Integrated Planar Spatial Power Combiner

In this letter, we present a research on the application possibility of the integrated planar spatial (IPS) combiner in terahertz monolithic integrated circuits (TMICs). The IPS combiner has several attractive characters, such as low loss and good port-to-port isolation. Measured insertion loss of the back-to-back four-way IPS combiner prototype is less than 1.65 dB from 220 to 260 GHz. Then, the IPS power combiner is applied to a four-way six-stage common-emitter InP double heterojunction bipolar transistor amplifier based on a 0.5- $\mu \text{m}$ process. With the help of the IPS combiner and the compact circuit design, this letter greatly improves the output power and output power density compared with other TMICs of the same InP HBT technology. The output power density per unit emitter length (output stage) is 0.51 mW/ $\mu $ m, which is at the same level of amplifiers based on the 0.25- $\mu \text{m}$ InP HBT technology.

RideNN: A New Rider Optimization Algorithm-Based Neural Network for Fault Diagnosis in Analog Circuits

Fault diagnosis in electronic circuits is an emerging area of research, where fully automated diagnosis systems are being developed for the investigation of the circuits. Developing test methods for the diagnosis of faults in analog circuits is still a complex task. Consequently, a technique for the fault diagnosis in analog circuits is designed by proposing a new optimization algorithm, named, rider optimization algorithm (ROA). The development of ROA is based on a group of riders, racing toward a target location. Moreover, a classifier, termed RideNN, is developed by including the proposed algorithm as the training algorithm for the neural network (NN). RideNN, along with the orthogonal transformation and Bhattacharyya coefficient, is applied for the fault diagnosis of analog circuits. The proposed technique is experimented using three basic circuits, such as triangular wave generator (TWG), low noise bipolar transistor amplifier (BTA), and differentiator (DIF) and an application circuit, solar power converter (SPC). The performance is evaluated using two evaluation metrics, namely, accuracy (ACC) and false alarm ratio (FAR). The analysis results show that the proposed technique attains an ACC of 99.9% in TWG, 99.9% in BTA, 99% in DIF, and 95% in SPC without noise.

Writing monolithic integrated circuits on a two-dimensional semiconductor with a scanning light probe

The development of complex electronics based on two-dimensional (2D) materials will require the integration of a large number of 2D devices into circuits. However, a practical method of assembling such devices into integrated circuits remains elusive. Here we show that a scanning visible light probe can be used to directly write electrical circuitry onto the 2D semiconductor molybdenum ditelluride (2H-MoTe2). Laser light illumination over metal patterns deposited onto 2D channels of 2H-MoTe2 can convert the channels from an n-type semiconductor to a p-type semiconductor, by creating adatom–vacancy clusters in the host lattice. With this process, diffusive doping profiles can be controlled at the submicrometre scale and doping concentrations can be tuned, allowing the channel sheet resistance to be varied over four orders of magnitudes. Our doping method can be used to assemble both n- and p-doped channels within the same atomic plane, which allows us to fabricate 2D device arrays of n–p–n (p–n–p) bipolar junction transistor amplifiers and radial p–n photovoltaic cells. A laser can be used to locally dope two-dimensional molybdenum ditelluride channels, allowing both n- and p-doped channels to be assembled within the same atomic plane and for device arrays of n–p–n bipolar junction transistor amplifiers and radial p–n photovoltaic cells to be fabricated.

Two port S parameter simulation using Spice2G

ABSTRACTFrom the definition of S parameters, models for simulating various electronic SPICE circuits having two port networks are developed. Three examples demonstrating the usefulness of the technique and models in simulation are given. The first two examples determine the response for two linear circuits (a) employing high-frequency bipolar junction transistors(b) using GaAsFETs at 25°C . In the third example, at room temperature, a high-frequency bipolar transistor circuit S parameter data was simulated using two port model and the results were compared to another two-port model of high-frequency bipolar transistor amplifier (common emitter) whose measured S parameters are fitted to the model using least square optimisation criteria. The procedure and technique for simulation of two ports using Z, Y, G, H transmission and inverse transmission parameters can be extended by similar steps as is done to the S parameters for a two port.

Microcontact-Enhanced Thermoelectric Cooling of Ultrahigh Heat Flux Hotspots

The dissipated power of insulated gate bipolar transistor and high electron mobility transistor amplifiers is typically nonuniform, resulting in areas of elevated temperature, or hotspots, which can have very large heat fluxes, on the order of 1000 W/cm2. While various bulk cooling systems are being researched to remove large amounts of heat, they uniformly reduce the chip temperature, leaving the temperature nonuniformity. Therefore, advanced hotspot cooling techniques, which provide localized cooling, are also required to unlock the full potential of cutting edge power devices. Thermoelectric coolers have previously been demonstrated as an effective method of producing on-demand cooling for the removal of localized hotspots. However, the heat flux of the hotspots that can be cooled is limited by the maximum cooling flux of thermoelectric devices. This paper demonstrates the thermal and reliability performance of a microcontact-enhanced thermoelectric cooling configuration, which uses a contact structure etched directly out of the electronic substrate to concentrate the cooling produced by a commercially available thermoelectric module. The 22 K of cooling, resulting in a hotspot temperature rise of <6 K for a heat flux of 2.5 kW/cm2, was experimentally demonstrated using a Laird HV37 thin-film thermoelectric module with a maximum device level cooling flux of 66 W/cm2. A numerical model was created, and it is predicted that when the chip and microcontact geometry is optimized, hotspots with heat fluxes in excess of 3 kW/cm2 can be cooled by nearly 40 K, reducing the hotspot temperature rise to 0 K.

Bipolar transistor amplifier for transduction of electrochemical response to visual perception

A simple device for the transduction of an electrochemical signal to a visual readout suitable for point of care diagnostics has been designed. The transducer consists of an electrochemical cell and a 4-electronic components circuit, namely two resistors, one transistor and one light emitting diode (LED). The response from the electrochemical cell is amplified by the transistor providing output for the direct visual readout with the naked eye. Function of the device was verified in the experiments with hydrogen peroxide. Simple adjustment of the values of resistors provided tuneable sensitivity, positive threshold level and limit of detection as well. The biosensing abilities of the proposed system were tested on the analytical model using immobilised glucose oxidase. The principal benefits of the proposed platform include uniquely low construction costs and high simplicity. This approach is innovative in the transduction/conversion of the signal to visual perception and also in the signal generation – no potentiostat nor galvanostat are used compared to the majority of electrochemical measurements.

A system for automated noise parameter measurements on MR preamplifiers and application to high B(0) fields.

A noise figure and noise parameter measurement system was developed that consists of a combination spectrum and network analyzer, preamplifier, programmable power supply, noise source, tuning board, and desktop computer. The system uses the Y-factor method for noise figure calculation and allows calibrations to correct for a decrease in excess noise ratio between the noise source and device under test, second stage (system) noise, ambient temperature variations, and available gain of the device under test. Noise parameters are extracted by performing noise figure measurements at several source impedance values obtained by adjusting an electronically controlled tuner. Results for several amplifiers at 128 MHz and 200 MHz agree with independent measurements and with the corresponding datasheets. With some modifications, the system was also used to characterize the noise figure of MRI preamplifiers in strong static magnetic fields up to 9.4 T. In most amplifiers tested the gain was found to be reduced by the magnetic field, while the noise figure increased. These changes are detrimental to signal quality (SNR) and are dependent on the electron mobility and design of the amplifier's semiconductor devices. Consequently, gallium arsenide (GaAs) field-effect transistors are most sensitive to magnetic fields due to their high electron mobility and long, narrow channel, while silicon-germanium (SiGe) bipolar transistor amplifiers are largely immune due to their very thin base.

A beam radiation monitor based on CVD diamonds for SuperB

Chemical Vapor Deposition (CVD) diamond particle detectors are in use in the CERN experiments at LHC and at particle accelerator laboratories in Europe, USA and Japan mainly as beam monitors. Nowadays it is considered a proven technology with a very fast signal read-out and a very high radiation tolerance suitable for measurements in high radiation environment zones i.e. near the accelerators beam pipes. The specific properties of CVD diamonds make them a prime candidate for measuring single particles as well as high-intensity particle cascades, for timing measurements on the sub-nanosecond scale and for beam protection systems in hostile environments.A single-crystalline CVD (scCVD) diamond sensor, read out with a new generation of fast and high transition frequency SiGe bipolar transistor amplifiers, has been tested for an application as radiation monitor to safeguard the silicon vertex tracker in the SuperB detector from excessive radiation damage, cumulative dose and instantaneous dose rates. Test results with 5.5MeV alpha particles from a 241Am radioactive source and from electrons from a 90Sr radioactive source are presented in this paper.

Non-linearity in Johnson noise thermometry

This paper discusses the effects of non-linearity, some of the mechanisms responsible for non-linearity, and methods for measuring non-linearity in Johnson noise thermometry. Mechanisms considered include quantum tunnelling, bipolar junction transistor and junction field-effect transistor amplifiers, feedback, clipping, output-stage crossover, quantization and dither. It is found that even- and odd-order effects behave differently in correlator-based noise thermometers, with the dominant even-order effects contributing as intermodulation products whereas the dominant odd-order contributions are third-order and at the same frequencies as the parent signals. Possible test methods include the use of discrete tones, changes in spectral shape, and direct measurement using reference noise powers. For correlators operated at constant noise power, direct measurement of non-linearity using reference noise powers enables corrections to be made with negligible additional uncertainty and measurement time.

A 2-GHz Highly Linear Efficient Dual-Mode BiCMOS Power Amplifier Using a Reconfigurable Matching Network

A highly linear, efficient, two-stage power amplifier for high-data-rate wireless applications is presented. The linearity is greatly improved by adding an auxiliary amplifier to the main bipolar transistor amplifier in a feed-forward approach to cancel out the nonlinearity terms. The efficiency enhancement is achieved using a switchable biasing and a reconfigurable output-matching network based on the available input power which is monitored by an on-chip envelope detector. The PA is fabricated using 0.25- μm SiGe:C BiCMOS technology and works at 2 GHz with a supply voltage of 2.5 V. The experimental results show a gain of 13 dB and a maximum output power of 23 dBm with a PAE of 38%. The 1-dB output power compression point is 21 dBm with a 32% PAE. The 6-dB power back-off PAE is 23%. The IM3 and IM5 terms are 41 and 44 dB below the fundamental tone for the 21-dBm output power, respectively. The EVM has been measured to be -30.7 dB at 15-dBm average output power using IEEE 802.16e standard WiMAX 64QAM modulated signal. By employing the linearization technique, EVM and ACLR are improved by 4.5 and 5 dB, respectively, for a WiMAX 64QAM 10-MHz signal bandwidth at 14-dBm average output power.

Cryogenic ultra-low-noise SiGe transistor amplifier

An ultra-low-noise one-stage SiGe heterojunction bipolar transistor amplifier was designed for cryogenic temperatures and a frequency range of 10 kHz-100 MHz. A noise temperature T(N) ≈ 1.4 K was measured at an ambient temperature of 4.2 K at frequencies between 100 kHz and 100 MHz for a source resistance of ~50 Ω. The voltage gain of the amplifier was 25 dB at a power consumption of 720 μW. The input voltage noise spectral density of the amplifier is about 35 pV/√Hz. The low noise resistance and power consumption makes the amplifier suitable for readout of resistively shunted DC SQUID magnetometers and amplifiers.

235 GHz Amplifier Using 150 nm InP HBT High Power Density Transistor

In this letter, a four-stage 235 GHz heterojunction bipolar transistor (HBT) amplifier is reported. Each stage uses a single-emitter 0.15 × 3 μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> InP HBT with collector current density of 25 mA/μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , maximum frequency of oscillation ( <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> ) greater than 500 GHz, and a cutoff frequency ( <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">fT</i> ) of 320 GHz. The MMIC amplifier is realized in inverted microstrip topology. The amplifier demonstrates measured small signal gain of 12.7 dB and output power of 2.6 mW with a power gain of 9.4 dB. This corresponds to transistor output power density of 5.7 mW/μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> at 235 GHz. This is the highest HBT transistor output power density published to date at frequencies above 170 GHz, which indicates high power InP HBT power amplifiers should be viable with on-chip power combining.

Effect of collector bias current on the linearity of common-emitter BJT amplifiers

Using a Volterra series, an explicit formula is derived for the connection between input 3rd-order intercept point and collector bias current (ICQ) in a common-emitter bipolar junction transistor amplifier. The analysis indicates that the larger ICQ is, the more linear the amplifier is. Furthermore, this has been verified by experiment. This study also integrates a method called dynamic bias current for expanding the dynamic range of an LNA (low noise amplifier) as an application of the analysis result obtained above. IMR3 (3rd-order intermodulation rate) is applied to evaluate the LNA's performance with and without adopting this method in this study.