Bipolar Charge Plasma Transistor Research Articles

Impact of strained silicon on the device performance of a bipolar charge plasma transistor

In this manuscript we analyze a unique approach to improve the performance of the bipolar charge plasma transistor (BCPT) by introducing a strained Si/SixGe1−x layer as the active device region. For charge plasma realization different metal work-function electrodes are used to induce n+ and p+ regions on undoped strained silicon-on-insulator (sSOI or SixGe1−x) to realize emitter, base, and collector regions of the BCPT. Here, by using a calibrated 2-D TCAD simulation the impact of a Si mole fraction x (in SixGe1−x) on device performance metrics is investigated. The analysis demonstrates the band gap lowering with decreasing Si content or effective strain on the Si layer, and its subsequent advantages. This work reports a significant improvement in current gain, cutoff frequency, and lower collector breakdown voltage (BVCEO) for the proposed structure over the conventional device. The effect of varying temperature on the strained Si layer and its implications on the device performance is also investigated. The analysis demonstrates a fair device-level understanding and exhibits the immense potential of the SixGe1−x material as the device layer. In addition to this, using extensive 2-D mixed-mode TCAD simulation, a considerable improvement in switching transient times are also observed compared to its conventional counterpart.

Improved performance of bipolar charge plasma transistor by reducing the horizontal electric field

In this paper, we have proposed a modified lateral bipolar charge plasma transistor (BCPT). The appropriate work function engineering is used to induce the electron-hole concentrations under different regions. The reduced work function difference and absence of oxide layer (tox) in the proposed lateral BCPT reduce the horizontal electric field (EX) at the emitter. Also, reduced work function difference at base metal contact decreases the electric field at base-emitter and base-collector junctions. 2-D TCAD simulations of the proposed device reveal that there are evenly spaced output characteristic curves, improved cut-off frequency and breakdown voltage. The reduction in horizontal electric field about one-fourth compared to the conventional lateral BCPT results in realistic current gain (β) and reduced on-set voltage makes proposed device suitable for low power applications. The proposed device exhibits improved cut-off frequency (fT = 7.5 GHz) compared to the lateral BCPT (3.7 GHz) and improved current gain (37.67) and same cut-off frequency (= 7.5 GHz) compared to the conventional BJT (β = 26.5 &fT = 7.5 GHz).

Two-zone SiGe base heterojunction bipolar charge plasma transistor for next generation analog and RF applications

For next generation terahertz applications, heterojunction bipolar transistor (HBT) with reduced dimensions and charge plasma (CP) can be a potential candidate due to simplified and inexpensive process. In this paper, a symmetric lateral two-zone SiGe base heterojunction bipolar charge plasma transistor (HBCPT) with an extruded (extended) base is proposed and its performance at circuit level is studied. The linearly graded electric field in the proposed HBCPT provides improved self gain (β) and cut-off frequency (fT). Two-dimensional (2-D) TCAD and small-signal model based simulations of the proposed HBCPT demonstrates high self gain β 35–172.93 and fT of 1–4 THz for different device parameters. Moreover, fT of 1104.9 GHz and β of 35 can be achieved by decreasing Nb up to 8.2×1017cm−3. Although, fT of 2 THz and 4 THz can also be achieved by reducing the base resistance up to 10 Ω and increasing the emitter/collector length up to 63 nm, respectively. The small-signal analysis of common-emitter amplifier based on the proposed HBCPT demonstrate high voltage gain of 50.11 as compared to conventional HBT (18.1).

Symmetric Lateral Doping-Free BJT: A Novel Design for Mixed Signal Applications

A novel device structure of a symmetric lateral bipolar junction transistor (BJT) on silicon on insulator is presented with two distinctive approaches to induce charge carriers in the undoped silicon thin film. The metal workfunction engineering and electrostatic approaches are used to induce charge carriers in the emitter and collector regions of a BJT. Simulated electrical characteristics of both n-p-n and p-n-p BJT configurations show superior results compared with the thin-base symmetric lateral BJT and bipolar charge plasma transistor. The optimized design showed a peak current gain >180, $f_{t} > 280$ GHz, $f_{\textrm {max}} > 950$ GHz and $V_{A} > 3$ V. The circuit performance of the devices for primary digital applications, viz., complementary bipolar inverter and SRAM cell are discussed. Apart from this, the concept of reconfigurability is also presented, where the same device can be configured as n-p-n and p-n-p by changing the polarity of the applied potential across the polarity control terminals.

Vertical bipolar charge plasma transistor with buried metal layer.

A self-aligned vertical Bipolar Charge Plasma Transistor (V-BCPT) with a buried metal layer between undoped silicon and buried oxide of the silicon-on-insulator substrate, is reported in this paper. Using two-dimensional device simulation, the electrical performance of the proposed device is evaluated in detail. Our simulation results demonstrate that the V-BCPT not only has very high current gain but also exhibits high BVCEO · fT product making it highly suitable for mixed signal high speed circuits. The proposed device structure is also suitable for realizing doping-less bipolar charge plasma transistor using compound semiconductors such as GaAs, SiC with low thermal budgets. The device is also immune to non-ideal current crowding effects cropping up at high current densities.

Design and performance projection of symmetric bipolar charge‐plasma transistor on SOI

A novel symmetric structure of bipolar charge-plasma transistor (BCPT) is presented. It consists of symmetrical gates with platinum on top of a thin intrinsic silicon film, which forms hole plasma in emitter and collector regions. The base contact is formed with hafnium metal to induce electron plasma; hence, a p-n-p charge-plasma transistor is formed without any doping. The collector area that is chosen is the same as an emitter to make the device symmetrical. 2D simulation results revealed that the proposed BCPT possesses higher collector current and higher current gain than conventional p-n-p bipolar junction transistor (BJT) and almost the same characteristics such as asymmetrical p-n-p BCPT for different geometries. The major challenge of poor cut-off frequency ( f T ) of BCPT is also addressed by optimising the silicon film thickness and intrinsic gaps.

A high performance charge plasma PN-Schottky collector transistor on silicon-on-insulator

In this paper, we propose a new high performance PN-Schottky collector (PN-SC) lateral bipolar junction transistor (BJT) on silicon-on-insulator (SOI). The proposed device addresses the problem of poor speed of conventional lateral PNP-BJT device by using a Schottky collector. Further, it does not use the conventional ways of ion implantation/diffusion to realize n and p type doped region. However, it uses metal electrodes of different work functions to create n and p type charge plasma in an undoped silicon film. The simulation study of the proposed lateral PN-SC bipolar charge plasma transistor on SOI (PN-SC-BCPT) device has shown a significant improvement in current gain (β), cutoff frequency (fT) and switching performance in comparison to conventional PNP-BJT and PNP-bipolar charge plasma transistor (PNP-BCPT) devices. A significantly high β is obtained in the proposed PN-SC-BCPT (∼2100) in comparison to PNP-BCPT (∼1450) and the conventional BJT (∼9) devices, respectively. It has been observed that there is 89.56% and 153.5% increase in fT for the proposed PN-SC-BCPT device (2.18 GHz) in comparison to conventional PNP-BJT (1.15 GHz) and PNP-BCPT (0.86 GHz) devices, respectively. Further, reductions of 24.6% and 15.4% in switching ON-delay and 66% and 30.76% in switching OFF-delay have been achieved in the proposed device based inverters in comparison to PNP-BCPT and the conventional BJT devices based inverters, respectively. Furthermore, the proposed device does not face doping related issues and the requirement of high temperature processing is absent.

Thin-Film Bipolar Transistors on Recrystallized Polycrystalline Silicon Without Impurity Doped Junctions: Proposal and Investigation

A lateral polysilicon Bipolar Charge Plasma Transistor (poly-Si BCPT) on undoped recrystallized polycrystalline silicon which is compatible with the thin-film field effect transistor (TFT) fabrication is reported in this paper. Using calibrated two-dimensional device simulation, the electrical performance of the poly-Si BCPT is evaluated in detail by considering the position of the single grain boundary. Our simulation results demonstrate that the poly-Si BCPT has the potential to realize low-cost thin-film polycrystalline silicon bipolar transistors with large current gain and cut-off frequency making it suitable for a number of applications including the driver circuits of the displays.

A high performance charge plasma based lateral bipolar transistor on selective buried oxide

In this paper, we present a new structure of lateral bipolar transistor on selective buried oxide. The device does not use highly doped regions; however, it employs the concept of creating n and p type charge plasma in undoped silicon by using metal electrodes of different work functions. The proposed device is named as the selective buried oxide based bipolar charge plasma transistor (SELBOX-BCPT). An extensive 2D simulation study has revealed that the proposed SELBOX-BCPT device not only possesses all the advantages of the conventional BCPT device, but it also addresses various severe problems of the BCPT device. A significant improvement in major issues of poor cutoff frequency (fT), low breakdown voltage and thermal efficiency has been achieved. It has been observed that the fT has increased by ∼94.6%, the breakdown voltage by 23.47% and the device is much cooler than the conventional BCPT device. A large current gain is obtained in the proposed device and is on a par with the conventional BCPT device. Further, by using mixed-mode simulation feature of the Atlas simulator, inverting amplifiers based on SELBOX-BCPT and the conventional BCPT have been realized. A significant improvement of 15% in switching-on transient time and 25.8% in switching-off transient time has been achieved in the proposed device in comparison to the conventional BCPT device.

Bipolar Charge-Plasma Transistor: A Novel Three Terminal Device

A distinctive approach for forming a lateral bipolar charge-plasma transistor (BCPT) is explored using 2-D simulations. Different metal work-function electrodes are used to induce n- and p-type charge-plasma layers on undoped silicon-on-insulator (SOI) to form the emitter, base, and collector regions of a lateral n-p-n transistor. Electrical characteristics of the proposed device are simulated and compared with that of a conventionally doped lateral bipolar junction transistor (BJT) with identical dimensions. Our simulation results demonstrate that the BCPT concept will help us realize a superior bipolar transistor in terms of a high current gain, as compared with a conventional BJT. This BCPT concept is suitable in overcoming doping issues such as dopant activation and high-thermal budgets, which are serious issues in ultrathin SOI structures.