we report low-power single-flux-quantum (SFQ) circuits fabricated with a lowered critical current density process and low-voltage design. We selected 250 A/cm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$^{2}$</tex-math></inline-formula> to obtain 2–10 μA Josephson junctions (JJs) easily using conventional facilities. Our numerical simulation shows that the expected operating frequency is 10 GHz and that we can reduce the bias voltage to 0.1–0.5 mV; power consumption can be reduced to around 1 nW per JJ. We newly developed a fabrication process featuring four planarized Nb layers and a Pd resistor layer. We obtained the correct operation of several basic SFQ circuit elements designed with the lowered critical currents to 1/2 of the conventional circuits at 4.2 K. We also evaluated the Josephson junction critical currents, specific capacitance, resistance, and inductance at 3 K and 300 mK. We observed an increase of 7% in the critical currents at 300 mK, while the other parameters were unchanged. We demonstrated a 0.5-mV Josephson transmission line where we lowered the critical currents to 1/10. We expect such low-power SFQ circuits to operate at 20 mK, providing classical, general-purpose digital processing near quantum bits.