Bandgap Reference Research Articles

A low‐power NPN‐based band‐gap voltage reference in an ultra‐wide temperature range

AbstractA low‐power negative‐positive‐negative (NPN)‐based bandgap voltage reference (BGR) over an ultra‐wide temperature range is presented. The conventional NPN‐based BGRs cannot maintain a low‐temperature coefficient (TC) with low power consumption in an ultra‐wide temperature range due to its inherent reverse junction saturation current of NPN bipolar junction transistors (BJT) in the high‐temperature range. This work introduces a new NPN‐based BGR unaffected by such saturation current. Based on Vanguard International Semiconductor Corporation (VIS) 0.18 μm/0.15 μm complementary metal oxide semiconductor (CMOS) Bipolar‐CMOS‐DMOS (BCD) process, the BGR receives the best 1.25‐mV deviation over the temperature range of −40°C to 150°C, much less than 38.5 mV from Brokaw‐type BGR. Meanwhile, the proposed BGR with the stacked NPNs for higher output voltage was fabricated. It consumes about 2 uA from a 5‐V power supply, and its average temperature coefficient is 14.89 ppm/°C. Also, the average line sensitivity is 0.039%/V.

A 0.82 μVrms ultralow 1/f noise bandgap reference for a MEMS gyroscope

High-precision microelectromechanical system (MEMS) gyroscopes are significant in many applications. Bias instability (BI) is an important parameter that indicates the performance of a MEMS gyroscope and is affected by the 1/f noise of the MEMS resonator and readout circuit. Since the bandgap reference (BGR) is an important block in the readout circuit, reducing its 1/f noise is key to improving a gyroscope’s BI. In a traditional BGR, the error amplifier is applied to provide a virtual short-circuit point, but it introduces the main low-frequency noise sources. This paper proposes an ultralow 1/f noise BGR by removing the error amplifier and applying an optimized circuit topology. In addition, a simplified but accurate noise model of the proposed BGR is obtained to optimize the BGR’s output noise performance. To verify this design, the proposed BGR has been implemented in a 180 nm CMOS process with a chip area of 545 × 423 μm. The experimental results show that the BGR’s output integrated noise from 0.1 to 10 Hz is 0.82 μV and the thermal noise is 35 nV/√Hz. Furthermore, bias stability tests of the MEMS gyroscope fabricated in our laboratory with the proposed BGR and some commercial BGRs are carried out. Statistical results show that reducing the BGR’s 1/f noise can nearly linearly improve the gyroscope’s BI.

A 1.2-V 0.959-ppm/°C multi-section curvature-compensated bandgap voltage reference with trimming

This article introduces a high-precision and low temperature coefficient(TC) bandgap reference (BGR) with a 1.2 V output voltage after a novel digital trimming. A multi-section curvature compensation circuit alleviates the variation caused by the temperature dependence of the base emitter nonlinear voltage of bipolar transistors. The novel digital trimming technology is utilized to reduce the TC and improve the output voltage precision(VP) of the proposed the BGR. Designed and simulated in a 65 nm CMOS process with an active area of 0.037 mm2. Simulation results of the proposed the BGR demonstrates that its output voltage is 1.2 V, the best TC is 0.959 ppm/°C over a −40 °C to 125 °C temperature range and the power consumption of 138 μW under 3.3 V supply voltage at room temperature with trimming. In the supply voltage range of 1.8–3.4 V, the line regulation (LR) is 0.25%/V.

A New Piecewise-Compensated Bandgap Reference Circuit with a Trimming Procedure

A new CMOS bandgap reference (BGR) circuit with a piecewise-compensation circuit and a trimming network is proposed and designed to obtain a bandgap reference voltage with a low-temperature coefficient and a high precision, taking into account the effect of non-ideal factors on the results. The proposed piecewise compensation circuit is designed to achieve a constant reference voltage by using a current mirror to mirror the current, combined with a subtractive circuit and an additive circuit to obtain a low-temperature coefficient over an extensive temperature range. The trim network part is used to change the voltage value of the output reference by controlling the magnitude of the resistance value of the resistors connected to the circuit. The design and simulation of the proposed bandgap reference circuit are obtained by using Cadence Spectre simulation by SMIC 0.18 μm CMOS technology. The results indicates that when the power is 3.3 V and the temperature scope is within -40 °C to 125 °C, the output voltage is 1.2 V with the temperature coefficient equal to 0.658 ppm/°C. When the power varies within 3.2 V to 3.4 V, the linear regulating rate is 0.001019 %/V.

A 1.2V −55°C‐125°C ultra‐low noise bandgap voltage reference without start‐up circuit

AbstractThis paper proposes a novel bandgap voltage reference (BGR) with low temperature coefficient, ultra‐low noise and without start‐up circuit. Designed in a TSMC 180‐nm CMOS technology, this bandgap voltage reference operates in the temperature range of −55 to 125°C with 5‐V voltage supply and provides a 1.2‐V output voltage VBG. A 16.8 ppm/°C temperature coefficient (TC) and the output RMS noise from 0.1 to 10 Hz of 1.69 µV is achieved. The circuit‐level simulation results verify the presented structure. By the improved architecture of the IPTAT generation stage, the proposed BGR can be powered on normally without designing additional start‐up circuit to eliminate equilibrium point, which greatly simplifies the circuit complexity.

A High-Precision and Low-Power Capacitive Pressure Sensor Interface IC With Wireless Power and Data Transfer for a Pressure Sensor Implant

This article presents a system-on-a-chip (SoC) for pressure sensors in 180-nm CMOS technology. It can interface with a capacitive pressure sensor with an inductive wireless power supply and data transmission via load-shift keying (LSK). It integrates an analog front end (AFE), bandgap references (BGRs), delta-sigma ADC, I2C, RC oscillator, low-dropout regulators (LDOs), shorting control switches, and full-bridge rectifier (Rct). An external coil receives wireless power, which is rectified and regulated to 1.8 V by the full-bridge Rct and LDOs. The AFE samples the capacitance change of the pressure sensor to a voltage that is converted into 19-bit digital data by the delta-sigma ADC, which is then converted into 43 Hz per sample serial data by the I2C block. A temperature sensor is included, and 19-bit measurements are transmitted in serial with capacitance data. Serial data are transmitted wirelessly using LSK. This SoC has a measured accuracy of 1 mmHg between 575- and 900-mmHg absolute with a wireless power supply and wireless data transfer.

A novel bandgap voltage reference based on folding compensation

AbstractThis letter proposes a novel bandgap reference circuit that utilizes both curvature and folding compensation to achieve a temperature coefficient (TC) of 2.23 ppm/°C. Unlike traditional BGRs, the unique folding compensation method of this circuit improves the performance at low temperature and can also be applied within a specific temperature range.

Design of a Wide Input Voltage Low Quiescent Current LDO

A low-dropout linear regulator (LDO) with wide input voltage range, wide output voltage range and low quiescent current power consumption is proposed, which is applied to the switching power supply chip to power the internal module of the switching power supply chip. The low-dropout linear regulator is based on a P-type PowerFET design consisting of an error amplifier, a Bandgap reference. The circuit was designed and implemented by SMIC 0.18um BCD process, simulated and verified using Spectre software. The simulation results show that the linear regulation is 0.04mV/V in the input voltage range of 3.5-30V, and the load regulation is 1mV/mA in the output load current range of 10uA to 10mA, and the quiescent current is only 10uA.

Design of a High Precision RC Oscillator

This paper introduces a high-precision RC oscillator circuit that is less affected by temperature and supply voltage. The circuit mainly consists of a bandgap reference voltage source, a low-voltage linear regulator, a low-pass filter, and a digital trim circuit, which reduces the circuit's sensitivity to temperature variations and achieves high stability of the oscillator frequency over a wide temperature range. Because of the current digital trimming technique, the circuit's ability to cope with the effects of frequency instability caused by process deviations is further enhanced.The simulation results show that the output center frequency accuracy is maintained within ±0.5% under the supply voltage range of 2.5V~5.5V, temperature range of -40?~125?, and different process corners. The RC oscillator has a high precision output frequency and can be used as a clock signal for a number of highly integrated and high precision applications.

Development of an Optoelectronic Integrated Sensor for a MEMS Mirror-Based Active Structured Light System.

Micro-electro-mechanical system (MEMS) scanning micromirrors are playing an increasingly important role in active structured light systems. However, the initial phase error of the structured light generated by a scanning micromirror seriously affects the accuracy of the corresponding system. This paper reports an optoelectronic integrated sensor with high irradiance responsivity and high linearity that can be used to correct the phase error of the micromirror. The optoelectronic integrated sensor consists of a large-area photodetector (PD) and a receiving circuit, including a post amplifier, an operational amplifier, a bandgap reference, and a reference current circuit. The optoelectronic sensor chip is fabricated in a 180 nm CMOS process. Experimental results show that with a 5 V power supply, the optoelectronic sensor has an irradiance responsivity of 100 mV/(μW/cm2) and a -3 dB bandwidth of 2 kHz. The minimal detectable light power is about 19.4 nW, which satisfies the requirements of many active structured light systems. Through testing, the application of the chip effectively reduces the phase error of the micromirror to 2.5%.

A 64-MHz 2.15-µW/MHz On-Chip Relaxation Oscillator with 130-ppm/°C Temperature Coefficient

This paper presents a 2.15 µW/MHz at the frequency of 64 MHz relaxation oscillator with a dynamic range of frequency from 47.5 MHz to 80 MHz. To reduce the power consumption and improve energy efficiency, this work employs only one comparator and one capacitor to generate the output clock in comparison with conventional relaxation oscillator structures. A total of 50% ± 5% of the duty cycle is obtained for the output clock by implementing an auxiliary comparator. The proposed relaxation oscillator uses the output voltages of an external low-dropout (LDO) voltage and bandgap reference (BGR) for the required supply and reference voltages, respectively. Two current sources are implemented to provide the required currents for trimming the output frequency and driving the comparators. Measurement results indicate that the relaxation oscillator achieves a temperature coefficient (TC) of 130 ppm/°C over a wide temperature range from −25 °C to 135 °C at the frequency of 64 MHz. The relaxation oscillator consumes 115 µA of current at the frequency of 64 MHz under a low-dropout (LDO) voltage of 1.2 V. The proposed relaxation oscillator is analyzed and fabricated in standard 90 nm complementary metal-oxide semiconductor (CMOS) process, and the die area is 130 µm × 90 µm.

Bandgap reference, temperature sensor and low drop-out regulator circuits monolithic sensors in TPSCo 65 nm ISC technology

With Inner Tracking System v3 (ITS3), the ALICE experiment is pursuing a wafer-scale Monolithic Active Pixel Sensor (MAPS). The chip is being developed in TPSCo 65 nm ISC technology which is under study in the framework of CERN EP R&D on monolithic sensors for High Energy Physics (HEP) applications. This contribution presents designs and measurement results of building blocks needed for this chip, in particular bandgap references and temperature sensors. In addition, simulation results of the design of Low Drop-out Regulator (LDO) to be submitted for the next prototyping run will be discussed.

An Ultra Low-Power Programmable Voltage Reference for Power-Constrained Electronic Systems

This paper proposes a novel architecture for the generation of a programmable voltage reference: the background-calibrated (BC)-PVR. Our mixed-signal architecture periodically calibrates a static ultra low-power voltage reference generator, from an accurate bandgap reference. The portion of the chip used for the calibration can be powered down with a programmable duty-cycle. The system aims to fully exploit the small temperature derivative vs time <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$D_{T}$ </tex-math></inline-formula> of several application domains to minimize the average current consumption. The BC-PVR has been designed and implemented in TSMC 55-nm CMOS technology, and it achieves the largest reported programming reference output range [0.42 - 2.52] V, over the temperature range [−20, 85] °C. The duty-cycle mode allows nanoampere current consumption, and the large design flexibility permits to optimize the system performance for the specific application. These features make the BC-PVR very well-suited for power-constrained electronic systems.

Temperature-Insensitive Ka-Band Transceiver With Ultralow-Noise Self-Calibrated Low Dropout Regulator in 65-nm CMOS

This article proposes a Ka-band transceiver with an integrated local oscillator (LO) generator and multiple low dropout regulators (LDOs) to eliminate the strict requirements to the external power supply network. The proposed self-calibrated LDO eliminates the use of a bandgap reference circuit and its large flicker noise contribution in traditional power regulators to achieve ultralow-noise performance. The output of the proposed LDO is self-calibrated with temperature and process variations by autoconfiguring the feedback coefficient through a digital loop to guarantee the stable performance of its loaded high-speed circuits. The stable gain and output power of the transceiver with temperature variation are achieved by on-chip multiple self-compensation schemes, which include a self-sensing LDO for the power amplifier, a constant- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$G_{\!m}$ </tex-math></inline-formula> bias circuit for the amplification stages, and the temperature-compensated intermediate-frequency amplifiers (TC IFAs) with proportional-to-absolute-temperature (PTAT) gain to further compensate for the gain deviation caused by the second-order effect and large-signal performance difference. Implemented in 65-nm CMOS technology, measurements indicate that the output noise of the proposed LDO is as low as 15 nV/sqrt (Hz) at 10-kHz offset and the integrated power network greatly reduces the noise influence on the LO signal compared with the traditional bandgap-referenced LDO. Furthermore, due to the adoption of the proposed temperature compensation scheme, the small-signal gains of the receiver and transmitter only fluctuate by 1.1 and 1.3 dB from <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$- 40\,\,^{\circ }\text{C}$ </tex-math></inline-formula> to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$85~^{\circ }\text{C}$ </tex-math></inline-formula> , respectively, and the output saturated power of the transmitter varies by 0.7 dBm over the entire temperature range.

MOS only nano-watt sub-bandgap voltage reference

This paper presents a nano-watt bandgap voltage reference (BGR). The self-cascode structure is provided as a proportional-to-absolute-temperature (PTAT) voltage. Due to the low slope of the PTAT voltage, a voltage divider consisting of five similar MOSFET transistors is presented. The resulting output voltage will be one-fifth of the complementary-to-absolute-temperature voltage and four-fifths of the PTAT voltage. All MOSFETs are standard CMOS transistors biased in the sub-threshold region where one of them is utilized as a diode. Post-layout simulation results using the standard 0.18 µm CMOS process show a nominal output voltage of 0.132 V. The power consumption is 12.7 nW at 0.7 V of the power supply. The average temperature coefficient (TC) is about 28.5 ppm/°C over a temperature range of 0 °C–100 °C. The proposed BGR occupies a small area of 0.00083 mm2.

Radiation-aware analog circuit design via fully-automated simulation environment

As a result of increased interest in space applications, radiation-aware circuit design has become a major concern to guarantee the safe operation of electronic systems operating under extreme space conditions. As the first step, several ad-hoc simulation approaches have been developed in analog and digital domains to estimate the functional behavior of circuits exposed to high radiation. However, most of these tools are application specific and stand-alone (not integrated into the simulation tools). Also, several commercial CAD solutions exist; however, access to these tools is limited due to security measures. To this end, we have developed a well-equipped, SPICE-integrated, and free-to-access simulation tool, RadiSPICE, capable of running statistical radiation simulations and performing extended temperature and sensitivity analyses. By using RadiSPICE, one can readily predict the functional behavior of circuits after long-term or short-term radiation effects. Moreover, the sensitivity analysis reveals vulnerabilities of the design against radiation and provides valuable design hints to the designer to make circuits radiation-hardened. To demonstrate the proposed tool, we have performed several experiments on two analog building blocks with different topologies (bandgap reference and comparator circuits) using RadiSPICE and discussed the robustness of the designs in detail.

A radiation hard bandgap voltage reference for the ARCADIA project

This work presents the design and characterization results of a radiation hard bandgap reference circuit fabricated in a 110 nm CMOS technology for the Main Demonstrator chip of the ARCADIA project. The design, based on a current-mode approach in order to be able to output a smaller than 1.2 V reference voltage, employs diode-connected MOSFETs instead of BJTs to enhance the radiation hardness and a second amplifier to improve the current mirror of the output branch and therefore the line regulation of the circuit. This paper describes the features of the circuit and its measured results.

Design of LDO circuit based on curvature compensation reference closed-loop stability

In this paper, a low dropout (LDO) circuit based on a curvature compensation benchmark and closed-loop stability is designed. This circuit compensates for the higher order term of VBE in a BJT through the subthreshold characteristic of MOSFET and achieves the effect of curvature compensation. The bandgap reference circuit provides a stable input voltage for the LDO circuit, while the source follower and adaptive bias circuit improve the response speed and closed-loop stability of the LDO circuit. The temperature drift coefficient of the bandgap circuit is 8.11 ppm/°C, the input voltage is 3–5 V, the output voltage is 2.8 V, and the linear adjustment rate is 0.22%.

Novel Methods for Improved Particle Swarm Optimization in Designing the Bandgap Reference Circuit

Novel Methods for Improved Particle Swarm Optimization in Designing the Bandgap Reference Circuit

Design and preliminary results of a shunt voltage regulator for a HV-CMOS sensor in a 150 nm process

This paper presents the design and preliminary results of a shunt voltage regulator and two different bandgap reference designs for use with a monolithic High Voltage CMOS (HV-CMOS) sensor in a 150 nm technology node. One bandgap reference design is based on Bipolar Junction Transistors (BJTs) as the reference element of the circuit — the rest of the circuit is entirely designed with Metal–Oxide–Semiconductor Field-Effect Transistors (MOSFETs). The second bandgap reference design makes use of MOSFETs exclusively.