Automatic Test Equipment Research Articles

The Application of Siemens S7-200 PLC Based on Waste Automatic Test System

This paper with Siemens S7-200 PLC as core controller, has realized automatic transmission device of waste automatic test. The system hardware, software design are described, and using WinCC Flexible configuration software on human-computer interface configuration, to achieve the production line equipment real time control and status monitoring. Finally, the summary of the thesis, and put forward some further research prospect.

BIT Design of Hierarchical Structure of Avionics System

To solve the problem that the BIT system of avionics system is insufficient in testing and isolating power and occupies too many resources, this paper proposes a new distributed hierarchical structureBIT (Built In Test) architecture for avionics system, which only uses monolithic SoC(System on Chip)to build a three-level BIT system of device, module and LRU(Line Replaceable Units). This system creates embedded ATE(Automatic Test Equipment)in module and can carry out boundary scan and signal detection, diagnosis, report, record and processing; it establishes airborne internal detection bus and realizes the transmission of information related to BIT; it uses control command, builds a BIT system independent of device capabilities in master-slave mode and can interact with ATE in off-line state. The experimental results show that the design in this paper is superior to the BIT design technique that traditionally uses FPGA to conduct boundary scan and construct MTM bus and is featured by powerful function, small volume and low cost to become the preferred program of BIT system of avionics system.

Automatic soil water retention test system with volume change measurement for sandy and silty soils

The determination of soil water retention curves requires the volume to be measured in order to calculate the void ratio and degree of saturation. The volume change of sample during drying and wetting cycles in soil water retention test is obvious and non-ignorable, especially for soils with deformability. The soil water retention curve is generally superimposed with the volume change of soil specimens. However, in general, many apparatus that are used for soil water retention testing cannot measure the volume change during the test process. In this study, a modified experimental system, which can measure and record volume change during test, and also can control the entire testing process via computer, is proposed to determine the soil water retention curve. The new system has several advantages over existing apparatus. Notable amongst them is that it can automatically determine both the wetting and the drying characteristics with high accuracy, and can measure volume change during test, using only one sample. This technical note presents the design detail and algorithm for control software. Water retention curves considering volume change are determined for four types of soil, ranging from sandy to silty. Then the effect of volume change on soil water retention curve is briefly discussed.

Use of an Automatic Methane Potential Test System for evaluating the biomethane potential of sugarcane bagasse after different treatments

A multi-channel analyzer was used to evaluate biogas potential of sugarcane bagasse (SCB). The Automatic Methane Potential Test System contained fifteen parallel reactors and the same number of gas flow meters attached to the acquisition system. The set of reactors – gas flow meters gave reproducible results during anaerobic digestion of chemically defined carbon source and the units were used to evaluate the biomethane potential of SCB after different pretreatments, such as treatment with water, acid, acid followed by enzymatic treatment and acid followed by treatment with inactive enzymes. Combined pretreatment with 2% sulphuric acid and enzymatic hydrolysis (3.5% enzymes) resulted in conversion of 79% to monomeric sugars present in SCB. SCB treated with acid followed by enzymatic hydrolysis achieved the methane yield of 200NL per kg VSadded. Enzymatic saccharification of acid pretreated SCB resulted in increase of methane yield by 16±5% compared to that from acid treated SCB.

Het nut van de item respons theorie bij de constructie en evaluatie van niet-cognitieve instrumenten voor selectie en assessment binnen organisaties

The usefulness of item response theory for the construction and evaluation of noncognitive tests in personnel selection and assessment The usefulness of item response theory for the construction and evaluation of noncognitive tests in personnel selection and assessment In this article we discuss the use of IRT for the development and application of noncognitive measures in personnel selection and career development. We introduce the basic principles of IRT and we discuss the usefulness of IRT to evaluate the quality of items and tests to assess the measurement precision of a candidate’s trait level, and to investigate item and test bias. Furthermore, we describe several applications of IRT, including computerized adaptive testing and the development of item banks in an automated testing system. Finally, a list of software programs is provided to stimulate the use of IRT models.

Implementation of an Intelligent Integrated Detection System Based on Virtual Instrument for Different Missiles

Aiming at the intelligent integrated detection System for test and measurement of many different missiles, utilizing the data acquisition technology, virtual instrument technology and signal analysis technology synthetically, in this paper, we introduced the system architecture and accomplished the hardware design and software implementation. Practical applications of the prototype system have proven that this intelligent integrated detection system has more powerful functions, better interaction and more convenient operation than the traditional automatic test system(ATS), it have met the needs of test and measurement of several different missiles

An Agent and Web Service-Based Surge Protection Devices Automatic Test System

The existing old SPD(Surge Protection Device) test systems have following defects: they are isolated computer systems; when enterprise management applications or processes change, they can not respond in time to deal with the diversifications. To solve these problems, firstly, this paper analyzes the agent and web service-based lightning protection testing system architecture; secondly, this paper analyzes the architecture of SPD automatic test system; Finally, we designed and implemented the agent and web service-based SPD test system, the practical application show that the system overcame the shortcomings of old systems, integrated with other systems through the agent and web service architecture, avoided forming information silos, was smart to respond to the diversifications of enterprise management applications or processes.

Study on Instant Original Characteristic Calculation and Matching Method for Torque Converter Test Automation

To obtain the original characteristic of torque converter automatically and efficiently, a test automation system of torque converter is set up based on electric power cycling technology, and a test automation software is programmed by Labview language based on serial communication and technology. This test automation system realizes the load electric power recovery, test data acquisition and processing, the torque converter original characteristic curve generation, matching calculation with the engine, saving the test data and curve pictures, and the formal report generation automatically. The high efficiency and convenience of the test system are illustrated by a practical application.

Design and Realization of a Certain Missile Servo Mechanism Test System

To improve the efficiency and precision of missile servo mechanism testing, as the research object, a certain missile servo mechanism was studied in this paper. Based on PC/104 bus and virtual instrument technique, a missile servo mechanism automatic test system was presented, and the design and development on hardware and software of the system was described in detail. The system, which is featured with its simple operation, high precision, high reliability, scalable and portable test software, has been proved to be feasible by the test result.

Reflection Phase Shift for PWB and PCBA Production Testing

Testing of printed wiring boards (PWBs) and printed circuit board assemblies (PCBAs) is part of electronics production that has a great impact on profitability. High throughput and low cost testing is always needed for high quality and reliability. Bare board testing, that is, testing before loading components, is crucial, and can detect such defects as opens, bridges, near-opens, near-bridges, and characteristic impedance mismatches due to process variations and compounding raw material tolerances. If not detected at the bare board stage, the cost of defects can increase 10-fold. Another motivation for an unpopulated board test is that loading expensive components on a set of defective boards could be economically catastrophic. Flying probe systems, which were developed in late 1980s, are commonly used and favorable to perform bare board isolation and continuity testing, especially when the volume is not great enough to justify bed-of-nails purchase. Flying probe system performance for a given bare board depends on the test algorithm, the mechanical speed, and the number of probes. To reduce the cost on expensive test probes and probe maintenance and to accelerate the test time, this paper presents a new and cost-efficient approach to testing both populated and unpopulated boards with open sockets, using a single probe. Specifically, a coaxial probe injects one frequency signal into the PWB trace, and the phase shift between the reflected signal from the trace and the incident wave is detected and compared with the nominal value. This nominal value is determined by testing a defect-free board that already passed direct continuity and isolation testing. By applying this test solution to bed-of-nails equipment, we reduce the amount of probes by 50%. By employing this solution to flying probe systems with two probes, for a given design with NI isolated traces and NA adjacent pairs, we reduce the number of tests from (NI + NA) tests to NI tests as isolation and continuity are performed in one go. Flying probe systems involve mechanical movements that dominate the test time. By reducing the number of mechanical movements, we will dramatically increase test throughput. The experiments demonstrate feasibility for practical use in automatic test equipment (ATE) for PWB and PCBA testing. At the highest sensitivity of the phase shift detector, the prototyped tester is capable of distinguishing between a defective and error-free board with significant margins in case of defects such as opens, DC and RF bridges, and exceeded and different width lines. The margin in the measurement between a defective and a correct board, which depends on the type of the defect, is about 7% to 68%. In the case of loaded board testing, the approach is capable of detecting opens with important margins (our test cases showed 40% and 33%), which makes it a strong candidate approach to be applied officially to PCBA testing where probing is feasible. The approach can be applied to the complete layout or to boost the test strategy where the applied test solutions do not cover 100% of the possible defects.

Novel method for identifying the cause of inherent ageing in Electron Multiplying Charge Coupled Devices

The charge multiplication process used in the Electron Multiplying CCD (EMCCD) is subject to an ageing effect in which the gain achieved at particular avalanche potentials, gradually decreases during operation. To utilise these devices for both space and terrestrial applications where recalibration of the gain is not feasible, a comprehensive understanding of the ageing process is required.A custom automated test equipment (ATE) has been produced and used to develop the techniques required for investigating the ageing process alongside the verification of simulation work on the subject. Simulation work carried out by e2v technologies has suggested hole build-up at the Si/Si02 interface below one of the transfer gates. This build up of holes has now been linked with a reduction in avalanche potential in the device. A novel experimental technique has therefore been developed to determine the actual potentials within the device and thereby determine the validity of this prediction.The initial results tend to support simulation as an increase in the potential beneath one of the phases is observed.

The Design and Research of the Flight Simulator Motion System and Visual System

Based on the motion system and visual system design of flight simulator, the software and hardware design in motion system and visual system of flight simulator is regared as key problem. The fidelity automatic test system is discussed. The aim is to explore a complex system integration method. The fidelity automatic test system is used to detect the fidelity of motion system and visual system. The results show that the design of motion and visual system is reasonable and the performance can meet demand of fidelity.

Development and Uncertainty Analysis of an Automatic Testing System for Diffusion Pump Performance

Abstract A newly developed automatic testing system used in laboratory for diffusion pump performance measurement is introduced in this paper. By using two optical fiber sensors to indicate the oil level in glass-buret and a needle valve driven by a stepper motor to regulate the pressure in the test dome, the system can automatically test the ultimate pressure and pumping speed of a diffusion pump in accordance with ISO 1608. The uncertainty analysis theory is applied to analyze pumping speed measurement results. Based on the test principle and system structure, it is studied how much influence each component and test step contributes to the final uncertainty. According to differential method, the mathematical model for systematic uncertainty transfer function is established. Finally, by case study, combined uncertainties of manual operation and automatic operation are compared with each other (6.11% and 5.87% respectively). The reasonableness and practicality of this newly developed automatic testing system is proved.

Automated Testing System for a CAN Communication Circuit

Automated Testing System for a CAN Communication Circuit

Interoperability Verification in ISO 18000-7 Active RFID Systems: Experimental Setup and Results

Interoperability in an RFID system conforming to ISO 18000-7 standard is defined as the ability of any commercial interrogator to communicate with any commercial tag. A possibility that conformance verification in the physical communication layer between active tags and interrogators (readers) does not satisfy the interoperability property is established. Challenging the traditional or matrix test to verify interoperability, a novel methodology to verify interoperability for active RFID systems in particular and all communication systems following a command-reply protocol in general is introduced in a prior publication. In this article, the methodology is experimentally implemented using industry standard laboratory equipment and automation tools to develop a fully automated interoperability test suite. The automated test system design considerations, challenges and results are discussed in detail. For a particular equipment, the NI-5671 Radio Frequency Signal generator, the maximum number of samples that can be tested for different parameters of the physical communication layers are provided. The equipment limitations are discussed to provide the reader with guidelines to experiment with, and a reference to evaluate the resolution (one measure of the accuracy of the test) of different equipment. The different parameters considered in the test and their interactions in determining the interoperability property are recorded.

A Built-in Self-Diagnosis and Repair Design With Fail Pattern Identification for Memories

With the advent of deep-submicrometer VLSI technology, the capacity and performance of semiconductor memory chips is increasing drastically. This advantage also makes it harder to maintain good yield. Diagnostics and redundancy repair methodologies thus are getting more and more important for memories, including embedded ones that are popular in system chips. In this paper, we propose an efficient memory diagnosis and repair scheme based on fail-pattern identification. The proposed diagnosis scheme can distinguish among row, column, and word faults, and subsequently apply the Huffman compression method for fault syndrome compression. This approach reduces the amount of data that need to be transmitted from the chip under test to the automatic test equipment (ATE) without losing fault information. It also simplifies the analysis that has to be performed on the ATE. The proposed redundancy repair scheme is assisted by fail-pattern identification approach and a flexible redundancy structure. The area overhead for our built-in self-repair (BISR) design is reasonable. Our repair scheme uses less redundancy than other redundancy schemes under the same repair rate requirement. Experimental results show that the area overhead of the BISR design is only 4.1% for an 8 K × 64 memory and is in inverse proportion to the memory size.

Test System of the Static and Dynamic Performance of the Proportional Solenoid

Proportional solenoid is the key component in electro-hydraulic proportional control systems. The static and dynamic performance of the proportional solenoid directly affects the control accuracy, response speed and reliability of the whole system. To test the static and dynamic performance of the proportional solenoid accurately, reliably as well as conveniently, an automatic test system with the combination of the sensor and control technology is developed in this paper. The entire system consists of mechanical structure which could position the proportional solenoid and adjust the displacement, the control and measurement part whose main function is to control the motion of the stepper motor ,set the drive current of the solenoid through the proportional amplifier and collect data. The experimental apparatus allows rapid switch between static test and dynamic test through two vertically-positioned pins and other accessories, which makes this test system different from the others. The experimental results demonstrate the feasibility and the rationality of the design.

Resolver-to-Digital Conversion Using Correlation Algorithm

A resolver-to-digital conversion algorithm for Automatic Test System (ATS) using correlation method is presented. Sample little more than one cycle excitation signal, sine stator signal and cosine stator signal of a resolver, then use four-parameter least square wave fit algorithm to estimate the accurate frequency of the excitation signal. A standard sinusoid with any amplitude could be constructed based on the calculated frequency. Then the sinusoid is used to correlate with sine stator signal, cosine stator signal and excitation signal in order to eliminate the noises. By searching for the max values and indexes of denoised sine stator signal, cosine stator signal and excitation signal, their amplitudes and phases could be obtained. Finally based on a look-up table, any angle in 360 degrees range could be calculated with the error in 1.8e-4 rad and around 0.5 ms delay. The method shows strong portability. Computer simulation and industrial application demonstrate the effectiveness and applicability of the proposed algorithm.

Concurrent Testing of ADC for Embedded System

Compaction testing methods allow at-speed detecting of errors while possessinga low cost of implementation.Owing to this distinctive feature, compaction methods have been widely used for built-in testing, as well asexternal testing. In the latter case, the bandwidth requirements tothe automated test equipment employed are relaxedwhich reduces the overall cost of testing.Concurrent compaction testing methods use operational signals to detect misbehavior of the device under test and do not require input test stimuli. These methods have been employed for digital systems only. In the present work, we extend the use of compaction methods for concurrent testing of analog-to-digital converters. We estimate tolerance bounds for the result of compaction and evaluate the aliasing rate. Introduction Modern very large-scale integrated mixed-signal devices often incorporate a microcontroller, field-programmable gate array and programmable analog [1]. These devices, referred to as systems-on-chip can represent a complete solution for many tasks. A task typically involves the acquisition of analog signals with further conversion to discrete form, digital processing, and the final conversion of the results back to analog form. Conversion of analog signals to digital form is performed by an analog-to-digital converter (ADC), whereas the opposite process is done by a digitalto-analog converter (DAC). An SOC may contain few ADCs and DACs. The complexity of an ADC is normally much higher than that of a DAC. This makes an ADC more vulnerable to failures. In addition to sudden failures, it can be subject to gradual failures due to the presence of analog components. Even small deviations of the parameters of these components may drastically influence the overall operation of the device. The more accurate is an ADC, the greater could be the effect.It is therefore equally important to detect any of these types of a failure in the operation of an ADC.

FPGA Auto Configuration Based on ATE

FPGAs (Field Programmable Gate Arrays) are highly integrated devices which can be programmed as variable functions. The application-level testing of FPGAs usually include multiple reconfigurations and relevant functional tests respectively through ATEs (Automated Test Equipments). However, test engineers are facing a tough problem to reconfigure FPGAs automatically through an ATE instead of using specific tools and download cables provided by FPGAs manufacturers. This paper takes example for XILINX Virtex-E series, presents two different methods for FPGA auto configuration based on an ATE using JTAG configuration interface and boundary-scan protocol, and accomplishes the entire auto configuration-test procedure by a single ATE.