Au Gate Research Articles

Solid-state reaction between Pr and SiO 2 studied by photoelectron spectroscopy and ab initio calculations

We report on the structural and electrical properties of Pr-based high- k dielectric films fabricated by solid-state reaction between metallic Pr and SiO 2 underlayers. A non-destructive depth profiling using synchrotron radiation excited photoelectron spectroscopy (SR–PES), X-ray photoelectron spectroscopy (XPS) and transmission electron microscopy (TEM) were employed to examine the chemical composition and microstructure. Ab initio calculations were done to gain insight into the physical processes involved. SR-PES results indicate that Pr deposition at room temperature (RT) leads to the formation of a Pr silicide and a Pr oxide, what is in good agreement with the scenario expected from ab initio calculations. As revealed by TEM and electrical measurements, oxidation of the reacted structures, followed by annealing, results in a stacked dielectric composed of a SiO 2-based buffer with an enhanced permittivity and a Pr silicate film with a high dielectric constant. The leakage current density of 10 −4 A/cm 2 was measured for stacks with capacitance equivalent thickness (CET) of 1.5 nm prepared by evaporation of the Pr layer on a 1.8 nm SiO 2 film, followed by oxidation in air ambient and annealing in N 2 atmosphere. The capacitance-voltage ( C– V) curves exhibit a large flatband voltage ( V FB) shift indicating the presence of a positive charge in the stack. Switching away from the Al contacts to Au gate electrodes introduces a significant reduction of the V FB by 1.3 eV, what is much more than the change expected from the work function difference between Al and Au (∼0.9 eV). This in turn implies that V FB is strongly affected by the gate interface electrode.

Field-effect NO2 sensors with group 1B metal gates

Flat-band voltage shifts of MOS capacitors with continuous Cu, Ag and Au gates, in response to controlled NO2 bearing atmospheres, are inversely related to changes in the work function, measured by ultraviolet photoelectron spectroscopy. Device sensitivity is conditioned by the rate of analyte arrival to the gate–dielectric interface, which decreases by reactive behavior of Cu and Ag gates, evidenced by concentration independence of the response and discharge times. Maximum response is obtained for Au gates, in which NO2 adsorption is molecular and non-dissociative, despite minimal work function change.

NO 2 sensitive Au gate metal–oxide–semiconductor capacitors

Au gate metal-oxide-semiconductor capacitors are sensitive to NO2 in air up to 200 ppm, depending on operating temperature (100 °C to 200 °C), gate thickness (50 to 900 nm), and morphology. In the absence of catalytic properties or lattice diffusivity, a model invoking molecular surface adsorption and grain boundary diffusion is proposed, which quantitatively describes the transient and steady state response of the devices. Sensitivity is given by the arrival of the diffusing species to the gate–dielectric interface, where capacitive coupling of the adsorbed molecules induces work function changes, which shift the flat band voltage positively, opposite that observed for H2 with Pd gates, consistently with an oxidizing, rather than reducing, character.

New NO 2 sensor based on Au gate field effect devices

A new NO 2 field effect gas sensor based on Au gates is demonstrated and the influence of gate morphology on sensor response is evaluated. A sensitization mechanism, for non-catalytic continuous gates, based on grain boundary diffusion is proposed. The sensors are fabricated as MOS (metal-oxide-semiconductor) capacitors with sputtered or thermal evaporated Au gates (at different substrate temperatures) with thickness between 75 and 960 nm. The devices’ sensitivity, in the range of 15–200 ppm of NO 2 in dry air, depends strongly on gate morphology; shorter response times and larger voltage shifts are correlated with smaller grain sizes. Scanning-electron-microscope (SEM) images show that the microstructure is very stable after 5 months of gas exposure at temperatures up to 200°C. The sensors are selective to NO 2 (with NO, H 2 and CO as interfering gases) and selectivity depends also on gate structure.

Fabrication process of field emitter arrays using focused ion and electron beam induced reaction

Metal-gated Pt field emitter arrays (FEAs) have been manufactured using a dual beam system consisting of focused ion and electron beams. The gate opening in Nb or Au gate layers was produced by physical sputtering using a focused ion beam and subsequent wet etching of the underlying silicon dioxide layer. Deposition of a platinum tip into the gate opening using electron-beam-induced chemical reaction resulted in field emission without any thermal annealing process. After wet etching an enlargement of the gate opening in Nb-gated FEAs was observed due to the beam-induced enhanced etching. In contrast, the smaller gate opening in Au-gated FEAs was easily fabricated because of the suppression of the enhanced etching. Consequently, the gate opening was controlled by selection of the gate metal material. The turn-on voltage for field emission decreased by decreasing the diameter of the gate opening.

Schottky gating high mobility Si/Si1−xGex 2D electron systems

A high mobility (3.6×105 cm2/V s) n-type Si/Si1−xGex heterostructure has been Schottky gated using Au metal to cover the whole of the device. Over the front-gate voltage (Vg) range for which there was negligible gate leakage (−0.1 V<Vg<0.1 V), the carrier density could be varied from 1.7×1011 to 4.4×1011 cm−2. Measurements of the quantum lifetime suggested that the quality of the device varied in a manner not indicated by the transport mobility. This may arise from inhomogeneities caused by energy-level broadening. The results can be explained by a surface-roughened Au gate whose influence is negated at zero front-gate voltage due to a frozen-in screening charge in the doping layer.

High-field electrical conduction in polyimide films

Electrical conduction current in polyimide films has been measured at high fields (&amp;gt;1.4 MV cm−1) using a Au metal (M)–polyimide film (P)–p-silicon (S)–MIS structure. On the basis of the current–voltage characteristics coupled with the capacitance–voltage characteristics measured under various conditions, it is found that electrical conduction at high fields is mainly due to Fowler–Nordheim type tunneling injection of electrons from the Au gate electrode if it is negatively biased, or from the PI/Si contact if the Au gate electrode is positively biased. The conduction current is strongly dependent on the concentration and the centroid location of the trapped charges. Computer simulation reveals that the trap concentration is of the order of 6×1017 cm−3 with its centroid located near the electron injecting contact, and that the trap ledge occurs only when the concentration of the net negatively trapped electron charge is large or the location of its centroid is close to the injecting contact. The decay of the dark charging current after the application of a step-function direct current field is associated mainly with the time-dependent trap-filling process. The photoconduction under an ultraviolet light illumination is due mainly to the photogeneration of free holes. Polyimide is very sensitive to the environmental humidity. Electrical conduction current increases and the breakdown strength decreases rapidly with increasing humidity.

Extremely low-noise performance of GaAs MESFETs with wide-head T-shaped gate

Fully ion-implanted low-noise GaAs MESFETs with a 0.11-/spl mu/m Au/WSiN T-shaped gate have been successfully developed for applications in monolithic microwave and millimeter-wave integrated circuits (MMICs). In order to reduce the gate resistance, a wide Au gate head made of a first-level interconnect is employed. As the wide gate head results in parasitic capacitance, the relation between the gate head length (L/sub h/) and the device performance is examined. The gate resistance is also precisely calculated using the cold FET technique and Mahon and Anhold's method. A current gain cutoff frequency (f/sub T/) and a maximum stable gain (MSG) decrease monotonously as L/sub h/ increases on account of parasitic capacitance. However, the device with L/sub h/ of 1.0 /spl mu/m, which has lower gate resistance than 1.0 /spl Omega/, exhibits a noise figure of 0.78 dB with an associated gain of 8.7 dB at an operating frequency of 26 GHz. The measured noise figure is comparable to that of GaAs-based HEMT's.

Enhancement-mode high electron mobility transistors (E-HEMTs) lattice-matched to InP

The fabrication and characterization of high-speed enhancement-mode InAlAs/InGaAs/InP high electron mobility transistors (E-HEMTs) have been performed. The E-HEMT devices were made using a buried-Pt gate technology. Following a Pt/Ti/Pt/Au gate metal deposition, the devices were annealed in a nitrogen ambient, causing the bottom Pt layer to sink toward the channel. This penetration results in a positive shift in threshold voltage. The dc and RF performance of the devices has been investigated before and after the gate annealing process. In addition, the effect of the Pt penetration was investigated by fabricating two sets of devices, one with 25 nm of Pt as the bottom layer and the other with a 5.0 nm bottom Pt layer. E-HEMTs were fabricated with gate lengths ranging from 0.3 to 1.0 /spl mu/m. A maximum extrinsic transconductance (g/sub mext/) of 701 mS/mm and a threshold voltage (V/sub T/) of 167 mV was measured for 0.3 /spl mu/m gate length E-HEMTs. In addition, these same devices demonstrated excellent subthreshold characteristics as well as large off-state breakdown voltages of 12.5 V. A unity current-gain cutoff frequency (f/sub t/) of 116 GHz was measured as well as a maximum frequency of oscillation (f/sub max/) of 229 GHz for 0.3 /spl mu/m gate-length E-HEMTs.

V-band amplifier using InGaP/InGaAs/GaAs heterostructure MESFETs with asymmetric Au gate head

Self-aligned n/sup +/ i-InGaP/n-InGaAs/i-GaAs heterostructure MESFETs (N-MESFETs) with a gate length of 0.16 /spl mu/m were developed for applications to microwave and millimeter-wave wireless communication systems. A T-shaped Au/WSiN gate was used and the 0.8-/spl mu/m-wide Au gate head was deliberately shifted toward the source in order to reduce the parasitic feedback capacitance. Shifting the Au gate head by 0.2 /spl mu/m, the gate-to-drain capacitance decreased by 43 fF/mm and the maximum stable gain was improved by 1 dB. V-band monolithic microwave integrated circuit (MMIC) amplifiers fabricated with the asymmetric gate head field-effect transistors (FETs) achieved a gain of 9.7 dB at 55 GHz; their chip size is only 0.95/spl times/0.85 mm/sup 2/.

Superconductivity and electric field effect of 90 degree grain boundaries in YBa2Cu/sub 3/O/sub 7-x/ thin films

A three terminal device was fabricated by depositing YBa/sub 2/Cu/sub 3/O/sub 7-x/ (YBCO) thin films containing 90 degree grain boundaries which was covered with a SrTiO/sub 3/ gate layer and an Au gate electrode. YBCO thin films were grown by bi-epitaxial process on LaSrGaO/sub 4/(100) substrate. The resistance versus temperature curve of the YBCO microbridge containing 90 degree grain boundaries showed double resistive transitions. This result was interpreted by the weak link effect of 90 degree grain boundaries in YBCO thin films. A large electric field effect on 90 degree grain boundaries was observed. The superconducting transition temperature of the 90 degree grain boundaries was modulated up to 11.4% by applying an electric field of 4/spl times/10/sup 4/ V/cm.

Maskless Deposition of Au on GaAs by Low-Energy Focused Ion Beam

Direct deposition of Au films on GaAs substrate was performed using low-energy focused ion beam (FIB) irradiation. Pure Au film was obtained and current-voltage (I–V) characteristics of the Au/GaAs contacts were measured. The degradation of I–V characteristics compared to those of Au/GaAs contacts formed by evaporated Au was observed even for deposition at an energy of 50 eV due to ion-irradiation-induced damage. The I–V characteristics were somewhat improved by annealing at 200°C for 1 min. As an example of application, a Au gate was formed on a GaAs/AlGaAs heterostructure using low-energy FIB direct deposition, and current control capability was demonstrated.

Electric field effect on ultrathin YBa2Cu3O7−δ grain boundary Josephson junctions

The effect of electric field on ultrathin YBa2Cu3O7−δ grain boundary Josephson junctions has been investigated. A conventional metal insulator superconductor field effect transistor structure consisting of a Pr0.55Y0.45Ba2Cu3O7−δ /YBa2Cu3O7−δ bilayer channel, a crystalline SrTiO3 dielectric, and an Au gate electrode is deposited on a SrTiO3 bicrystal substrate. At high bias current (Ibias≫Ic) the observed effect is compatible with a parallel resistor model using a value close to the bulk charge carrier density of YBa2Cu3O7−δ. At low bias current (Ibias≥Ic) an enhanced field effect not compatible with a parallel resistor model is observed. This enhanced effect is related to the field dependent dielectric properties of the crystalline SrTiO3 insulation layer.

High temperature performance of [formula omitted] pseudomorphic HEMTs with WSi x gates

WSi x gate pseudomorphic GaInP In 0.2Ga 0.8As HEMTs were fabricated, and evaluated for the purposes of high temperature operations. Based on the high thermal stability of WSi x gates, no significant change in device characteristics was observed for temperatures up to 200°C. Functional devices can still be obtained at 300°C. Comparing with the other gate materials, for example Ti Au or Al gates, WSi x demonstrates the advantages of this highly thermal stable property.

New superconducting three-terminal device based on externally controlled critical currents

It is demonstrated that at 4.2 K the critical current Ic of a superconducting Nb micro (μ) bridge (typical thickness 30 nm, length 200 μm, width 10 μm) can be reversibly varied over a wide range by applying electrical fields of the order of 108 V/m at an insulated gate prepared on top of the Nb μbridge. The preparation and the electrical characteristics of these metal/insulator/superconductor field effect transistor-like devices of the type M/NbOx/Nb, where M represents Al, Au, or Nb gate metals, are described. Additional experiments in external magnetic fields revealed that the gate-controlled effect on Ic is based on depinning due to an electric field-induced ‘quasimetallic’ state of the typically 10-nm-thick NbOx. Under optimized conditions, a gate power of less than 200 μW is needed to switch the superconducting Nb μbridge into the normal conducting state.

Electric field effect control of a superconducting YBa2Cu3O7 inductor

We discuss the design, fabrication, and testing of a thin-film superconducting voltage-controlled inductor which is made from a YBa2Cu3O7 (YBCO) superconducting field effect transistor. Applying voltage to an Au gate layer alters the areal carrier density, and hence the kinetic inductance, of an underlying 100-nm-thick YBCO channel layer. The channel is connected in series with an input coil to form a closed superconducting loop. We use a dc superconducting quantum interference device at 4.2 K to measure changes in loop inductance and find a fractional change in the kinetic inductance of about +2.6×10−4/V of applied gate voltage, close to the expected value.

A pseudomorphic GaInP/InP MESFET with improved device performance

A high-bandgap GaInP epitaxial material grown on InP to increase the Schottky barrier height of the InP MESFET is discussed. The Schottky gate materials used in this study were Au and Pt/sub 2/Si. The pseudomorphic GaInP/InP MESFET with an Au gate has a Schottky barrier height of 0.54 eV, and the reverse leakage current of the device is 10/sup -2/ times lower than that of the conventional InP MESFET. The extrinsic and intrinsic transconductance of the pseudomorphic MESFET are 66.7 and 104.2 mS/mm respectively for the 5- mu m-gate-length GaInP/InP MESFET. >

The addition of Ni in AuZn gate Ohmic contacts for InP junction field effect transistors

The fabrication and characteristics of AuZn/Ni/Cr/Au and AuZn/Ni/TiW/Au gate Ohmic contacts for InP junction field effect transistors (JFET’s) are reported. Auger electron spectroscopy sputter-depth profiles reveal substantial Ni interdiffusion at the metal–InP interface after heat treatment at 410 °C. The addition of a Ni layer significantly improves the adhesion of the contacts and a TiW barrier layer effectively maintains the conductivity of the gate metallizations after heat treatment. The specific contact resistance of the JFET gate structures is measured to be as low as 2×10−5 Ω cm2, which is the lowest value reported to date for contacts to p-type InP. InP JFET gate-drain diodes fabricated with the AuZn/Ni/TiW/Au gate contact exhibit a leakage current of ∼40 nA at −8 V for a 1μm×150 μm gate and a reverse breakdown voltage of 17.5 V at 25 μA. The contacts are shallow, as evidenced by the quality of the p+/n junctions fabricated, and thus are suitable for use in InP JFET structures where thin p+ regions are utilized.

Electric-field modulation of a Bi-Sr-Ca-Cu-O film with a polymer film as an insulator

AbstractWe fabricated the multi layered structure with Au gate electrode/polymer film/Bi-Sr-Ca-Cu-O film to study the electric-field control of high Tc superconductor. A Bi-Sr-Ca-Cu-O(BSCCO) film was fabricated using an ion beam sputtering technique. The plasma polymerization using trif luoroethane gas was used to make the gate insulator. The patterning of the BSCCO film was carried out using an ion beam etching technique. The supercurrent of the structure decreased when the gate voltage was applied to the gate electrode.

DC and microwave characteristics of modulation doped Ga0.47In0.53As/InP HFET

The DC and microwave performance of modulation doped GaInAs/InP HFETs (heterostructure FET), grown by atmospheric pressure organometallic vapour phase epitaxy is reported. An extrinsic transconductance of 300 mS/mm and a best value of the cutoff frequency, F/sub r/=14.1 GHz in a 1.5 mu m gate device was measured at room temperature. Improved performance of the Schottky gate device is obtained using an Au gate on the InP/GaInAs heterostructure layers. A low access resistance of 3 Omega mm is obtained using a self-aligned technique with high conductivity n/sup +/-GaInAs top layers.