Assembly Language Research Articles

Machine-Code Program Evolution by Genetic Programming Using Asynchronous Reference-Based Evaluation Through Single-Event Upset in On-Board Computer

This study proposes a novel genetic programming method using asynchronous reference-based evaluation (called AREGP) to evolve computer programs through single-event upsets (SEUs) in the on-board computer in space missions. AREGP is an extension of Tierra-based asynchronous genetic programming (TAGP), which was proposed in our previous study. It is based on the idea of the biological simulator, Tierra, where digital creatures are evolved through bit inversions in a program. AREGP not only inherits the advantages of TAGP but also overcomes its limitation, i.e., TAGP cannot select good programs for evolution without an appropriate threshold. Specifically, AREGP introduces an archive mechanism to maintain good programs and a reference-based evaluation by using the archive for appropriate threshold selection and removal. To investigate the effectiveness of the proposed AREGP, simulation experiments are performed to evolve the assembly language program in the SEU environment. In these experiments, the PIC instruction set, which is carried on many types of spacecraft, is used as the evolved assembly program. The experimental results revealed that AREGP cannot only maintain the correct program through SEU with high occurrence rate, but is also better at reducing the size of programs in comparison with TAGP. Additionally, AREGP can achieve a shorter execution step and smaller size of programs, which cannot be achieved by TAGP.

Current use of linux in spacecraft flight software

Spacecraft on-board computers are responsible for controlling the spacecraft platform, payloads, or other on-board devices. Their mission-specific software allows communication with ground or other on-board computers. Traditionally, on-board software has been written close to the hardware in assembly language, Ada, C, or C++, with or without a real-time operating system (RTOS) [1]. As the spacecraft computer hardware capabilities are increasing, spacecraft software is becoming larger and more complex, handling more tasks from payload data processing to landing a first stage of a launch vehicle on an ocean-going barge. Spacecraft will still continue to include very small embedded systems that can be developed without operating systems (OS), but some systems will also have large software bases, requiring efficient software development processes and reuse of existing software modules. The last decade has seen increasing use of Linux in spacecraft on-board software. This article presents common features of spacecraft on-board computers and software and discusses potential benefits and drawbacks of on-board Linux use. The focus of this article is on spacecraft on-board avionics software, that is, spacecraft- controlling code that flies into orbit with the spacecraft. Other types of computers are not included in this analysis; for example, many laptops on the International Space Station run Linux [2].

The HACMS program: using formal methods to eliminate exploitable bugs.

For decades, formal methods have offered the promise of verified software that does not have exploitable bugs. Until recently, however, it has not been possible to verify software of sufficient complexity to be useful. Recently, that situation has changed. SeL4 is an open-source operating system microkernel efficient enough to be used in a wide range of practical applications. Its designers proved it to be fully functionally correct, ensuring the absence of buffer overflows, null pointer exceptions, use-after-free errors, etc., and guaranteeing integrity and confidentiality. The CompCert Verifying C Compiler maps source C programs to provably equivalent assembly language, ensuring the absence of exploitable bugs in the compiler. A number of factors have enabled this revolution, including faster processors, increased automation, more extensive infrastructure, specialized logics and the decision to co-develop code and correctness proofs rather than verify existing artefacts. In this paper, we explore the promise and limitations of current formal-methods techniques. We discuss these issues in the context of DARPA’s HACMS program, which had as its goal the creation of high-assurance software for vehicles, including quadcopters, helicopters and automobiles.This article is part of the themed issue ‘Verified trustworthy software systems’.

Research on control law accelerator of digital signal process chip TMS320F28035 for real-time data acquisition and processing

TI C2000 series digital signal process (DSP) chip has been widely used in electrical engineering, measurement and control, communications and other professional fields, DSP TMS320F28035 is one of the most representative of a kind. When using the DSP program, need data acquisition and data processing, and if the use of common mode C or assembly language programming, the program sequence, analogue-to-digital (AD) converter cannot be real-time acquisition, often missing a lot of data. The control low accelerator (CLA) processor can run in parallel with the main central processing unit (CPU), and the frequency is consistent with the main CPU, and has the function of floating point operations. Therefore, the CLA coprocessor is used in the program, and the CLA kernel is responsible for data processing. The main CPU is responsible for the AD conversion. The advantage of this method is to reduce the time of data processing and realize the real-time performance of data acquisition.

Implementing High-performance Complex Matrix Multiplication via the 3m and 4m Methods

In this article, we explore the implementation of complex matrix multiplication. We begin by briefly identifying various challenges associated with the conventional approach, which calls for a carefully written kernel that implements complex arithmetic at the lowest possible level (i.e., assembly language). We then set out to develop a method of complex matrix multiplication that avoids the need for complex kernels altogether. This constraint promotes code reuse and portability within libraries such as Basic Linear Algebra Subprograms and BLAS-Like Library Instantiation Software (BLIS) and allows kernel developers to focus their efforts on fewer and simpler kernels. We develop two alternative approaches—one based on the 3 m method and one that reflects the classic 4 m formulation—each with multiple variants, all of which rely only on real matrix multiplication kernels. We discuss the performance characteristics of these “induced” methods and observe that the assembly-level method actually resides along the 4 m spectrum of algorithmic variants. Implementations are developed within the BLIS framework, and testing on modern hardware confirms that while the less numerically stable 3 m method yields the fastest runtimes, the more stable (and thus widely applicable) 4 m method’s performance is somewhat limited due to implementation challenges that appear inherent in nature.

Current Controller for Multi-level Front-end Converter and Its Digital Implementation Considerations on Three-level Flying Capacitor Topology

This paper presents behaviour analysis and digital implementation of current error space phasor based hysteresis controller applied to three-phase three-level flying capacitor converter as front-end topology. The controller is self-adaptive in nature, and takes the converter from three-level to two-level mode of operation and vice versa, following various trajectories of sector change with the change in reference dc-link voltage demanded by the load. It keeps current error space phasor within the prescribed hexagonal boundary. During the contingencies, the proposed controller takes the converter in over modulation mode to meet the load demand, and once the need is satisfied, controller brings back the converter in normal operating range. Simulation results are presented to validate behaviour of controller to meet the said contingencies. Unity power factor is assured by proposed controller with low current harmonic distortion satisfying limits prescribed in IEEE 519-2014. Proposed controller is implemented using TMS320LF2407 16-bit fixed-point digital signal processor. Detailed analysis of numerical format to avoid overflow of sensed variables in processor, and per-unit model implementation in software are discussed and hardware results are presented at various stages of signal conditioning to validate the experimental setup. Control logic for the generation of reference currents is implemented in TMS320LF2407A using assembly language and experimental results are also presented for the same.

Automated Quantum Circuit Synthesis and Cost Estimation for the Binary Welded Tree Oracle

Quantum computing is a new computational paradigm that promises an exponential speed-up over classical algorithms. To develop efficient quantum algorithms for problems of a non-deterministic nature, random walk is one of the most successful concepts employed. In this article, we target both continuous-time and discrete-time random walk in both the classical and quantum regimes. Binary Welded Tree (BWT), or glued tree, is one of the most well-known quantum walk algorithms in the continuous-time domain. Prior work implements quantum walk on the BWT with static welding. In this context, static welding is randomized but case-specific. We propose a solution to automatically generate the circuit for the Oracle for welding. We implement the circuit using the Quantum Assembly Language, which is a language for describing quantum circuits. We then optimize the generated circuit using the Fault-Tolerant Quantum Logic Synthesis tool for any BWT instance. Automatic welding enables us to provide a generalized solution for quantum walk on the BWT.

FunTAL: reasonably mixing a functional language with assembly

We present FunTAL, the first multi-language system to formalize safe interoperability between a high-level functional language and low-level assembly code while supporting compositional reasoning about the mix. A central challenge in developing such a multi-language is bridging the gap between assembly, which is staged into jumps to continuations, and high-level code, where subterms return a result. We present a compositional stack-based typed assembly language that supports components , comprised of one or more basic blocks, that may be embedded in high-level contexts. We also present a logical relation for FunTAL that supports reasoning about equivalence of high-level components and their assembly replacements, mixed-language programs with callbacks between languages, and assembly components comprised of different numbers of basic blocks.

Some assembly (language) required - Three games that make low-level coding fun [Resources_Geek Life

Ah, assembly. Where all the pretense of high-level languages—the program structures, the data handling, the wealth of functions-gets stripped away. You get branches, bytes, and if you're lucky, a subtraction command. True, directly manipulating the state of a computer can be powerful, but few people code assembly by choice. . So I was surprised to find not one but three polished games that do a surprisingly good job of making coding assembly language fun. To be clear, none of these titles involve writing assembly for real hardware. They all use virtual systems with minimal instruction sets. Still, they do capture the essence of assembly coding, with complex behaviors squeezed of simple commands. . The first game is Human Resource Machine, originally released 2015 by Tomorrow Corp. and now available for Windows, Mac, Linux, and the new Nintendo Switch. In this game the player takes on the role of an office worker who must handle numbers and letters arriving on an in conveyor belt and put the desired results on an out conveyor belt. As you begin, you're given just two instructions to work with. As you progress and face more complex challenges, more instructions are provided. Challenges range difficulty from outputting the larger of a pair of input numbers to sorting variable-length sequences.

Laboratory Works Designed for Developing Student Motivation in Computer Architecture

In light of the current difficulties related to maintaining the students’ interest and to stimulate their motivation for learning, the authors have developed a range of new laboratory exercises intended for first-year students in Computer Science as well as for engineering students after completion of at least one course in computers. The educational goal of the herein proposed laboratory exercises is to enhance the students’ motivation and creative thinking by organizing a relaxed yet competitive learning environment. The authors have developed a device including LEDs and switches, which is connected to a computer. By using assembly language, commands can be issued to flash several LEDs and read the states of the switches. The effectiveness of this idea was confirmed by a statistical study.

The Symbolic Interior Point Method

Numerical optimization is arguably the most prominent computational framework in machine learning and AI. It can be seen as an assembly language for hard combinatorial problems ranging from classification and regression in learning, to computing optimal policies and equilibria in decision theory, to entropy minimization in information sciences. Unfortunately, specifying such problems in complex domains involving relations, objects and other logical dependencies is cumbersome at best, requiring considerable expert knowledge, and solvers require models to be painstakingly reduced to standard forms. To overcome this, we introduce a rich modeling framework for optimization problems that allows convenient codification of symbolic structure. Rather than reducing this symbolic structure to a sparse or dense matrix, we represent and exploit it directly using algebraic decision diagrams (ADDs). Combining efficient ADD-based matrix-vector algebra with a matrix-free interior-point method, we develop an engine that can fully leverage the structure of symbolic representations to solve convex linear and quadratic optimization problems. We demonstrate the flexibility of the resulting symbolic-numeric optimizer on decision making and compressed sensing tasks with millions of non-zero entries.

Application of TMS320VC5509A in Bluetooth Transmission

Bluetooth technology is the global wireless standard enabling the Internet of Things (IoT), it was created as an open standard to allow connectivity and collaboration between disparate products and industries. In recent years, many applications of Bluetooth devices have brought great convenience to the users of electronic devices. In this article, first, the Bluetooth protocol is used to connect Bluetooth transmission kit ICETEKBLE, TMS320VC5509A and the mobile phone. Next, completed the software design By using CCS compiling environment and assembly language. Then, control light on development board by Bluetooth of mobile phone. Finally, through this research to explore the application of TMS320VC5509A in the Bluetooth transmission.

The Application of Hybrid Learning Method in the Teaching of Assembly Language

The hybrid learning method is based on classroom teaching and MOOC platform, which helps students to learn independently, and improve the initiative of learning. In the actual teaching, a variety of teaching methods are used, such as case teaching, comparative explanation, abstract metaphor, intended to improve the interest of learning, to strengthen the learning effect.

An Approach for Attainment of Relevant Program Outcomes through Microcontroller Laboratory Course

Embedded product design has emerged as an important area of study in the curriculum for undergraduate program in Computer Science. This necessitates the inclusion of hardware courses like Digital Electronics, Computer Organization and Microcontrollers as pre-requisite courses, in the lower semesters. This helps students to develop keen interest, skill and proficiency in the area of Embedded system design. This also helps them to compete with peers from other engineering branches in the domain of Embedded Systems. Here we present a set of activities, their related outcome based assessment techniques and outcome based strategies applied to the laboratory course on 8051 Microcontroller laboratory in Computer Science&Engineering at the IV Semester level. This laboratory was an extension of the hands on experience the students had in the course on Digital Electronics in the III Semester. The laboratory course on 8051 Microcontrollers was based on the usage of 8051 compatible Atmel 89C51ED2. The course was designed to consist of initially, conducting simple programming exercises using 8051 assembly language and then simple interfacing exercises using Embedded C programming. Later when they developed some proficiency and familiarity in 8051 environment student' teams were made to work on course projects which required them to design and build projects using 8051 or any other microcontroller of their choice. This promoted their self-learning, improved their knowledge of programming the microcontroller to interface with the outside world to develop useful applications and provide solutions to some common problems in society. This activity resulted in enhanced motivational levels amongst students, increased their involvement in the team and improved their knowledge due to self learning.

In Search of the Original Fortran Compiler

In Search of the Original Fortran Compiler Paul McJones (bio) In April 2002, Grady Booch sent out an email with the subject “Preserving classic software products.” His appeal to provide top 10 lists and to suggest where to look for the source code received an enthusiastic response. Grady and the Computer History Museum organized a workshop in October 2003.1 As a result, a month later, a group of Computer History Museum trustees, staff and volunteers (including me) established the Software Collection Committee2 (SCC) to explore the software side of the museum’s mission: “To preserve and present for posterity the artifacts and stories of the information age.” I decided to take on the project of collecting Fortran materials. John Backus’s Fortran project at IBM developed one of the first higher-level programming languages as well as a set of techniques for code optimization that allowed Fortran to compete with hand-tuned assembly language.3 The combination of ease-of-use and efficiency led to Fortran’s rapid adoption and lasting impact on programming language design and implementation. Fortran’s success on the IBM 704/709 led to Fortran compilers for many brands and models of computers, making it possible to port Fortran programs among different computers; Fortran program portability also made Fortran useful for non-numerical projects. While Fortran’s popularity waned as other languages grew up to fill various niches, some high-performance computing users continued to use Fortran, with periodic updates, to the present. The history of the Fortran project is well documented in papers by Backus and others, covering the project, its impact, and technical analysis of the compiler itself.4 However, the artifact itself—the source code for the original Fortran compiler—seemed to me an appropriate starting point to gain experience with collecting, preserving, and presenting historic software. By spring 2006, I had assembled a collection including listings, source and executable code, documentation, and more and had made the collection publicly accessible via a website. Take a look at that website now (http://www.softwarepreservation.org/projects/FORTRAN/)5 to have it mind as you read this article, which describes my collection efforts. I hope my experience will be useful to other computing history researchers from the practitioner world considering similar efforts. Getting Started I started my search for Fortran by calling John Backus, with whom I had worked in the mid-1970s (on functional programming) but had not seen for about 25 years. He did not have a copy of the source code and directed me to Irv Ziller, who had been his first hire on the project. Irv responded to my request, saying that he didn’t have the source code, but he recalled material being sent to the Smithsonian to become part of their collection. I visited the website of the Smithsonian National Museum of American History (NMAH) and located the group that had created the Computer History Collection,6 but my initial attempts to establish communication with the staff were unsuccessful.7 One day I was chatting with a coworker, Jim King, who had worked at IBM Research for many years. Jim had used Fortran II and the Fortran Monitor System on an IBM 709 in college in the early 1960s and had some interesting anecdotes.8 Jim suggested IBM’s SHARE user group library as a potentially interesting source of material, and he also recalled the extensive IBM 7094-related library at Boeing when he worked there in the 1960s. Another member of the SCC, Dick Sites, recalled having seen “handwritten Fortran I documentation in a basement of the Sloan building at MIT in 1965 .… As I remember, it described the overall compiler design and optimizing algorithms. I remember a fairly neat but slightly small handwriting with hand-drawn boxes and arrows for some of the algorithms.” Also, Len Shustek, Computer History Museum founder, pointed out this sentence in Backus’s article9 about Fortran at the first History of Programming Languages conference: “Shortly after the distribution of the system, we distributed—one copy per installation—what was fondly known as the ‘Tome,’ the complete symbolic listing of the entire compiler plus other system and diagnostic information...

Accelerated Thomas Solver for (Quasi-)Block-Tridiagonal Linear Algebraic Equation Systems, Using SSE/AVX Instruction Sets for Vectorizing Dense Block Operations

Streaming SIMD Extensions (SSE) and Advanced Vector Extensions (AVX) are additional processor instruction sets available in contemporary personal computers, designed for vectorized floating point calculations. Unfortunately, in order to utilize the advantages of these instructions, one cannot rely on automatic options of high level language compilers. Instead, handwritten assembly language or intrinsic function call insertions are necessary. By using this idea an accelerated C[Formula: see text] code is devised, for solving (quasi-) block-tridiagonal linear algebraic equation systems by means of an extended Thomas algorithm. Speedups reaching 3.5 and 3 (relative to C[Formula: see text] without using SSE/AVX) are demonstrated for single and double precision calculations, respectively.

Embedded Systems Design with the Texas Instruments MSP432 32-bit Processor

This book provides a thorough introduction to the Texas Instruments MPS432™ microcontroller. The MPS432 is a 32-bit processor with the ARM Cortex M4F architecture and a built-in floating point unit. At the core, the MSP432 features a 32-bit ARM Cortex-M4F CPU, a RISC-architecture processing unit that includes a built-in DSP engine and a floating point unit. As an extension of the ultra-low-power MSP microcontroller family, the MSP432 features ultra-low power consumption and integrated digital and analog hardware peripherals. The MSP432 is a new member to the MSP family. It provides for a seamless transition to applications requiring 32-bit processing at an operating frequency of up to 48 MHz. The processor may be programmed at a variety of levels with different programming languages including the user-friendly Energia rapid prototyping platform, in assembly language, and in C. A number of C programming options are also available to developers, starting with register-level acce s code where developers can directly configure the device's registers, to Driver Library, which provides a standardized set of application program interfaces (APIs) that enable software developers to quickly manipulate various peripherals available on the device. Even higher abstraction layers are also available, such as the extremely user-friendly Energia platform, that enables even beginners to quickly prototype an application on MSP432. The MSP432 LaunchPad is supported by a host of technical data, application notes, training modules, and software examples. All are encapsulated inside one handy package called MSPWare, available as both a stand-alone download package as well as on the TI Cloud development site: dev.ti.com The features of the MSP432 may be extended with a full line of BoosterPack plug-in modules. The MSP432 is also supported by a variety of third party modular sensors and software compiler companies. In the back, a thorough introduction to the MPS432 line of microco trollers, programming techniques, and interface concepts are provided along with considerable tutorial information with many illustrated examples. Each chapter provides laboratory exercises to apply what has been presented in the chapter. The book is intended for an upper level undergraduate course in microcontrollers or mechatronics but may also be used as a reference for capstone design projects. Practicing engineers already familiar with another microcontroller, who require a quick tutorial on the microcontroller, will also find this book very useful. Finally, middle school and high school students will find the MSP432 highly approachable via the Energia rapid prototyping system.

Performance Evaluation of Matrix-Matrix Multiplications Using Intel's Advanced Vector Extensions (AVX)

Intel's Advanced Vector Extensions is known as single instruction multiple data streams (SIMD), and the instruction sets is introduced in the second-generation Intel Core processor family. This new technology is supported by new generations of Intel and AMD processors. The advanced vector extensions (AVX) exploits single instruction multiple data (SIMD) computing units for fine grained-parallelism. These instructions process multiple data elements simultaneously and independently. Many applications such as signal processing, recognition, visual processing, scientific and engineering numerical, physics and other areas of applications need for vector floating point performance supported by AVX. Matrix-Matrix multiplications is the core of many important algorithms such as signal processing, scientific and engineering numerical, so it is substantial to accelerate implementation of matrix-matrix multiplications. It is very important to use appropriate compilers that can optimally utilize the new features of the evolving processors. For this purpose, a clear vision on the performance of the compilers on performance characteristics of AVX is needed. In addition choosing the appropriate programming method is substantial to gain the best performance. In this paper, the performance evaluation of matrix-matrix multiplications in three forms (C=A. B, C=A. BT, and C=AT. B), using Intel's advanced vector extension (AVX) instruction sets has been reported. The obtained results are compared using inline assembly versus intrinsic functions for programming. A comparative study to indicate the effects of two widely used C++ compilers: Intel C++ compiler (ICC) in Intel Parallel Studio XE 2016 against Microsoft Visual Studio C++ compiler 2015 (MSVC++) has been investigated. The results are evaluated on Intel Core i7 processor on a Broadwell system for square matrices of different large sizes. The results demonstrate that the Intel compiler has better performance than MSVC++ compiler by 1.34, 1.32, and 1.22 using inline assembly language and by 1.36, 1.19, and 1.25 using intrinsic functions for C=A. B, C=A. BT, and C=AT. B, respectively. The performance of using intrinsic functions compared to the inline assembly demonstrates that the intrinsic functions has better performance than inline assembly by 2.1, 2.13, and 2.18 using Intel compiler and by 2.08, 2.49, and 2.11 using MSVC++ compiler for C=A. B, C=A. BT, and C=AT. B, respectively.

Teaching computer architecture with a "live" assembler

In the beginning, computer scientists were expected to be fluent in assembly language: (barely) human-readable text that is submitted to an assembler program, which converts it into executable co...

Cryptoleq: A Heterogeneous Abstract Machine for Encrypted and Unencrypted Computation

The rapid expansion and increased popularity of cloud computing comes with no shortage of privacy concerns about outsourcing computation to semi-trusted parties. Leveraging the power of encryption, in this paper, we introduce Cryptoleq: an abstract machine based on the concept of one instruction set computer, capable of performing general-purpose computation on encrypted programs. The program operands are protected using the Paillier partially homomorphic cryptosystem, which supports addition on the encrypted domain. Full homomorphism over addition and multiplication, which is necessary for enabling general-purpose computation, is achieved by inventing a heuristically obfuscated software re-encryption module written using Cryptoleq instructions and blended into the executing program. Cryptoleq is heterogeneous, allowing mixing encrypted and unencrypted instruction operands in the same program memory space. Programming with Cryptoleq is facilitated using an enhanced assembly language that allows the development of any advanced algorithm on encrypted data sets. In our evaluation, we compare Cryptoleq's performance against a popular fully homomorphic encryption library, and demonstrate correctness using a typical private information retrieval problem.