ARM Cortex-M3 Research Articles

AuCPace: Efficient verifier-based PAKE protocol tailored for the IIoT

Increasingly connectivity becomes integrated in products and devices that previously operated in a stand-alone setting. This observation holds for many consumer applications in the so-called "Internet of Things" (IoT) as well as for corresponding industry applications (IIoT), such as industrial process sensors. Often the only practicable means for authentication of human users is a password. The security of password-based authentication schemes frequently forms the weakest point of the security infrastructure. In this paper we first explain why a tailored protocol designed for the IIoT use case is considered necessary. The differences between IIoT and the conventional Internet use-cases result in largely modified threats and require special procedures for allowing both, convenient and secure use in the highly constrained industrial setting. Specifically the use of a verifier-based password-authenticated key-exchange (V-PAKE) protocol as a hedge against public-key-infrastructure (PKI) failures is considered important. Availability concerns for the case of failures of (part of) the communication infrastructure makes local storage of access credentials mandatory. The larger threat of physical attacks makes it important to use memory-hard password hashing. This paper presents a corresponding tailored protocol, AuCPace, together with a security proof within the Universal Composability (UC) framework considering fully adaptive adversaries. We also introduce a new security notion of partially augmented PAKE that provides specific performance advantages and makes them suitable for a larger set of IIoT applications. We also present an actual instantiation of our protocol, AuCPace25519, and present performance results on ARM Cortex-M0 and Cortex-M4 microcontrollers. Our implementation realizes new speed-records for PAKE and X25519 Diffie-Hellman for the ARM Cortex M4 architecture.

Instruction Level Energy Consumption Estimation of Embedded Processor

Embedded systems are portable battery powered devices that have limited power resource. Hence, most of embedded systems need to meet energy constraint. Performance and energy consumption are the most important metrics for embedded system design. Estimation of performance, energy utilization and its validation are essential for embedded system design. Attempt has been made to precisely measure software energy consumption by three methods on ARM Cortex M4 processor. The results are validated with five benchmark programs. Tedious calculation of inter instruction cost has been minimized by taking it as certain percent of total energy. Percentage error between actual and estimated energy is found to be less than 5%.

Instruction Level Energy Consumption Estimation of Embedded Processor

Embedded systems are portable battery powered devices that have limited power resource. Hence, most of embedded systems need to meet energy constraint. Performance and energy consumption are the most important metrics for embedded system design. Estimation of performance, energy utilization and its validation are essential for embedded system design. Attempt has been made to precisely measure software energy consumption by three methods on ARM Cortex M4 processor. The results are validated with five benchmark programs. Tedious calculation of inter instruction cost has been minimized by taking it as certain percent of total energy. Percentage error between actual and estimated energy is found to be less than 5%.

Offloading and Transmission Strategies for IoT Edge Devices and Networks.

We present a machine and deep learning method to offload trained deep learning model and transmit packets efficiently on resource-constrained internet of things (IoT) edge devices and networks. Recently, the types of IoT devices have become diverse and the volume of data has been increasing, such as images, voice, and time-series sensory signals generated by various devices. However, transmitting large amounts of data to a server or cloud becomes expensive owing to limited bandwidth, and leads to latency for time-sensitive operations. Therefore, we propose a novel offloading and transmission policy considering energy-efficiency, execution time, and the number of generated packets for resource-constrained IoT edge devices that run a deep learning model and a reinforcement learning method to find an optimal contention window size for effective channel access using a contention-based medium access control (MAC) protocol. A Reinforcement learning is used to improve the performance of the applied MAC protocol. Our proposed method determines the offload and transmission strategies that are better to directly send fragmented packets of raw data or to send the extracted feature vector or the final output of deep learning networks, considering the operation performance and power consumption of the resource-constrained microprocessor, as well as the power consumption of the radio transceiver and latency for transmitting the all the generated packets. In the performance evaluation, we measured the performance parameters of ARM Cortex-M4 and Cortex-M7 processors for the network simulation. The evaluation results show that our proposed adaptive channel access and learning-based offload and transmission methods outperform conventional role-based channel access schemes. They transmit packets of raw data and are effective for IoT edge devices and network protocols.

Improved triangular-based star pattern recognition algorithm for low-cost star trackers

Star identification algorithms based on triangular-pattern are more suitable for low-cost star trackers since they require less star density in the field of view to operate effectively. In this paper, we propose a modified star pattern recognition algorithm based on the triangular-based algorithm of “LIEBE”. The main contribution of the proposed work is twofold. First, a new strategy for the selection of star triplets is proposed for database construction. Second, new selection criteria of the reference star are considered for pattern generation process. A sky simulation program is developed to assess mainly the robustness against different conditions of noise. The obtained results show an improvement in the overall identification rate, more robustness towards missing stars, and more efficiency towards magnitude noise. Furthermore, our proposed algorithm shows comparable robustness with the recently proposed triangular algorithms despite their reliance on more accurate camera and a validation process. To assess the algorithm performance, the algorithm is implemented on a prototype of Data Processing Unit (DPU) based on ARM Cortex-M4 processor. In this part, we discuss the major design decisions and we present the hardware architecture of DPU. The algorithm shows promising running time at a reduced on-board database when implemented on ARM platform.

Improving side-channel attacks against pairing-based cryptography

Although the vulnerability of pairing-based algorithms to side-channel attacks has been demonstrated—pairing implementations were targeted on three different devices in a recent paper [41]—it nevertheless remains difficult to choose an adapted leakage model and detect points of interest. Our proposed approach evaluates the parameters of the attack and validates the data processing workflow. We describe weaknesses in the implementation of cryptographic pairings, and we show how information leakage can be fully exploited. Different leakage models, point-of-interest detection methods, and parameter dependencies are compared. In addition, practical results were obtained with a software implementation of twisted Ate pairing on Barreto–Naehrig curves with an ARM Cortex-M3 processor running at 50 MHz. We discuss countermeasures aimed at reducing side-channel leakage and review the available literature.

A Practical Collision-Based Power Analysis on RSA Prime Generation and Its Countermeasure

We analyze the security of RSA prime generation implemented on embedded devices by a practical power analysis attack. Unlike previous differential power analysis-based attack on primality tests of RSA prime generation exploiting the deterministic relationship among multiple prime candidates manipulated by consecutive primality tests, we propose a collision-based power analysis attack on the Miller-Rabin test for a single prime candidate which can recover the secret prime with a single attempt by exploiting collision characteristics of simple power analysis resistant modular exponentiation algorithms. Hence, our attack does not require the incremental prime search assumption and is applicable when countermeasures against previous attacks are deployed since it also does not require the assumption of trial divisions with small primes on prime candidates. For a realistic setting, where five 512-bit modular exponentiations are operated on an ARM Cortex-M4 microcontroller as recommended by FIPS 186-4 standard, we successfully recover the secret exponent to an extent that a feasible exhaustive search is needed for the full recovery of the secret prime. This is a first practical result of recovering a full secret of modular exponentiation which manipulates 512-bit RSA primitives with collision-based power analysis in a single attempt, where the previous attack demonstrates the result for 192-bit ECC primitive implementations. We also present a countermeasure against our attack which requires only one additional modular subtraction for the loop of square-and-multiply-always exponentiation algorithm. An experimental result for the effectiveness of our proposed countermeasure is presented.

The driver design for N2O gas detection system based on tunable interband cascade laser

In this paper, the driver circuit for N2O gas detection system based on tunable interband cascade laser (ICL) is developed. Considering the influence of power supply stability on the digital-analog hybrid drive circuit of tunable diode laser absorption spectroscopy (TDALS), the high-efficiency TPS5430 is used to design the positive and negative power supply circuit. The large electrolytic capacitor + post-stage LC filter combination filter is used to effectively filter out high and low frequency ripple and switching noise. The use of thick high current trace + via + multilayer printed circuit board (PCB) design makes the line temperature rise smaller, more stable and durable, and uses high frequency shielding inductance to effectively reduce radiation interference to ensure the stability of the drive. The STM32F407, a highperformance microcontroller based on the ARM Cortex-M4 core, is used as the master control chip and generates a sawtooth scanning signal. The direct digital synthesizer (DDS) chip ICL8038 is used to generate a sinusoidal modulated signal of a specific frequency. The two signals are superimposed by a reverse addition circuit, and the laser drive signal is generated by a developed positive feedback balanced voltagecurrent conversion circuit. Experimental results show that the driver circuit can well meet the drive development requirements of N2O gas detection systems based on tunable interband cascade laser.

Accurate Real-Time Estimation of Power System Transients Using Constrained Symmetric Strong Tracking Square-Root Cubature Kalman Filter

The paper presents a fast and accurate algorithm for estimating four significant parameters (i.e., amplitude, frequency, phase angle, and damping factor) of a typical transient signal. The method can be connoted as the constrained symmetric strong tracking square-root cubature Kalman filter (CSSTSCKF). The important aspects of the proposed algorithm are: 1) constraints are imposed on the state vectors by way of a logarithmic barrier function that is either ignored or handled heuristically; 2) symmetric sub-optimal multiple fading factors (FFs) are augmented into the predicted covariance matrix to capture sudden changes and to tune the gain matrix in real-time; moreover, symmetry of the covariance matrix is guaranteed by the influence of Cholesky triangular decomposition; 3) effect of noise can be adjusted by tuning the soften factor. Several case studies have been simulated to evaluate the proposed algorithm with respect to some of the well-known state-of-the-art methods. The real-time performance has been evaluated by flashing the filter codes into an ARM Cortex-M7 processor board and tracking the real-time signal from the experimental test bench. The results, presented herein, indicate that the CSSTSCKF remarkably outperforms all other considered techniques. Furthermore, the stability analysis of the nonlinear filter has been proved based on the constructor expression considering the boundedness of the estimation errors and other sub-items.

Rapid Control Prototyping based on 32-Bit ARM Cortex-M3 Microcontroller for Photovoltaic MPPT Algorithms

Since the beginning of the war in Syria, most of the electricity infrastructure has been destroyed, leaving millions with unreliable energy. Syrians have encountered high electricity production costs and environmental damage costs resulting from the utilization of fossil fuels. Similarly, Syria has abundant solar energy can be exploited to meet its electrical power needs. However, because of a lack of expertise in solar energy conversion and the high cost of smart technology, Syrians have typically used photovoltaic systems in primitive ways, in which the efficiency of solar energy conversion is low. There is, therefore, a need for inexpensive, easy-to-implement, yet highly efficient and high performing solutions. Using the STMicroelectronics 32-bit ARM as a maximum power point tracking (MPPT) controller offers a potential solution to the problem of low conversion efficiency in standalone solar systems. In this study, using Matlab-Simulink and STMicrelectronics-32 bit ARM board, simulation and practical test is set up to evaluate the performance of the Perturbation & Observation, Incremental Conductance and Fuzzy Logic MPPT algorithms, in order to determine the most appropriate algorithm to use in small scale solar energy systems. Therefore, one main objective of this study is to explore rapid control prototyping tools for saving time and effort to the experts in the implementation process of the proposed systems. The results indicate the effectiveness of Fuzzy logic algorithm to draw more energy, decrease oscillation and provide a fast response under variable weather conditions. Furthermore, the three algorithms were able to find and track MPP.

마이크로컨트롤러를 이용한 BLDC 모터 구동 Hardware-in-the-Loop Simulator 개발

In this paper, we deal with the development of a HIL (Hardware-in-the-Loop) simulator for BLDC motor driving using a microcontroller. We propose a modified BLDC model for the simulation of a BLDC motor using a microcontroller. The proposed HIL simulator is developed using various peripherals of STM32F407 (ARM cortex-M4 based microcontroller). The proposed HIL simulator consists of three parts. First, the part simulating the inverter analyzes the input PWM signals to calculate the corresponding input voltage. This part detects wrong PWM signals or shoot-throughs of the half-bridge. Second, the BLDC motor part is implemented by solving the modified model equations in real time. Finally, the third part generates the output of the BLDC motor. The HIL simulator generates the Back Electromotive Force (BEMF) waveform and signals of a rotary encoder and a hall sensor. Sensor signals are generated using a timer interrupt. The BEMF waveform is implemented using DAC. Moreover, a generation method using PWM and RC filter is presented. Through experiments, we illustrate that the developed HIL simulator accurately simulates the BLDC motor. Furthermore, we confirm that the BLDC motor drive algorithm designed with the developed HIL simulator can be successfully applied to real BLDC motor driving systems.

A Control System Based on Microprocessor and FPGA for 1470nm High-power Semiconductor Laser

An intelligent control system for a medical high-power semiconductor laser has been developed. The system combines 1470nm high-power semiconductor laser and intelligent control technology. The control technique applies an ARM Cortex-M3 microprocessor STM32F103 as the core, an FPGA to drive the digital constant current source module and the power feedback loop to realize constant power control. Furthermore, the display and storage of the output data, and the driver of the touch screen are realized by designing the main control module and human-computer interaction module with the microprocessor. Finally, the Micro-Controller Development Kit (MDK) platform is used for programming. The safety performance of the whole control system conforms to the national standard of medical electrical safety.

An Ultra-Lightweight and Secure Scheme for Communications of Smart Meters and Neighborhood Gateways by Utilization of an ARM Cortex-M Microcontroller

Modernization of the traditional electrical grid has become achievable by the emergence of innovative smart grid technology. The main contribution of this new technology is the bidirectional flow of information. The smart meters (SMs) send the usage reports to the power operator and also some instructions are sent from the power operator in order to be executed by the SMs. In between, there exist some gateways which are responsible for data aggregation. Here, we aim at the communications of SMs and neighborhood gateways. On one hand, the presented communication scheme must consider the need for consumption reports transmission in short time intervals, and on the other hand, it must consider both security and the constrained resources of SMs. To this end, in this paper, using only the hash and Exclusive-OR operations, we propose an extremely lightweight communication scheme that not only provides the security requirements, but also can cope with one-minute or even less time intervals of data transmission while putting the least burden on the SMs resources. Our comparative analysis demonstrates substantial reduction in storage space and computational complexity. More importantly, our formal verification using the ProVerif tool and implementation on an ARM microcontroller confirm our claim.

An IMU-based traffic and road condition monitoring system

Abstract This paper presents a new type of wireless platform designed for real-time traffic estimation and road surface monitoring. The sensor platform is built around a 32-bit ARM Cortex M4 micro-controller and a LSM9DS0 Inertial Measurement Unit module. This platform is mainly designed for probe vehicles and can be easily installed in a vehicle equipped with a USB charger. The hardware architecture design and software programming system of the proposed platform are introduced as well as its cost evaluation from the first generation to the third generation. The article then demonstrates some applications of such a platform in smart cities, including trajectory estimation and road condition monitoring. All design files have been uploaded and shared in an open science framework, and can be accessed from https://osf.io/524y9/?view_only=85859a345a7b429fbb8fe194966daa5b . It is licensed under the GNU General Public License v3.0.

An Anonymous ECC-Based Self-Certified Key Distribution Scheme for the Smart Grid

In the smart grid, the various stakeholders can communicate securely and efficiently only if they employ a proper key distribution scheme. In recent years, a number of key distribution schemes have been proposed to be used in the context of the smart grid. However, some suffer from security challenges, some do not provide the smart meter anonymity, some require high communication and computational costs that make them less suitable for the resource-constrained smart meters, some are based on the public key infrastructure, and most of the newly published ones have the key escrow problem. Therefore, to remedy these challenges, in this paper, we propose an anonymous elliptic curve cryptography-based self-certified key distribution scheme that not only is free from the overhead of the certificate management and the key escrow issue, but also is more efficient than anonymous schemes in terms of both communication and computational costs. More significantly, we have implemented the cryptographic elements on two state-of-the-art ARM chips. First, a 32-bit ARM Cortex-M4 microcontroller as a candidate for the smart meter and second, a 64-bit Octa core ARM Cortex-A53 as a candidate for the service provider. We hope that the achieved results be beneficial for other future researches in this field.

Implementation of Interior Noise Control System Using Digital Adaptive Filter for On-Road Car Applications

There is a tremendous progress in last 3 decades in Automotive engineering especially in fuel-injection, exhaust Gas treatment, and safety and comfort systems. Around 90% of innovations in the motor vehicle are due to the use of Electronics and Microprocessor controlled systems. Noises that arise due to various factors like engine exhaust, tire-road interaction and vibration due to air inside a passenger car contributes to interior noise inside the cabin. These noises should be attenuated for smooth in-car riding experience. This paper highlights the various sources of interior noise inside a car and the passive and active control strategies to minimize them. This paper proposes an Active Noise Control system with modified FxLMS algorithm approach using Digital Adaptive Filter which is stable and fast convergent in a real-time changing environment to minimize the interior noise inside the car cabin. The proposed Noise Control System is simulated using MATLAB environment and the Noise Control Implementation is done using ARM Cortex-M4 processor and various parameters are discussed through proven comparative results. The real time noises that occurs inside the car cabin gets reduced in the range of 3–13 dB depending on the road surfaces and use of microphones.

DEVICE DRIVER FOR 3-AXIS ACCELEROMETER BASED ON ARM CORTEX-M0+ PROCESSOR

The use of accelerometers in aerial vehicles is crucial for measuring tilt (inclination) in order to control hovering. In this work, the driver software for 3-axis accelerometer device is developed based on the platform of ARM cortex M0+ processor. This driver software reads the values of acceleration of all 3 axes and computes roll, pitch and yaw tilt angles. This driver software is then integrated to open source freeRTOS operating system and then complete system using freeRTOS is tested by making system call from application software. Article DOI: https://dx.doi.org/10.20319/mijst.2018.42.200206 This work is licensed under the Creative Commons Attribution-Non-commercial 4.0 International License. To view a copy of this license, visit http://creativecommons.org/licenses/by-nc/4.0/ or send a letter to Creative Commons, PO Box 1866, Mountain View, CA 94042, USA.

Efficient Side-Channel Protections of ARX Ciphers

The current state of the art of Boolean masking for the modular addition operation in software has a very high performance overhead. Firstly, the instruction count is very high compared to a normal addition operation. Secondly, until recently, the entropy consumed by such protections was also quite high. Our paper significantly improves both aspects, by applying the Threshold Implementation (TI) methodology with two shares and by reusing internal values as randomness source in such a way that the uniformity is always preserved. Our approach performs considerably faster compared to the previously known masked addition and subtraction algorithms by Coron et al. and Biryukov et al. improving the state of the art by 36%, if we only consider the number of ARM assembly instructions. Furthermore, similar to the masked adder from Biryukov et al. we reduce the amount of randomness and only require one bit additional entroy per addition, which is a good trade-off for the improved performance. We applied our improved masked adder to ChaCha20, for which we provide two new first-order protected implementations and achieve a 36% improvement over the best published result for ChaCha20 using an ARM Cortex-M4 microprocessor.

Differential Fault Attacks on Deterministic Lattice Signatures

In this paper, we extend the applicability of differential fault attacks to lattice-based cryptography. We show how two deterministic lattice-based signature schemes, Dilithium and qTESLA, are vulnerable to such attacks. In particular, we demonstrate that single random faults can result in a nonce-reuse scenario which allows key recovery. We also expand this to fault-induced partial nonce-reuse attacks, which do not corrupt the validity of the computed signatures and thus are harder to detect.Using linear algebra and lattice-basis reduction techniques, an attacker can extract one of the secret key elements after a successful fault injection. Some other parts of the key cannot be recovered, but we show that a tweaked signature algorithm can still successfully sign any message. We provide experimental verification of our attacks by performing clock glitching on an ARM Cortex-M4 microcontroller. In particular, we show that up to 65.2% of the execution time of Dilithium is vulnerable to an unprofiled attack, where a random fault is injected anywhere during the signing procedure and still leads to a successful key-recovery.

Saber on ARM

The CCA-secure lattice-based post-quantum key encapsulation scheme Saber is a candidate in the NIST’s post-quantum cryptography standardization process. In this paper, we study the implementation aspects of Saber in resourceconstrained microcontrollers from the ARM Cortex-M series which are very popular for realizing IoT applications. In this work, we carefully optimize various parts of Saber for speed and memory. We exploit digital signal processing instructions and efficient memory access for a fast implementation of polynomial multiplication. We also use memory efficient Karatsuba and just-in-time strategy for generating the public matrix of the module lattice to reduce the memory footprint. We also show that our optimizations can be combined with each other seamlessly to provide various speed-memory trade-offs. Our speed optimized software takes just 1,147K, 1,444K, and 1,543K clock cycles on a Cortex-M4 platform for key generation, encapsulation and decapsulation respectively. Our memory efficient software takes 4,786K, 6,328K, and 7,509K clock cycles on an ultra resource-constrained Cortex-M0 platform for key generation, encapsulation, and decapsulation respectively while consuming only 6.2 KB of memory at most. These results show that lattice-based key encapsulation schemes are perfectly practical for securing IoT devices from quantum computing attacks.