Architecture Description Language Research Articles

Tackling the Complexity of Timing-Relevant Deployment Decisions in Multicore-Based Embedded Automotive Software Systems

Multicore-based ECUs are increasingly used in embedded automotive software systems to allow more demanding automotive applications at moderate cost and energy consumption. Using a high number of parallel processors together with a high number of executed software components results in a practically unmanageable number of deployment alternatives to choose from. However correct deployment is one important step for reaching timing goals and acceptable latency, both also a must to reach safety goals of safety-relevant automotive applications. In this paper we focus at reducing the complexity of deployment decisions during the phases of allocation and scheduling. We tackle this complexity of deployment decisions by a mixed constructive and analytic approach. On the constructive side, we model a multicore-based embedded automotive software system as a tuple S = (L, R) with a given architecture L of the system's software component network and a given architecture R of the system's platform component network. On the analytic side, we derive models of the system's deployment as a tuple D = (M, Z), where the relation M:L → R describes the allocation mapping from software components to platform components and the relation describes the scheduled start times of software components. The architectures L and R allow to describe hierarchically nested softwareand platformcomponent networks. Hence, we are able to represent coarse-grain structures like domain functions and domain networks as well as fine-grain structures like individual driver-calls, algorithms, ECUs and CPU-cores as well. With all this architectural information contained in precise models, deployment alternatives (allocations and schedules) can be automatically derived and analyzed for conformance with timing requirements, given by a set of timing constraints C. To demonstrate the usability of the approach, we implemented an architecture description language in the academic open source tool CADMOS together with a prototypical allocation and scheduling support. We are evaluating the practicability of the approach within a case study in the German national joint project ARAMiS using a close-to-production multicorebased system in cooperation with Technische Universitat Munchen, AUDI AG and BMW AG. CITATION: Schwitzer, W., Schneider, R., Reinhardt, D. and Hofstetter, G., Tackling the Complexity of Timing-Relevant Deployment Decisions in Multicore-Based Embedded Automotive Software Systems, SAE Int. J. Passeng. Cars – Electron. Electr. Syst. 6(2):2013, doi:10.4271/2013-01-1224. ____________________________________ THIS DOCUMENT IS PROTECTED BY U.S. AND INTERNATIONAL COPYRIGHT. It may not be reproduced, stored in a retrieval system, distributed or transmitted, in whole or in part, in any form or by any means. Downloaded from SAE International by Wolfgang Schwitzer, Wednesday, March 27, 2013 02:36:24 AM

Performing Safety Evaluation on Detailed Hardware Level according to ISO 26262

Electronic design on detailed hardware level for automotive safety-related systems requires evaluation of the hardware architecture to cope with random hardware failures. The international standard ISO 26262 - functional safety for road vehicles - claims two methods: hardware architectural metrics and evaluation of safety goal violations as a probabilistic approach. Although the utilization of these analyses is required, annotations of failure data in combination with performing evaluation of a preliminary hardware architecture using deposited failure data is not supported in an integrated model-based development environment. To overcome these inconveniences, we analyzed the ISO 26262, in particular Part 5 for product development at the hardware level, to provide both, meta-model for failure description of detailed hardware and performing evaluation of the hardware architecture. This UML-compliant meta-model expands existing EAST-ADL2 constructs. We implemented our concepts in a model-based architecture description language for large scaled electric and electronic architectures. To deposit specific failure rates and modes, we provide a library concept for hardware component types. Besides modeling schematics using the type library, an automatic preparation for characterization of safety-related hardware components is provided. To perform quantified analysis, we acquire relevant failure data using model queries and a metric framework to implement the equations for hardware evaluation according to ISO 26262 Part 5. Detailed results and compliance with target values including dedicated measures are documented in generated reports. Language: en

An architectural approach to the analysis, verification and validation of software intensive embedded systems

EAST-ADL is a domain specific Architecture Description Language (ADL) for safety-critical and software-intensive embedded systems. The language allows a formalized and traceable description of a wide range of engineering concerns throughout the entire lifecycle of system development. This makes it possible to fully utilize the leverage of state-of-the-art methods and tools for the development of correct-by-construction system functions and components in a seamless and cost efficient way. This paper focuses on the recent advancement of EAST-ADL in supporting an architecture-centric analysis, verification&validation of complex behaviors for the purposes of requirements engineering, application design, and safety engineering. The approach is architecture centric because all behavior descriptions are formalized and connected to a set of standardized design artifacts sitting at multiple levels of abstractions. We present the language design to support this, the theoretical underpinning and tool implementation. To show the capability of EAST-ADL, we also introduce an algorithm and its implementation for transforming the EAST-ADL behavior models to SPIN models for logic model checking. Exploiting mature state-of-the-art technologies from computer science, electronic engineering, and other related domains for a model-based incremental system development, the contribution enables the developers of embedded systems and software to maintain various engineering concerns coherently using EAST-ADL.

Model-Based Analysis of Wireless System Architectures for Real-Time Applications

We propose a model-based description and analysis framework for the design of wireless system architectures. Its aim is to address the shortcomings of existing approaches to system verification and the tracking of anomalies in safety-critical wireless systems. We use Architecture Analysis and Description Language (AADL) to describe an analysis-oriented architecture model with highly modular components. We also develop the cooperative tool chains required to analyze the performance of a wireless system by simulation. We show how this framework can support a detailed and largely automated analysis of a complicated, networked wireless system using examples from wireless healthcare and video broadcasting.

Qualitative Comparison of ADL-Based Approaches to Real-World Automotive System Development

This paper presents two different model-based approaches that use multiple architecture description languages (ADLs) for automotive system development. One approach is based on AADL (Architecture Analysis & Design Language), and the other is a collaborative approach using multiple languages: SysML (Systems Modeling Language) and MARTE (Modeling and Analysis of Real-Time and Embedded systems). In this paper, the detailed modeling steps for both approaches are explained through a real-world automotive development example: a cruise control system. Moreover, discussion of the modeling steps offers a qualitative comparison of the two approaches, and then clarifies the characteristics of the different types of ADLs.

Managing Architectural Reconfiguration at Runtime

Managing dynamic reconfiguration of software systems is a tedious task in the software development because of the substantially increasing need for continuously available systems even at runtime. In particular, the software architecture of dynamically adaptive systems must continuously adapt to varying environmental conditions and user requirements. Therefore, they propose a wide range of possible configurations. The static enumeration of all the possible configurations is a difficult task. Moreover, not all dynamic reconfiguration operations can be foreseen at design time. Some reconfigurations may appear when the system is already deployed. In this context, we propose to combine the Architecture Description Languages and the Aspect-Oriented Software Development paradigm in order to make the dynamic reconfiguration process easier to design, understand and possible to validate. Also, this combination allows to easily evolving the reconfiguration policies even at runtime.

An Architecture Description Language Based on Dynamic Description Logics for Self-Healing Systems

An Architecture Description Language Based on Dynamic Description Logics for Self-Healing Systems

ADL-Based Specification of Implementation Styles for Functional Simulators

Functional simulators find widespread use as subsystems within microarchitectural simulators. The speed of a functional simulator is strongly influenced by its implementation style, e.g. interpreted versus binary-translated simulation. Speed is also strongly influenced by the level of detail of the interface the functional simulator presents to the rest of the timing simulator. This level of detail may change during design space exploration, requiring corresponding changes to the interface and the simulator. However, for many implementation styles, changing the interface is difficult. As a result, architects may choose either implementation styles which are more malleable or interfaces with more detail than is necessary. In either case, simulation speed is traded for simulator design time. Such a tradeoff has become particularly unfortunate as multicore processor designs proliferate and multi-threaded benchmarks must be simulated. We show that this tradeoff is unnecessary if an orthogonal-specification design principle is practiced: specify how a simulator is to be implemented separately from what it is implementing and then synthesize a simulator from the combined specifications. We show that the use of an architectural description language with constructs for implementation style specification makes it possible to synthesize interfaces with different implementation styles with reasonable effort.

A three-level component model in component based software development

Component-based development promotes a software development process that focuses on component reuse. How to describe a desired component before searching in the repository? How to find an existing component that fulfills the required functionalities? How to capture the system personalization based on its constitutive components' customization? To answer these questions, this paper claims that components should be described using three different forms at three development stages: architecture specification, configuration and assembly. However, no architecture description language proposes such a detailed description for components that supports such a three step component-based development. This paper proposes a three-level Adl, named Dedal, that enables the explicit and separate definitions of component roles, component classes, and component instances.

Model Checking BRS based AADL Specification

the architecture description language AADL differs from other ADLs by its possibility to describe both hardware and software aspects of a system, it does not provide a formal notation for describing the deployment operation which is crucial in systems where hardware and software components are tightly coupled such as embedded systems. In this paper, we show the relevance of bigraphical reactive systems (BRS) to formalize the deployment operation of AADL architectures. The proposed approach allows, firstly a formal description of the two structures of AADL architectures, namely the platform and the application scenario, and secondly a natural modelization of the installation and the reconfiguration of AADL specification thanks to composition and transformaton operations of BRS. To validate the obtained model, we use a model checker dedicated to BRS.

MOF Based Framework for Integration of Software Architecture Analysis Results

运行在网络环境下的软件在自适应过程中,需要集成多种分析方法来进行分析、规划和决策.由于自适应的决策程序或者设计人员以SA(software architecture)模型作为解析和理解分析结果的上下文,这使得分析结果与SA 模型的集成尤为重要.但是,现有的分析方法集成框架多关注于提供输入、执行分析、从而得到分析结果的过程,对分析结果的集成关注不够.针对分析结果与SA 模型集成中元模型、模型和视图3 个层次的挑战,提出一种软件体系结构分析结果集成框架.框架使用MOF(meta-object facility)元建模技术提供ADL(architectural descriptionlanguage)的扩展机制;使用自动生成模型转换实现SA 模型与分析结果的合成;使用代码生成技术扩展建模工具为扩展后的ADL 提供模型视图.最后以3 种分析方法——两种可靠性评估方法和容错风格的规划方法为例,使用集成框架将其加以集成并应用于Ecperf 系统的SA 模型的分析中,从而展示集成框架的可行性和有效性.;In software adaptation, multiple analysis methods are used for analyzing system, planning adaptation strategy, and decision-making. Because the analysis results are interpreted and understood with SA (software architecture) model as context, synthesizing analysis results and the SA model become important. However, current researches on integration of analysis methods do not pay enough attention to the integrating analysis result with the SA model. Considering integration challenges existing in meta-model, model, and view levels, this study proposes an MOF (meta-object facility)-based framework for integration of analysis results. The framework provides the following: An ADL (architectural description language) extension mechanism with support for upward compatibility; automatic generation of model transformation for model synthesis, and code generation to extend modeling tool for view of synthesized model. In the case study, this study uses the framework to integrate three analysis methods for reliability evaluations and fault tolerant reconfiguration, and applies these analysis methods to analyze SA model of J2EE system Ecperf.

BAND-AiDe

Body area networks (BANs) are networks of medical devices implanted within or worn on the human body. Analysis and verification of BAN designs require (i) early feedback on the BAN design and (ii) high-confidence evaluation of BANs without requiring any hazardous, intrusive, and costly deployment. Any design of BAN further has to ensure (i) the safety of the human body, that is, limiting any undesirable side-effects (e.g., heat dissipation) of BAN operations (involving sensing, computation, and communication among the devices) on the human body, and (ii) the sustainability of the BAN operations, that is, the continuation of the operations under constrained resources (e.g., limited battery power in the devices) without requiring any redeployments. This article uses the Model Based Engineering (MBE) approach to perform design and analysis of BANs. In this regard, first, an abstract cyber-physical model of BANs, called BAN-CPS, is proposed that captures the undesirable side-effects of the medical devices (cyber) on the human body (physical); second, a design and analysis tool, named BAND-AiDe, is developed that allows specification of BAN-CPS using industry standard Abstract Architecture Description Language (AADL) and enables safety and sustainability analysis of BANs; and third, the applicability of BAND-AiDe is shown through a case study using both single and a network of medical devices for health monitoring applications.

Harmless, a hardware architecture description language dedicated to real-time embedded system simulation

Validation and verification of embedded systems through simulation can be conducted at many levels, from the simulation of a high-level application model to the simulation of the actual binary code using an accurate model of the processor. However, for real-time applications, the simulated execution time must be as close as possible to the execution time on the actual platform and in this case the latter gives the closest results. The main drawback of the simulation of application's software using an accurate model of the processor resides in the development of a handwritten simulator which is a difficult and tedious task. This paper presents Harmless, a hardware architecture description language (ADL) that mainly targets real-time embedded systems. Harmless is dedicated to the generation of simulators for hardware platforms to develop and test real-time embedded applications. Compared to existing ADLs, Harmless (1) offers a more flexible description of the instruction set architecture (ISA) (2) allows to describe the microarchitecture independently of the ISA to ease its reuse and (3) compares favorably to simulators generated by the existing ADLs toolsets.

A model for dynamic reconfiguration in service-oriented architectures

The importance of modelling the dynamic characteristics of the architecture of software systems has long been recognised. However, the nature of the dynamics of service-oriented applications goes beyond what is currently addressed by architecture description languages (ADLs). At the heart of the service-oriented approach is the logical separation between the service need and the need-fulfillment mechanism, i.e., the provision of the service: the binding between the requester and the provider is deferred to run time and established at the instance level, i.e., each time the need for the service arises. As a consequence, computation in the context of service-oriented architectures transforms not only the states of the components that implement applications but also the configurations of those applications. In this paper, we present a model for dynamic reconfiguration that is general enough to support the definition of ADLs that are able to address the full dynamics of service-oriented applications. As an instance of the model, we present a simple service-oriented ADL derived from the modelling language srml that we developed in the Sensoria project.

Development of electric/electronic architectures for safety‐related vehicle functions

SUMMARYThe development of software‐based systems for vehicles in compliance with the new standard ISO 26262 – functional safety for road vehicles – requires a common understanding between the two domains. In this paper, we consider the impact of the ISO 26262 to the concept phase of the vehicle development, especially the model‐based development of electric/electronic architectures. To found a formal basis for the electric/electronic architecture modeling, located in the development process and addressed by ISO 26262, we introduce a meta‐model, combining the major concepts and relations of electric/electronic architectures and ISO 26262. Safety analysis can be supported by data available in the electric/electronic architecture model. In this paper, we present a methodology to facilitate and accumulate context‐based information from electric/electronic architecture models to use them as input information for safety analysis. We also demonstrate how to perform the safety analysis method, that is, failure mode and effect analysis, based on the same architecture description language as the electric/electronic architecture model and also within the same modeling tool. We also present a methodology for the modeling and consideration of safety aspects and requirements crossing different system perimeters. This facilitates the consistent description and analysis of systems of systems, such as contemporary vehicles. Copyright © 2012 John Wiley & Sons, Ltd.

SOADL-EH: Service-Oriented Architecture Description Language Supporting Exception Handling

To solve the problem of the construction of service-oriented software architecture with fault tolerant, the paper proposes SOADL-EH, a novel service-oriented software architecture description language supporting exception handling. With the capability of modeling normal SOA and the provision of software architecture elements such as exception handling services, exception handling connectors and exception handling configurations, etc., this language can separate clearly the exception handling logic from the normal business logic of the service-oriented software architecture layer, which makes up the shortage in exception handling capability of the existing Architecture description language.

An Architecture Dynamic Modeling Language for Self-Healing Systems

As modern software-based systems increase in complexity, recovery from malicious attacks and rectification of system faults become more difficult, labor-intensive, and error-prone. These factors have actuated research dealing with the concept of self-healing systems, which employ architectural models to monitor system behavior and use inputs obtaining therefore to adapt themselves to the run-time environment. Numerous architectural description languages (ADLs) have been developed, each providing complementary capabilities for architectural development and analysis. Unfortunately, few ADLs embrace dynamic change as a fundamental consideration and support a broad class of adaptive changes at the architectural level. The Architecture Dynamic Modeling Language (ADML) is being developed as a new formal language and/or conceptual model for representing dynamic software architectures. TheADML couple the static information provided by the system requirements and the dynamic knowledge provided by tactics, and offer a uniform way to represent and reason about both static and dynamic aspects of self-healing systems. Because the ADML is based on the Dynamic Description Logic DDL, architectural ontology entailment for the ADML languages can be reduced to knowledge base satisfiability in DDL.

Design and Analysis of Software Architecture with Unified Modeling Language

Software Architecture is being widely used today to describe a very high level design methodology of large & heterogeneous software systems. A good Architectural representation scheme holds the key to the effectiveness of a Software architecture description and usage. In this paper, we look at UML (unified modeling language) as a prospect for a generalized architecture description language. UML also “unifies the design principles of each of the object oriented methodologies into a single, standard, language that can be easily applied across the board for all object-oriented systems and a scheme AND-OR DFD method is introduced and developed. Keywords: Software Architecture, Unified Modeling Language, Software Architectural modeling view

The Design and Construction of Architecture Description Language for Distributed Software

The Design and Construction of Architecture Description Language for Distributed Software

Structured performance analysis for component-based systems

The component-based system (CBS) paradigm is now largely used to design software systems. In addition, performance and behavioural analysis remains a required step for the design and the construction of efficient systems. This is especially the case of CBS, which involve interconnected components running concurrent processes. This paper proposes a compositional method for modelling and structured performance analysis of CBS. Modelling is based on stochastic well-formed nets (SWNs), a high level model of stochastic Petri nets, widely used for dependability analysis of concurrent systems. Starting from the definition of the system given in a suitable architecture description language, and from the definition of the elementary components, we build an SWN of the global system together with a set of SWNs modelling the components of the CBS and their connections. From these models, we derive performances of the system thanks to a structured analysis induced by the structure of the CBS. We describe the application of our method through an example designed in the framework of the CORBA component model.