We present a family of demultiplexer circuit designs based on linear error-correcting codes,which can be laid out on nanoelectronic crossbar structures. The crossbars are assumed tohave configurable resistors at the crosspoint junctions, and the demultiplexer circuits aretherefore implemented using resistor logic. In general, resistor logic offers poor voltagemargins when implementing digital circuits, but the circuit construction we present allowsus to circumvent this problem by capitalizing on the minimum-distance property of codesto avoid certain problem cases, and thus achieve a much larger voltage margin. Foreach linear code, there is a corresponding demultiplexer circuit prescribed bythis construction, and thus a large family of demultiplexer circuits is defined.When a demultiplexer of a given size is needed in a system, this circuit familyoffers to the designer a set of alternative demultiplexer circuit designs, in whichincreasing voltage margins can be achieved, but at the cost of increasing circuit area.We analyse a demultiplexer circuit based on an arbitrary linear code. For thisgeneral case, we give the encoding computation prescribed by the code, give theconfiguration pattern prescribed by the code for the crossbar part of the circuit,calculate the output voltage on each of the demux output lines as a function of thecurrent input signal, calculate the worst-case voltage margin, and calculate costparameters measuring the increased area consumed by the circuit. This code-baseddemultiplexer circuit design makes it possible to handle the voltage-margin problem ofresistor logic, and thus makes it feasible to build relatively large demultiplexersusing nano-scale crossbars with configurable resistors at the crossbar junctions.