Power Electronics Applications Research Articles

A novel stepped AlGaN hybrid buffer GaN HEMT for power electronics applications

In this paper, a novel p-type gallium nitride (p-GaN) high electron mobility transistor (HEMT) is proposed and investigated for high power electronic applications. In the proposed device, a stepped hybrid Aluminium GaN (AlGaN) buffer layer with low Al content has been introduced to improve the performance of the device. The low aluminium mole concentration decreases the surface defects which reduces the leakage current, thereby increasing the breakdown voltage of the device. To validate the simulation results, calibration of the device models has been performed with experimental results. Results present that the proposed device exhibits high breakdown voltage, high transconductance and low small signal capacitances. The proposed device achieves improvement in breakdown voltage, transconductance and small signal capacitances as compared to the conventional hybrid buffer high electron mobility transistor (HB-HEMT). Furthermore, the processing steps have been proposed for the possible fabrication of the proposed device. Also, the optimization is performed to achieve the optimal device performance with respect to breakdown voltage. Finally, the performance of the proposed device has been compared with the state-of-the-art devices.

Health Monitoring of Power Semiconductor Module Using Temperature Sensitive Electrical Parameter

Power semiconductor modules (PSMs) are critical components in power electronics applications such as motor drives, renewable energy systems, and electric vehicles. The reliable operation of these modules is crucial for the safe and efficient operation of these systems. One of the most common failure mechanisms in PSMs is due to overheating or repeated heating and cooling, which can result in thermal stress and component degradation. Therefore, monitoring the temperature of PSMs is essential for ensuring their health and preventing catastrophic failures. By monitoring temperature-sensitive electrical parameters (TSEPs), such as the on-state voltage drop, it is possible to detect changes in the temperature of the PSM in real-time. The change in voltage drop can be used as an early warning sign of a potential failure or degradation of the PSM. The advantage of this method is that it provides a non-invasive and real-time monitoring solution that can detect changes in the PSM's temperature distribution.

An Online Condition Monitoring Method for IGBT Gate Oxide Degradation Based on the Gate Current in Miller Plateau

The reliability of power converters is one of the important issues due to the widespread applications of power electronics in many industrial fields. Accordingly, condition monitoring (CM) methods for the assessment of the converter components health are considered as a practical topic for researchers and experts of the field. This paper aims to propose a CM method for insulated gate bipolar transistors (IGBTs) gate-oxide degradation. The proposed CM is based on the gate-emitter current during the turning-on process. It is shown that in the degradation process, the gate current peak value majorly increases. The proposed CM method captures this peak value and uses it as a degradation indicator. The proposed method is simple and analogous that can be served easily for online health assessment of the IGBTs under operation. It can be integrated into the driver module to assess the gate oxide degradation of the device. The functionality of the proposed method is evaluated using experimental prototyping. The target devices are a 1200 V, and 40 A trench-gate field-stop and a 600 V and 60 A planner gate punch-through (PT) discrete IGBTs. The achieved results show the validity and acceptable performance of the proposed CM for detecting the gate-oxide degradation of the device.

F-Type Single Phase Five Level Inverter

In modern industrial and power electronics applications, high-voltage and high-current integrated modular power transistors (IGBTs) are increasingly being utilized. The F-type inverter, which is a modified version of the T-type inverter, has emerged as a promising option. This configuration separates the common point of the bidirectional power switch, reducing voltage stress and resulting in lower inverter costs and losses. The F-type inverter has a simplified design and lower conduction losses, making it a viable choice for medium-voltage applications compared to the clamp diode NPC inverter configuration. Detailed analysis of losses and efficiency has been conducted, and a simulation and experimental prototype have been built to validate the theoretical basis. In addition, the voltage rating of the power switches in the T-type three-level inverter is a limiting factor, as it is only 50% of the input DC voltage for each inverter phase leg.

Transformer modelling considering power losses using an inverse Jiles-Atherton approach

Power transformers are devices with non-linear behavior due to the saturation of the ferromagnetic core. When modelling such devices, the saturation effect must be taken into account because it greatly affects their performance and efficiency. In this paper, an electromagnetic model for power transformers is proposed and experimentally validated using an electrical T-model coupled with a reluctance network to model the magnetic part. The electrical circuit and the reluctance network are linked by two B–H approaches. The B–H relationships are modelled by the full hysteresis cycle based on the inverse Jiles-Atherton theory and by the initial magnetization curve. The results obtained with the inverse Jiles-Atherton theory model reproduce the magnetic core behavior with more accuracy than the one based on the initial magnetization curve, especially at low load conditions where saturation plays a more prominent role on the no-load current. The proposed model can be applied to other magnetic devices such as inductors for power electronic applications or electromechanical relays, among others.

The mechanisms of enhanced thickness‐dependent DC breakdown strength of EP/MWCNTs nanocomposites

AbstractOwing to advanced power electronic and electrical applications developing towards miniaturisation and integration, the thickness‐dependent DC breakdown mechanism of epoxy/multiwall‐carbon‐nanotube nanocomposites is under investigation. The results indicate that the breakdown strength of nanocomposites containing 0.05 wt% multiwall‐carbon‐nanotubes rises by ∼18%, and the breakdown strength falls exponentially with increasing thickness. To clarify the microscopic mechanism, a simulation model of DC breakdown, including carriers transport and segmental dynamics, is developed, and the accordant simulation results with experimental results indicate that the thickness‐dependent DC breakdown of epoxy/multiwall‐carbon‐nanotube nanocomposites is determined both by segment chain dynamics and charge transport. According to the breakdown model analysis, the effects of multiwall‐carbon‐nanotube on enhanced breakdown strength are caused by the increased amount of deep traps in the interfacial region, while the influence of thickness is attributed to the enlarged segment chain displacement and electric field distortion as the voltage raising time increases.

An avalanche-and-surge robust ultrawide-bandgap heterojunction for power electronics

Avalanche and surge robustness involve fundamental carrier dynamics under high electric field and current density. They are also prerequisites of any power device to survive common overvoltage and overcurrent stresses in power electronics applications such as electric vehicles, electricity grids, and renewable energy processing. Despite tremendous efforts to develop the next-generation power devices using emerging ultra-wide bandgap semiconductors, the lack of effective bipolar doping has been a daunting obstacle for achieving the necessary robustness in these devices. Here we report avalanche and surge robustness in a heterojunction formed between the ultra-wide bandgap n-type gallium oxide and the wide-bandgap p-type nickel oxide. Under 1500 V reverse bias, impact ionization initiates in gallium oxide, and the staggered band alignment favors efficient hole removal, enabling a high avalanche current over 50 A. Under forward bias, bipolar conductivity modulation enables the junction to survive over 50 A surge current. Moreover, the asymmetric carrier lifetime makes the high-level carrier injection dominant in nickel oxide, enabling a fast reverse recovery within 15 ns. This heterojunction breaks the fundamental trade-off between robustness and switching speed in conventional homojunctions and removes a key hurdle to advance ultra-wide bandgap semiconductor devices for power industrial applications.

Temperature-dependent thermal conductivity of MBE-grown epitaxial SrSnO3 films

As an ultrawide bandgap (∼4.1 eV) semiconductor, single crystalline SrSnO3 (SSO) has promising electrical properties for applications in power electronics and transparent conductors. The device performance can be limited by heat dissipation issues. However, a systematic study detailing its thermal transport properties remains elusive. This work studies the temperature-dependent thermal properties of a single crystalline SSO thin film prepared with hybrid molecular beam epitaxy. By combining time-domain thermoreflectance and Debye–Callaway modeling, physical insight into thermal transport mechanisms is provided. At room temperature, the 350-nm SSO film has a thermal conductivity of 4.4 W m−1 K−1, ∼60% lower than those of other perovskite oxides (SrTiO3, BaSnO3) with the same ABO3 structural formula. This difference is attributed to the low zone-boundary frequency of SSO, resulting from its distorted orthorhombic structure with tilted octahedra. At high temperatures, the thermal conductivity of SSO decreases with temperature following a ∼T−0.54 dependence, weaker than the typical T−1 trend dominated by the Umklapp scattering. This work not only reveals the fundamental mechanisms of thermal transport in single crystalline SSO but also sheds light on the thermal design and optimization of SSO-based electronic applications.

Three-Phase Motor Inverter and Current Sensing GaN Power IC.

A three-phase GaN-based motor inverter IC with three integrated phase current mirror sensors (sense-FETs or sense-HEMTs, 1200:1 ratio), a temperature sensor, and an amplifier is presented and experimentally operated. The three low-side currents are read out by virtual grounding transimpedance amplifiers. A modified summed DC current readout circuit using only one amplifier is also discussed. During continuous 24 V motor operation with space-vector pulse width modulation (SVPWM), the sensor signal is measured and a bidirectional measurement capability is verified. The measured risetime of the sensor signal is 51 ns, indicating around 7 MHz bandwidth (without intentional optimization for high bandwidth). The IC is operated up to 32 V on DC-biased semi-floating substrate to limit negative static back-gating of the high-side transistors to around -7% of the DC-link voltage. Analysis of the capacitive coupling from the three switch-nodes to the substrate is calculated for SVPWM based on capacitance measurement, resulting in four discrete semi-floating substrate voltage levels, which is experimentally verified. Integrated advanced power converter topologies with sensors improve the power density of power electronics applications, such as for low-voltage motor drive.

RANCANG BANGUN DAN PROTEKSI INVERTER PURE SINE WAVE SPWM 500 WATT BERBASIS MIKROKONTROLER MENGGUNAKAN FUZZY LOGIC

The application of power electronics is growing in the DC to AC converter system often called (Inverter). The inverter system utilizes a DC voltage source generated by a battery, power supply, or other DC voltage source, which will later be converted to AC voltage by the inverter. The development of microcontrollers as a driver for generating PWM signals on inverters encourages us to continue to develop. One of the developments of the microcontroller is ESP32. This study aims to produce a single-phase inverter with a pure sine wave output using the ESP32 driver as the SPWM signal generator. Besides that, to maximize the performance of the inverter, it is necessary to add a protection system to reduce the risk of damage to the inverter or the load. The use of fuzzy method is used to stabilize the voltage.

Atomic structure, thermal stability and isothermal crystallization kinetics of novel Co-based metallic glasses with excellent soft magnetic properties

In this work, Co66-xFexHf6.5B27.5 (x = 0, 10, 15, 20) metallic glasses (MGs) have been prepared by melt-spinning, and a comprehensive qualitative study including the atomic structure, thermal behavior, crystallization kinetics, and magnetic properties of the MGs is presented. The addition of Fe notably improves the thermal stability of the prepared glasses by increasing the width of the supercooled liquid region (SLR) from 26 K to 55 K. Analysis of the structure factor and the reduced-pair distribution function (PDF) reveal subtle variations in short-range ordering (SRO) and an increase of the atomic packing density of the glassy phase by 20 at% Fe addition. Notable rises in saturation polarization, Js, (from 0.21 T to 0.67 T), Curie point, Tc, (from 315 K to 530 K) and coercivity, Hc, (from 0.5 A/m to 2.5 A/m) are found after Fe alloying. The isothermal crystallization kinetics determined by the Johnson-Mehl-Avrami-Kolmogorov (JMAK) approach demonstrate that the novel Co46Fe20Hf6.5B27.5 MG exhibits a remarkably higher activation energy and a significantly longer incubation time (about 16 min) before crystallization compared to existing Fe-free (x = 0) as well as most other Fe/Co-based MGs. Slight increases in Js (up to 5%) and Tc (about 4.7%), and a remarkable drop in Hc (up to 80%) are achieved for the Co46Fe20Hf6.5B27.5 MG upon isothermal annealing for a period of 3600 s. The attractive features such as high thermal stability, low coercivity of 0.5 A/m, and higher Js (up 0.7 T) compared to many Co-based glasses, make Co46Fe20Hf6.5B27.5 MG a promising soft magnetic material for future applications in power electronics, electric machines, and fabrication of large-size glassy samples by hot consolidation of MG particles.

Experimental investigation on the instability for NiO/β-Ga2O3 heterojunction-gate FETs under negative bias stress

A NiO/β-Ga2O3 heterojunction-gate field effect transistor (HJ-FET) is fabricated and its instability mechanisms are experimentally investigated under different gate stress voltage (V G,s) and stress times (t s). Two different degradation mechanisms of the devices under negative bias stress (NBS) are identified. At low V G,s for a short t s, NiO bulk traps trapping/de-trapping electrons are responsible for decrease/recovery of the leakage current, respectively. At higher V G,s or long t s, the device transfer characteristic curves and threshold voltage (V TH) are almost permanently negatively shifted. This is because the interface dipoles are almost permanently ionized and neutralize the ionized charges in the space charge region (SCR) across the heterojunction interface, resulting in a narrowing SCR. This provides an important theoretical guide to study the reliability of NiO/β-Ga2O3 heterojunction devices in power electronic applications.

Large-area β-Ga2O3 Schottky barrier diode and its application in DC–DC converters

We demonstrate superb large-area vertical β-Ga2O3 SBDs with a Schottky contact area of 1 × 1 mm2 and obtain a high-efficiency DC–DC converter based on the device. The β-Ga2O3 SBD can obtain a forward current of 8 A with a forward voltage of 5 V, and has a reverse breakdown voltage of 612 V. The forward turn-on voltage (V F) and the on-resistance (R on) are 1.17 V and 0.46 Ω, respectively. The conversion efficiency of the β-Ga2O3 SBD-based DC–DC converter is 95.81%. This work indicates the great potential of Ga2O3 SBDs and relevant circuits in power electronic applications.

Thermal Impedance Calibration for Rapid and Noninvasive Calorimetric Soft-Switching Loss Characterization

Virtual prototyping, multi-objective optimization and design automation are increasingly being used to meet the growing demands of modern power electronic applications in terms of efficiency and power density. These concepts are based on accurate loss models of the power semiconductors used. While for hard-switching the double pulse test is an established electrical characterization method, soft-switching losses can only be determined by calorimetric measurements. Despite significant improvements in using transient approaches, calorimetric characterization of soft-switching loss energy is very time-intensive and requires complex measurement setups. This paper presents a new automated calorimetric method with thermal impedance calibration that enables rapid and non-invasive switching loss measurements. Using ultra-fast transient measurements and accelerated cooling phases in between, soft-switching loss maps can be determined based on hundreds of individual readings. The proposed measuring method is validated against hard-switching electrical double pulse test measurements. The method achieves a maximum error of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$1.9 \,\%$</tex-math></inline-formula> for the total loss measurement from <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$1-9 \,\mathrm{W}$</tex-math></inline-formula> and an average measurement error of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$16.5 \,\%$</tex-math></inline-formula> for the soft-switching energy from <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$1-4 \,\mu \mathrm{J}$</tex-math></inline-formula> of wide bandgap power semiconductors. In addition to comparing the results of different semiconductor technologies for use in a charger application, the manufacturers' simulation models are also analyzed with respect to soft-switching energy.

Practical deadbeat MPC design via controller matching with applications in power electronics

Several applications, including power electronics and electrical machines, require a fast system response, which is typically achieved via deadbeat control. Hence, there has been an interest in developing model predictive control (MPC) algorithms with deadbeat control properties, i.e., finite-time convergence to a set-point, for power electronics applications. In this paper, we design a practical deadbeat MPC via controller matching. We make use of an existing result for tuning the weight matrices of the MPC cost function such that the corresponding unconstrained MPC solution matches a desired deadbeat controller. This approach allows for a positive definite input weight matrix and provides stability and recursive feasibility guarantees for the resulting MPC controller. We additionally propose a vertex relaxation of the matching problem, which reduces conservatism, and a method for enlarging the terminal set of the deadbeat MPC controller. Three benchmark examples from the power electronics field are used to show the effectiveness of the proposed MPC design.

Model predictive current control with a finite set of novel voltages and modulator in permanent magnet synchronous motor drives

AbstractFinite control set model predictive control (FCS–MPC) has been deployed extensively in electric motor drives and power electronics applications. Many advantages, including fast transient response, have been reported. However, the improvement of its steady‐state performance, that is, suppression of current ripple, is one of the main problems of a conventional FCS–MPC strategy. This article presents a current control strategy based on FCS–MPC using the concept of variable voltage smoothing. In the proposed method, a finite set of novel voltage vectors, produced by the smoothing process, are introduced as candidate control input candidates, and the controller generates the optimum output voltage using a modulator integrated with the FCS–MPC scheme. Thus, the voltage candidates are generated flexibly, and a suitable voltage for acceptable steady‐state performance is determined as the control input. In addition, the smoothness in the proposed concept can be updated automatically depending on the drive situation, that is, transient, or steady‐state operation, thus avoiding degradation of dynamic performance. Simulation and experimental results obtained with a permanent magnet synchronous motor drive system demonstrate that the proposed control strategy is effective to achieve current control with fast tracking performance while suppressing current ripple.

High Frequency Transformers for Solid-State Transformer Applications

This paper focuses on the study of the high frequency transformer incorporated in solid- state transformers, specifically on the development of the steps that enable the design of an optimized high frequency transformer and its equivalent model based on the desired characteristics. The impact of operating a transformer at high frequency and the respective solutions that allow this impact to be reduced are analyzed, alongside the numerous advantages that the utilization of these transformers has over traditional 50/60 Hz transformers. Furthermore, the power scheme of the solid-state transformer is outlined, focusing on the power converters, which are immediately before and after the high frequency transformer (HFT). We also investigate a control technique that allows for correct operation and the existence of power bidirectionality. In a novel approach, this paper demonstrates the systematic steps for designing an HFT according to the desired specifications of each given project, helping students and engineers achieve their objectives in power-electronic applications. Moreover, this paper aims at increasing the knowledge of this area of power electronics and facilitating the development of new topologies with high power density, which are very important to the integration of renewable power sources and other applications. Finally, a simulation is presented to validate a high frequency transformer and its control technique.

Surface flashover in 50 years: Theoretical models and competing mechanisms

AbstractSurface flashover is a devastating electronic avalanche along the gas–solid interface when a high electric field is applied, which is a potential issue that threatens the safe operations of advanced power electronic, electrical, and spacecraft applications. However, the underlying physical mechanisms for surface flashover development are still under investigation owing to the complex charge transport processes through the gas phase, solid phase, and gas–solid interface. In this study, the history of surface flashover theory in the last 50 years is introduced, and several key questions are reviewed from the perspective of the competing mechanisms of charge transport: the role of each phase in a surface flashover, the origin of surface charging, and effects of traps in solid on surface flashover. Then, some suggestions involve charge transport processes in each phase, and their correlations are put forward, and a predictable ‘charge transport competitive flashover model’ is proposed by clarifying the competing mechanisms of charge transport processes through multiple phases. This study summarises the history and hot topics of physical mechanisms of surface flashover proposed based on classic and recent progress and offers promising routes for developing a more precise surface flashover theory and improving surface flashover performances.

Carrier Trap Density Reduction at SiO2/4H-Silicon Carbide Interface with Annealing Processes in Phosphoryl Chloride and Nitride Oxide Atmospheres.

The electrical and physical properties of the SiC/SiO2 interfaces are critical for the reliability and performance of SiC-based MOSFETs. Optimizing the oxidation and post-oxidation processes is the most promising method of improving oxide quality, channel mobility, and thus the series resistance of the MOSFET. In this work, we analyze the effects of the POCl3 annealing and NO annealing processes on the electrical properties of metal-oxide-semiconductor (MOS) devices formed on 4H-SiC (0001). It is shown that combined annealing processes can result in both low interface trap density (Dit), which is crucial for oxide application in SiC power electronics, and high dielectric breakdown voltage comparable with those obtained via thermal oxidation in pure O2. Comparative results of non-annealed, NO-annealed, and POCl3-annealed oxide-semiconductor structures are shown. POCl3 annealing reduces the interface state density more effectively than the well-established NO annealing processes. The result of 2 × 1011 cm-2 for the interface trap density was attained for a sequence of the two-step annealing process in POCl3 and next in NO atmospheres. The obtained values Dit are comparable to the best results for the SiO2/4H-SiC structures recognized in the literature, while the dielectric critical field was measured at a level ≥9 MVcm-1 with low leakage currents at high fields. Dielectrics, which were developed in this study, have been used to fabricate the 4H-SiC MOSFET transistors successfully.

Temperature-dependent microwave dielectric permittivity of gallium oxide: A deep potential molecular dynamics study

The microwave (MW) dielectric permittivity of gallium oxide (β-Ga2O3) fundamentally determines its interaction with an electromagnetic wave in bulk power. Yet, there is a lack of experimental data due to limitations of high-temperature MW dielectric measurements and the large uncertainty under variable-temperature conditions. Herein, we develop a deep potential (DP) based on density functional theory (DFT) results and apply deep potential molecular dynamics (DPMD) for accurately predicting temperature-dependent MW dielectric permittivity of β-Ga2O3. The predicted energies and forces by DP demonstrate excellent agreement with DFT results, and DPMD successfully simulates systems up to 1280 atoms with quantum precision over nanosecond scales. Overall, the real part of the MW dielectric permittivity decreases with rising frequency, but the dielectric loss increases. The MW dielectric permittivity gradually increases as the temperature increases, which is closely related to the reduced dielectric relaxation time and increased static and high-frequency dielectric constants. Besides, the oxygen vacancy defects significantly reduce the relaxation time; however, augmenting the defect concentration will cause a slight rise in relaxation time. The electron localization function analysis reveals that more free electrons and low localization of electrons produced by high defect concentrations facilitate the increased relaxation time. This study provides an alternative route to investigate the temperature-dependent MW permittivity of β-Ga2O3, which attains prime importance for its potential applications in RF and power electronics.