Anti-parallel Diode Research Articles

Operating efficiency enhancement of hybrid energy storage system for IPMSM drives

ABSTRACT This paper proposes a control strategy to enhance the operating efficiency of a Hybrid Energy Storage System (HESS) for an Interior Permanent Magnet Synchronous Motor (IPMSM) drive. In this method, the battery and super-capacitor (SC) are connected by an interleaved DC-DC (DD) converter where a bypass DD scheme with the inherent anti-parallel diode of power switches is used to create another shorter path for battery discharge. In this design, an adjustable DC-link voltage is accomplished to fit the characterisations in various motor operating conditions. Then, with the corresponding control design, the proposed HESS can operate in an optimal state to improve efficiency and extend the battery lifetime. To validate the effectiveness of the method, several operation scenarios including acceleration, constant-speed and deceleration of the IPMSM are examined using simulations. This is further supported through the experimental study. The test results obtained under the buck, boost and bypass converter scenarios consolidate the feasibility and practicality of the proposed approach in an attempt for potential electric vehicle applications.

Исследование теплоэлектрических процессов в силовых модулях

The paper describes the results of investigation of thermophysical processes in power modules. Measuring the thermal field caused by dies heating due to flow of heating current shows uniform temperature distribution in the area of dies mount. This indicates that the processes of current localization caused by positive thermal feedback are compensated by the processes of heat transfer between the chips through the DBC board, which has a high thermal conductivity. The modulation method was used to measure the thermal resistance "junction-to-case" of the power module. In this case, the module dies were heated by PWM pulses of the heating current through the antiparallel diodes of the module MOSFETs. The modulation method allows to measure power module thermal resistance, which value is less than 0.1 K/W.

A design of 210 to 235GHzfixed tuned mixer using planar Schottky diode

This paper presents the design of a fixed tuned 210 to 235 GHz subharmonic mixer (SHM). The mixer is designed using GaAs based planar antiparallel Schottky diode pair AP1/G2/0P95 from Rutherford Appleton Laboratory. 3D model of the Schottky diode is discussed and simulated to consider parasitic effects of the diode. Detailed design technique of each of its subsections as well as the integrated mixer circuit is presented. Nonlinear co-simulation of the designed mixer exhibits double sideband (DSB) conversion loss less than 9.2 dB over the frequency band 210 to 235 GHz with 4 dBm of local oscillator (LO) power while the area of the rectangular printed section is 4.224 × 0.35 mm.

Low‐local‐oscillator‐power sub‐harmonic mixing in 300‐GHz band by Fermi‐level managed barrier diode

An anti-parallel (AP) diode pair based on a Fermi-level managed barrier (FMB) diode was developed for the sub-harmonic mixing of terahertz waves. A quasi-optical module integrating an AP–FMB diode pair and a trans-impedance amplifier exhibited a very low noise-equivalent-power of 9 × 10−19 W/Hz at an input signal frequency of 304 GHz with a very low local oscillator power of 30 μW.

Soft switching circuit of high-frequency active neutral point clamped inverter based on SiC/Si hybrid device

Although the silicon carbide (SiC) metal–oxide–semiconductor field-effect transistor (MOSFET) is superior to the conventional silicon (Si) insulated gate bipolar transistor in terms of switching performance, the switching losses of SiC devices increase rapidly by hard switching when the switching frequency (fsw) increase to hundreds of kilohertz (kHz). This paper proposes an auxiliary zero-voltage-transition circuit to realize zero-voltage-switching for all of the high-frequency main switches of the active neutral point clamped (ANPC) inverter based on a SiC/Si hybrid device, and zero-current-switching for all of the auxiliary switches. Through soft switching, the switching losses and anti-parallel diode reverse recovery losses of high-frequency SiC MOSFET switches can be further reduced. First, the circuit topology and the operation principle of the soft switching are detailed followed by the design procedure of the parameters. Then, the efficiencies of hard switching and soft switching ANPC inverters are compared with fsw changing from 10 to 200 kHz. To further improve the efficiency of the soft-switching inverter, two improved methods are proposed. The two proposed methods are auxiliary switches paralleling the external diode and utilizing synchronous rectification technology. Finally, a 1 kW, up to 200 kHz frequency ANPC inverter has been built to validate the above analysis.

Asymmetry-Induced Dynamics for a Class of Diode-Based Chaotic Circuits: A Case Study

We consider the modeling and asymmetry-induced dynamics for a class of chaotic circuits sharing the same feature of an antiparallel diodes pair as the nonlinear component. The simple autonomous jerk circuit of [J. Kengne, Z. T. Njitacke, A. N. Nguomkam, M. T. Fouodji and H. B. Fotsin, Coexistence of multiple attractors and crisis route to chaos in a novel chaotic jerk circuit, Int. J. Bifurcation Chaos Appl. Sci. Eng. 26 (2016) 1650081] is used as the prototype. In contrast to current approaches where the diodes are assumed to be identical (and thus a perfect symmetric circuit), we examine the more realistic situation where the diodes have different electrical properties in spite of unavoidable scattering of parameters. In this case, the nonlinear component formed by the diodes pair displays an asymmetric current–voltage characteristic which induces asymmetry of the whole circuit. The model is described by a continuous-time 3D autonomous system (ODEs) with exponential nonlinearities. We examine the chaos mechanism with respect to system parameters both in the symmetric and asymmetric modes of operation by using bifurcation diagrams and phase space trajectory plots as the main indicators. Period doubling route to chaos, merging crisis, and multiple coexisting (i.e., two, four, or six) mutually symmetric attractors are reported in the symmetric mode of oscillation. In the asymmetric mode, several unusual nonlinear behaviors arise such as coexisting bifurcations, hysteresis, asymmetric double-band chaotic attractor, crisis, and coexisting multiple (i.e., two, three, four, or five) asymmetric attractors for some suitable ranges of parameters. Theoretical analyses and circuit experiments show a very good agreement. The results obtained in this work let us conjecture that chaotic circuits with antiparallel diodes pair are capable of much more complex dynamics than what is reported in the current literature and thus should be reconsidered accordingly in spite of the approach followed in this work.

A Modified Single-Stage Three-Phase Boost Inverter for PV Applications

This paper proposes a single-stage three-phase boost inverter for Photovoltaic (PV) applications. The proposed circuit topology is directly step-up the input low level DC voltage to a high-level output AC voltage in only one stage, using an inductor and six switches. A new control methodology is introduced to regulate the AC output voltage and current and is suitable for grid-connected and stand-alone applications. The proposed circuit uses only six switches of a simple type of switches that achieve the desired objectives easily without additional antiparallel diodes. The circuit topology is extensively analysed and the overall performance including total harmonic distortion (THD) is obtained by computer simulation and presented under different conditions. A DSP-based laboratory model is built to assess the proposed single-stage three-phase boost inverter when fed from a PV source. The experimental results confirm the simulation, illustrating the successful operation of the proposed circuit topology to produce three-phase AC output from the low DC voltage of the PV source.

A Voltage Balancing Method for Series-Connected Power Devices in an LLC Resonant Converter

This letter proposes a voltage balancing method for series-connected power devices in an LLC resonant converter. Series connection of power devices can allow an LLC resonant converter to operate in high-voltage applications. One key problem of series-connected power devices is the voltage imbalance due to device parameter deviations and gate drive delays. To achieve voltage balancing, an auxiliary module (AM) is connected in parallel with each power device. Each AM consists of a capacitor and an auxiliary switch with an antiparallel diode. The AM operates as a clamping circuit and voltage among the series-connected power devices can be shared evenly if the AM capacitor voltages are well-balanced. The AM capacitors are charged during the asynchronous period of the series-connected power devices. The excess energy of AM capacitors can be released by the freewheeling current during dead time in an LLC converter. By assigning a pulsing gate signal to AMs with higher voltages in every switching cycle, the AM capacitor voltages can be balanced. The proposed method will not induce additional power loss and does not affect the normal operation of power devices. Experimental results are provided to verify the effectiveness and feasibility of the proposed method.

Phase characteristics of E class amplifier with various output networks

Phase shift of E class amplifiers with classical output network and output network that satisfies E class loading impedance conditions twice in the frequency band were studied by simulation and experimentally. The phase shift across switch in nominal operation mode was investigated analytically. The phase shift across switch in suboptimal class E operation mode that occurs while altering the operation frequency was investigated as well. The simulation method was the harmonic balance analysis using the switch model that considers the structure of power MOSFET device, namely, the existence of antiparallel diode pair that alters the switch current waveform. The input and transition capacitances of the transistor were considered. Experimental measurement of the phase shift was performed utilizing the recorded digitized waveforms of the switch input and output voltages by computing the phases of the voltages’ first harmonics with the help of Fast Fourier Transform. It was observed that characteristics of phase shift at switch output and amplifier output are dependent on the kind of load network. The relationship between the phase shift at the switch and hodograph of the loading impedance was demonstrated. For the network with double fulfilment of class E conditions that has a loop in the loading impedance hodograph the switch phase shift dependency has an extremum, which provides an opportunity to obtain the same phase shift at two frequencies within the operating frequency band. That facilitates control of the phase-frequency characteristic and the group delay of the amplifier. Knowledge of the phase-frequency dependency simplifies the conditions for calculation of the phase shift in the feedback network. The obtained results are useful for design of class E oscillator operating in a wide frequency band.

Silicon Integrated Subharmonic Mixer on a Photonic-Crystal Platform

This article presents a planar silicon integrated subharmonic mixer on top of a photonic-crystal (PC) platform. The local oscillator power is injected through a 2-D PC slab to a resonant cavity that effectively couples the signal to a planar bow-tie antenna. The same antenna, which is printed on the top of the PC cavity, contains an antiparallel Schottky diode pair, which performs the downconversion. The proposed design is a simple, easy-to-integrate, low-cost, low-profile device. Moreover, the described fabrication process is compatible with active component integration. The performance of the design has been experimentally demonstrated showing good agreement with the simulation and is comparable with the state of the art of planar mixers. The work presented here is based on concepts and technologies from electronics and photonics domains and may be a good starting point for the creation of new devices, allowing the integration and upgrading of existing techniques from both fields.

Global MPP Tracking for Partial shaded PV System using Fractional Order Extreme Seeking controller

Renewable energy tends to replace natural resources like coal and fuel, nowadays research work is in progress on solar power utilization. To overcome the photovoltaic (PV) installation issue, building-integrated PV (BiPV) system has been introduced. Partial shading is major issue in BiPV system. In order to prevent this issue, an anti-parallel bypass diode is added across each panel/cell. But it results in multiple peaks p-v characteristics with respect to varying irradiations. To track global peak power among all other local peaks, a special control algorithm based on extreme seeking (ES) strategy with fractional order controller (FOC) is developed. The proposed control method increases the power generation and efficient tracking of maximum power at MPP.

Power Loss and Thermal Impedance Modeling of Multilevel Power Converter With Discontinuous Modulation

The hard switching operation of the insulated gate bipolar transistor (IGBT)-based multilevel converters (MLCs) in the transformer less direct integration of renewable power plants produces a considerable amount of switching and conduction power loss. This eventually causes higher junction temperature and lower thermal stability. The symmetrically designed MLC using third harmonic sixty-degree bus-clamped pulse width modulation (BCPWM) technique demonstrates reduced switching losses and better harmonic spectra. However, the development of analytical power loss model is a complex and challenging issue due to the discontinuous switching mode of IGBTs for the BCPWM in MLC. In this regard, an analytical model for calculating the average and the rms currents for the hard switching operation of IGBTs and antiparallel diodes (APDs) with BCPWM is proposed. Furthermore, to calculate the device turn-on and turn-off losses, a discrete form of equation is presented to evaluate the transition times of switching more precisely. The numerical power loss values of IGBTs and APDs found from the derived analytical equations for MLC are compared with the simulation and experimental results. The numerical results agree well with the simulated and the experimental outcomes, which validate the proposed analytical loss model. Moreover, an advanced three dimensional thermal impedance model with chip-wise interdependent multilayer thermal coupling effect is also considered in this paper to realize the critical thermal loading condition of the switching devices.

High-Gain Bidirectional Quadratic DC–DC Converter Based on Coupled Inductor With Current Ripple Reduction Capability

In this article, a high-gain bidirectional quadratic dc-dc converter is proposed. This converter is studied under step-up and step-down modes. In each power flow direction, two switches and two antiparallel diodes of the other switches operate. Therefore, the switching losses depend only on the operation of two switches in each direction. The use of coupled inductor in the proposed converter significantly reduces the input and output current ripples of the step-up and step-down modes, respectively, at all operating points of continuous and discontinuous conduction modes (CCM and DCM). The voltage gain of the proposed converter in the step-up mode is as high as that of the cascaded boost converter, and in the step-down mode, the converter voltage gain is similar to that of the cascaded buck converter. Thus, the high-voltage conversion ratio with an appropriate duty-cycle in both power flow directions can be achieved. The operating principles and steady-state analysis of the proposed converter in CCM, DCM, and the boundary-conditions between these modes are discussed in detail. Finally, a prototype of the converter is implemented in the laboratory and the experimental results are presented to validate the effectiveness of the proposed converter.

Virtual Synchronous Machine/Dual-Droop Controller for Parallel Interlinking Converters in Hybrid AC–DC Microgrids

This paper addresses the operation of parallel interlinking converters (ICs) in hybrid AC–DC microgrids from different perspectives, then proposes a unified mitigation technique. Firstly, the influence of the system nonlinearity on circulating currents between parallel ICs is investigated. Secondly, it is shown that ICs might induce voltage harmonics due to the antiparallel diodes of the power electronic switches which are seen by the AC subgrid as nonlinear diode rectifiers. Lastly, the synchronization of ICs following abnormal operating conditions is discussed and new findings are presented. In order to enhance the operation of ICs and overcome the preceding challenges, a modified virtual synchronous machine (VSM) strategy with a dual-droop (DD) controller is proposed. The positive influence of the proposed VSM-DD controller on the overall system dynamics is clearly justified. Small-signal state-space modeling for the entire system is conducted to verify the results analytically. A nonlinear time-domain simulation model is developed using PSCAD/EMTDC to validate the impact of the VSM-DD controller experimentally.

D-Band Frequency Tripler Module Using Anti-Parallel Diode Pair and Waveguide Transitions

In this paper, D-band (110–170 GHz) frequency tripler module is presented using anti-parallel GaAs Schottky diode pair and waveguide-to-microstrip transitions. The anti-parallel diode pair is used as a nonlinear device generating harmonic components for Q-band input signal (33–50 GHz). The diode is zero-biased to eliminate the bias circuits and thus minimize the number of circuit components for low-cost hybrid fabrication. The anti-parallel connection of two identical diodes effectively suppresses DC and even harmonics in the output. Furthermore, the first and second harmonics of Q-band input signal are cut off by D-band rectangular waveguide. Input and output impedance matching networks are designed based on the optimum impedances determined by harmonic source- and load-pull simulations using the developed nonlinear diode model. Waveguide-to-microstrip transitions at Q- and D-bands are also designed using E-plane probe to package the frequency tripler in the waveguide module. The compensation circuit is added to reduce the impedance mismatches by bond-wires connecting two separate substrates. The fabricated frequency tripler module produces a maximum output power of 5.4 dBm at 123 GHz under input power of 20.5 dBm. A 3 dB bandwidth is as wide as 22.5% from 118.5 to 148.5 GHz at the input power of 15.0 dBm. This result corresponds to the excellent bandwidth performance with a conversion gain comparable to the previously reported frequency tripler operating at D-band.

Finite element modeling of one-dimensional nonreciprocal acoustic metamaterial with anti-parallel diodes.

A class of passive nonreciprocal acoustic metamaterials is developed to control the flow and distribution of acoustic energy in acoustic cavities and systems. Such development departs radically from present methods that favor the transmission direction by using hardwired arrangements of the hardware and hence, it cannot be reversed. The proposed nonreciprocal acoustic metamaterial (NAMM) cell consists of a cylindrical acoustic cavity with piezoelectric flexible boundaries that provide control in one-dimension. These boundaries are connected to an array of anti-parallel diodes to introduce simultaneous nonlinear damping and stiffness effects that break the reciprocity of energy flow through the NAMM cell. A finite element model of the NAMM cell is developed to investigate the nonreciprocal characteristics of the cell by optimizing the parameters that influence the nonlinear damping and stiffness effects introduced by the diodes. Numerical examples are presented to demonstrate the effectiveness of the proposed NAMM in tuning the directivity, flow, and distribution of acoustic energy propagating though the metamaterial.

Reduced pole to pole voltage deviations through stopping MMC blockading loss of terminals below DC faults

Allergy of voltage supply converters to DC, faults are recognized as the essential obstacle in the direction of significant implementation of meshed DC networks. Because of low flood current capability of Insulated gate bipolar transistor (IGBT), the converters are blocked under excessive currents to prevent permanent damage to the modules converter blocking off all at once interrupts the power float and reasons a significant strength imbalance in together the AC and DC grid. This paper aims to develop dependability and safety of DC networks per the support of stopping harm of terminals below DC faults. The fault response of a modular-multilevel converter is studied analytically and via simulations. It recognized that the Modular-multilevel converter (MMC) goes through quite a few tiers beneath a DC fault, and every stage has distinct dynamics. The effect of the converter showing too occupied into reason.DC grid topology has a fundamental force on safety structure diagram and performance if a pair of converters linked to the same bus, fault contemporary is shared between the converters and fault modern-day slope of each person converter is reduced. Converter blocking off can, as a result, disallowed and protection device necessities container be relaxed. Temporary MMC blocking off studied like every other approach for keeping off the loss of terminals underneath DC faults. The gain of this strategy is low safety gadget value and decreased affect regular grid operation. A thermal valve model developed to investigate peak thermal stress on antiparallel diodes. Coordination between MMC self-protection and fault detection relays proposed, as nicely as the use of converter DC circuit breaker (DCCB) for backup protection.

A broken symmetry approach for the modeling and analysis of antiparallel diodes-based chaotic circuits: a case study

This paper focuses on the modeling and symmetry breaking analysis of the large class of chaotic electronic circuits utilizing an antiparallel diodes pair as nonlinear device necessary for chaotic oscillations. A new and relatively simple autonomous jerk circuit is used as a paradigm. Unlike current approaches assuming identical diodes (and thus a perfect symmetric circuit), we consider the more realistic situation where both antiparallel diodes present different electrical properties in spite of unavoidable scattering of parameters. Hence, the nonlinear component synthesized by the diodes pair exhibits an asymmetric current–voltage characteristic which engenders the explicit symmetry break of the whole electronic circuit. The mathematical model of the new circuit consists of a continuous time 3D autonomous system with exponential nonlinear terms. We investigate the chaos mechanism with respect to model parameters and initial conditions as well, both in the symmetric and asymmetric modes of operation by using bifurcation diagrams and phase space trajectories plots as main indicators. We report period doubling route to chaos, spontaneous symmetry breaking, merging crisis and the coexistence of two, four, or six mutually symmetric attractors in the symmetric regime of operation. More intriguing and complex nonlinear behaviors are revealed in the asymmetric system such as coexisting asymmetric bubbles of bifurcation (a new kind of phenomenon discovered in this work), hysteretic dynamics, critical phenomena, and coexisting multiple (i.e. two, three, four, or five) asymmetric attractors for some appropriately selected values of parameters. Laboratory experimental tests are conducted to support the theoretical analysis. The results obtained in this work clearly indicate that chaotic circuits with back to back diodes can demonstrate much more complex dynamics than what is reported in the relevant literature and thus should be reconsidered accordingly following the method described in this paper.

Design of DC‐side fault current limiter for MMC‐HVDC systems: Safety of the MMC along with frequency stability

A high voltage direct current system based on the modular multi-level converter (MMC-HVDC) is introduced as a suitable device for transmission of bulk powers over long distances. A pole-to-pole DC-side fault is a significant challenge for the MMC-HVDC system. Three main problems are the appearance of voltage spikes following a fast DC fault current break up, frequency instability due to insufficient inertia (networks such as renewable energy-based systems) and destruction of anti-parallel diodes within the MMC due to the high fault current. This study proposes a novel method for limiting DC fault current, improving isolation of the three-phase AC system from the DC-side. The suggested design employs high power resistors as virtual load such that continuity in active power flow will be kept on. Further, this prevents frequency deviation from exceeding the allowable limits. Also, transient over-voltages will be limited which are coming from stray inductances linked with electromagnetic effects of fault current level. Simulations and design practical issues have verified the validity of the proposal by using MATLAB/Simulink.

A Compact Broadband Monolithic Sub-Harmonic Mixer Using Multi-Line Coupler

A compact broadband monolithic sub-harmonic mixer is presented in a 70 nm GaAs Technology for millimeter wave wireless communication application. The proposed mixer adopts a novel multi-line coupler structure; where the two-sided coupling energy of radio frequency (RF) and local oscillation (LO) signals are both collected and efficiently feed to anti-parallel diode pair (APDP) topology; resulting in broadband performance and compact chip size. As a comparison in the same circuit configuration; the five-line coupler can expand the bandwidth of the existing three-line coupler by 85% and reduce the area by 39.5% when the central frequency is 127 GHz. The measured conversion gain is −16.2 dB to −19.7 dB in a wide operation frequency band of 110–170 GHz. The whole chip size is 0.47 × 0.66 mm2 including test pads. The proposed mixer exhibits good figure-of-merits for D-band down-converter applications