Anti-parallel Diode Research Articles

A Snapback-Free Reverse-Conducting LIGBT with Embedded Anti-parallel Schottky Barrier Diode

A Snapback-Free Reverse-Conducting LIGBT with Embedded Anti-parallel Schottky Barrier Diode

Lifetime (Bx) improvement of PV inverter using Si-SiC H-IGBT/Diode: a reliability approach

Technological advancements have made it possible to harness the power of renewable energy sources. The efficiency of power electronic devices has increased to almost 98%. In order to reduce the risks of failure and maintain the operation of photovoltaic (PV)-based energy converters, reliable devices are needed. Due to the increasing number of wide-bandgap silicon in electronic converters, the need for more efficient and reliable devices has become more prevalent. However, the cost of these devices is a major issue. Hence, in this work extensive analysis of hybrid silicon (Si)-IGBT and silicon carbide (SiC) antiparallel Diode (H-IGBT/Diode) based PV inverter is proposed to improve the lifetime (Bx). A reliability oriented lifetime assessment is performed on a test case of single stage three kilowatt photovoltaic inverter with 600 V/30 A hybrid switch. Long term mission profile for one year is considered for evaluation at B. V. Raju Institute of Technology (BVRIT), Telangana, India. Finally, B10 lifetime is calculated, comparison analysis is presented between conventional Si-IGBT and proposed Si-SiC H-IGBT/Diode. The results of the study revealed that the H-IGBT exhibited a significant increase in PV inverter reliability.

Voltage Error Estimation-Based Fault Diagnosis Method for Three- phase PWM-inverter in Grid-connected Photovoltaic Power System Without any Over-rating

Inverter is an essential component of a grid connected PV system. In fact, an open-switch fault in this power converter could result an important system malfunction and consequently leads to system disconnection. In this context, this paper focuses on the fault-tolerant control of PWM-inverter with redundancy leg for grid-connected PV system. In addition, a fast method of fault detection and compensation is used to maintain the continuous operation of the converter when there is a half-leg open-circuit fault (IGBT+ anti-parallel diode) on one of PWM-inverter legs. Therefore, it can detect this type of fault and compensate it in less than 50 μs by using a time criterion instead of voltage criterion. Also, the fuzzy logic technique is employed to control the active and reactive power injected into the network without exceeding the whole system power capacity limits. Note that, in this study, the active and reactive power references of the chosen operating point (the reactive-to-active power ratio: tgφ = Q/P = 0.19) are based on experimental tests. Simulation results show the feasibility and the effectiveness of the proposed fault diagnosis method in terms of fault detection and service continuity in presence of a half-leg open-circuit fault in PWM-inverter without any over-rating of the PV system components or instability.

Offline Fault Diagnosis for 2-Level Inverter: Short-Circuit and Open-Circuit Detection

Fault detection is very important to improve the reliability of power conversion devices. Faults of power semiconductors can be broadly divided into shorts and opens and are further classified into two types depending on whether there is an internal problem with the switch or anti-parallel diode. In this paper, fault-diagnosis methods for short-circuit and open-circuit states are proposed, respectively. A method of classifying and diagnosing faults by applying a gate signal to each switch is proposed to diagnose short-circuit conditions. This method uses only current magnitude information, which reduces the amount of required information and reduces diagnostic failures due to angle errors and current noise. A method is proposed to detect a faulty switch by applying a voltage vector and comparing the current angle with a lookup table to diagnose an open state. An iterative diagnostic algorithm is proposed to prevent diagnostic failure due to angle error and current noise. The effectiveness of the proposed diagnosis method is verified through experiments and simulations.

Mitigating reverse recovery power losses in MOSFET switching cell using extra Schottky diodes—Application to voltage source inverter

This article introduces a comparative study of the losses in Voltage Source Inverter (VSI) based on Metal-Oxide- Semiconductor Field-Effect Transistors (MOSFETs) depending on whether or not the latter are associated with antiparallel diodes. These diodes are optional because MOSFETs have an intrinsic diode capable of conducting reverse currents when their channel is in OFF state. However, it induces additional reverse recovery losses and damaging voltage overshoots. This undesired circumstance occurs during the mandatory switching cell dead-time and is accurately modelled and assessed in this study. Conversely, Schottky diodes feature almost zero reverse recovery losses. Hence, combining each MOSFET with an antiparallel Schottky diode may reduce the converter overall losses. To assess this strategy, an analytical model of the charge stored within the body diode is developed and then compared to experiments using the Double Pulse Test (DPT). It reveals accurate and well suited because it requires only two constant macro parameters which permits to forecast the reverse recovery losses over a wide range of operating conditions, namely switched current, current slope and dead time duration. The selected model is applied in the case where a Schottky diode is placed antiparallel to the MOSFET. It then appears clearly that the interest of such a combination depends on the static characteristics of both the MOSFET and the Schottky diode. This output is a noteworthy point for power electronics designers. Finally, the developed model is applied in the standard use case of the Voltage Source Inverter (VSI). The results reveal the advantage of the suggested model in this use case because the current evolves significantly over time. The outcome of this VSI analysis shows that a significant recovery losses decrease is achieved with good sizing fit between the MOSFET transistor and the additional Schottky diode.

Effects of Adding the Antiparallel Diodes in a Model of Solar Photovoltaic Cell: Theory and Pspice Simulations

Background: The photovoltaic (PV) array consisting of modules is considered as the fundamental electrical power conversion unit of the PV generator system. The PV array has nonlinear characteristics with the current-voltage (I-V) characteristic in the exponential form introduced by diodes. In this context, the key objective of the research carried out in the present study is to propose a novel PV cell, with anti-parallel diodes introduced in the circuit model in place of the single diode. Objective: The objective of this research is to compare the effects, magnitudes of current and power generated by the PV cell, with antiparallel diodes to those with single diodes. Methods: The model circuit containing two antiparallel diodes is first designed, and then analyzed through the circuit Equationuations found using the Kirchhoff’s laws. The I-V characteristics are modified in the hyperbolic sine form, and the model Equationuation is solved analytically and numerically using the MATLAB software. The analytical and numerical investigations are then confirmed by Pspice simulation, which is made possible with the introduction of additional bloc necessary to make the output signal voltage tunable in the opened circuit. Results: The I-V characteristic is plotted showing that when the voltage is lower than a particular, the model containing the antiparallel diode has the increasing of current, while that with single diode has constant current. Additionally the current generated by the PV cell oscillates increasingly when the supplied signal voltage is negative. We also found that the maximum power increases with the temperature. The expression of the cutoff signal voltage leading to zero current was also found and plotted, the increasing function of the number Ns of series diodes. As application, the PV circuit designed is used in the charging of the battery of electrical vehicle. Conclusion: The PV cell with antiparallel diodes generates currents for large band of signal voltage, and the power generated increases with temperature.

Tristate Converters with Limited Duty Cycle

Replacing the active switch of a DC/DC converter with a series connection of two active switches and a diode which is connected to the connection point of the two switches, changes the converter into a tristate one. The tristate concept changes the voltage transformation ratio of the original converter and influences the dynamics. Starting from a topology for limited duty cycles, four converters can be derived. There are two possibilities for the position of the second capacitor and so eight converter structures can be achieved. The position of the second capacitor influences the input current, the inrush, the stored energy, and the voltage stress of this component. When the input voltage has the other polarity, again eight converters can be designed. Changing all active electronic switches by current bidirectional ones (an electronic switch with an antiparallel diode) leads to bidirectional converters and increases the number of converters that are derived from the basic topology to thirty-two. The function of the four basic structures is explained, and the voltage transformation ratio calculated and graphically shown. The connections of the currents are explained. For one converter the large and the small signal models and two transfer functions are calculated, and simulation of the dynamics are shown.

Coordinated Online Junction Temperature Estimation of MOSFETs and Antiparallel Diodes in Three-Phase SiC Inverters

Coordinated Online Junction Temperature Estimation of MOSFETs and Antiparallel Diodes in Three-Phase SiC Inverters

A general configuration for nonlinear circuit employing current-controlled nonlinearity: Application in Chua’s circuit

In this paper, a general configuration for nonlinear circuit employing current-controlled nonlinearity is proposed, which has a simple topology and only contains three linear energy storage components, one nonlinear element, and one multi-port network that can be made by linear resistor. Under this configuration, we design two new five-element chaotic circuits including the first third-order one employing a current-controlled anti-parallel connection diode pair and the second fourth-order one employing a current-controlled memristor emulator. The analyses show that the third-order chaotic circuit is dual to the canonical Chua’s circuit, and the extended fourth-order one can be regarded as a dual canonical memristive Chua’s circuit. The basic analyses including the model description, equilibrium point and stability are presented. Several rich dynamical properties of the two chaotic circuits are investigated using numerical simulations and certified by both Pspice circuit simulations and analog circuit measurements.

Analysis and Design of Novel 180° Hybrid for U-Band Monolithic Subharmonic Mixer in 0.15-μm GaAs pHEMT Technology

In this brief, a novel reduced-size 1800 hybrid is presented to implement a U-band subharmonic mixer (SHM) via a 0.15-μm GaAs pHEMT process. The isolations between Σ-port and -port of the proposed 1800 hybrid are significantly enhanced by two structures: one is a compact multiconductor edge-coupled line balun with artificial transmission line and the other is an in-phase power divider composed of λLO/4 coupled line. As a proof-of-principle demonstration, a single balanced SHM with an antiparallel diode pair configuration is designed and fabricated, which exhibits a conversion gain of -12.25 dB 1 1.55 dB within the operating RF frequency of 40 to 60 GHz under 14 dBm LO pumping power. The improved isolations of LO-to-RF and 2LO-to-RF are 33 to 47 dB and 44 to 57 dB, respectively. The measured results surpass previously reported performance of SHMs.

Design of Low-Cost Full W-Band 8th Harmonic Mixers for Frequency Extension of Spectrum Analyzer

High-order harmonic mixer is popular for frequency extension of spectrum analyzer (SA) from microwave to millimeter-wave or even terahertz band. The manufactures of SA usually offer expensive harmonic mixers where frequency extension is needed. In this work, low-cost designs of 2-port and 3-port W-band 8th harmonic mixers covering 75–110 GHz are proposed, and design method of two port mixer without frequency diplexer to separate local oscillator (LO) and intermediate frequency (IF) signals are first presented. These two kinds of mixers are compatible with almost all the current SAs with frequency extension options, which provides LO for the external harmonic mixer. The mixers are designed with planar microstrip lines and antiparallel Schottky diodes. The circuit of 2-port mixer includes the input broadband bandpass filter, diodes, output lowpass filter, and matching circuits. As for 3-port mixer, only an extra diplexer is needed to separate the IF signal and LO signal. The diplexer is composed of a planar semi-lumped lowpass and a highpass filter. The planar circuits are easily fabricated with low-cost print circuit board process on polytetrafluoroethylene substrate. The measured conversion loss of 2-port 8th harmonic mixer is from 20 to 26 dB, and 23 to 28 dB for 3-port mixer at full W-band. The good measured results indicate the proposed mixers are simple and effective.

Improving the Electrostatic Capacity and Efficiency of UVC LEDs by Embedded Anti-Parallel Diode

Improving the Electrostatic Capacity and Efficiency of UVC LEDs by Embedded Anti-Parallel Diode

170 GHz quasi-optical sub-harmonic mixer with a back-to-back lenses packaging based on HDI.

The paper presents a 170 GHz quasi-optical sub-harmonic mixer with a 3D-printed back-to-back lenses packaging. The quasi-optical mixer is comprised by a pair of antiparallel GaAs Schottky diodes, a patch antenna for receiving local oscillator (LO) pump signal, a symmetric-slit patch antenna for receiving radio frequency (RF) signal, dual 3D-printed lenses and a matching network. The quasi-optical mixer with a pair of antiparallel GaAs Schottky diodes is designed on a multilayer build-up printed circuit board (PCB) utilizing commercially low-cost and high-density interconnect (HDI) technology. The LO and RF antennas are placed on the front and back of the multilayer build-up substrate, respectively, thus significantly simplifying the quasi-optical design. Furthermore, dual 3D-printed lenses placed back-to-back are proposed for LO and RF antennas radiation gain enhancement and mechanical robustness. Additionally, the buried planar reflectors in the substrate maintain effective radiation isolation between the antennas. For facilitating coupling efficiency of signal power into the Schottky diodes and signal isolation between the LO pump signal and RF signal, a compact matching network with low-loss quasi-coaxial via transition structure is integrated in the mixer circuit. The measured single-sideband conversion loss is from 11.3 to 15.4 dB in an operation range of 160 to 180 GHz. The measured radiation patterns agree well with the simulated results.

A 100–180-GHz Coaxial Frequency Tripler Based on Copper Additive Manufacturing

This article presents a wideband coaxial D-band frequency tripler fabricated by copper additive manufacturing (AM). The central part of the tripler consists of two waveguide–coaxial transitions, a coaxial low-pass filter, an antiparallel Schottky diode chip, and an output impedance matching network. Most constitutions, except for the diode chip, are monolithically fabricated in one piece. The diode chip with additional thermal paths is specially designed to obtain a good thermal performance and better power handling. To facilitate the measurement, a waveguide fixture is also designed to convert the ports to standard waveguide ports (WR-19 and WR-6.5). The measurements show that the maximum output power of the tripler is 9.44 mW with about 182 mW of input power at 147 GHz and its 3-dB bandwidth is 45.2% from 108 to 171 GHz. Additionally, the tripler delivers <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$&gt;$</tex-math> </inline-formula> 1.87 mW of output power and better than 10 dB of return loss over the 100–180-GHz range. To the best of authors’ knowledge, this is the first AM coaxial ultra-wideband frequency multiplier reported in the open literature.

Electrical Characterization of the Clamping Behavior on CMOS Quasi-Floating-Gate Circuits

In this paper, the clamping effect introduced by several diode-based configurations used for the implementation of the high-value resistors in quasi-floating-gate circuits is analyzed and characterized. In contrast to previous approaches where a parasitic diode is treated as a simple high-value resistor reducing the circuit complexity, in this case the analysis considers the diode behavior which leads to a clamping circuit. This clamping circuit introduces an unwanted amplitude-dependent offset voltage, which affects the performance moving the quiescent point at the quasi-floating-gate transistors. A new anti-parallel diode configuration for quasi-floating-gate applications is proposed in this work, which eliminates this unwanted offset voltage. The proposed design is validated using simulations and experimental data in a CMOS 0.35-[Formula: see text]m technology.

Cascaded H-bridge Type Power Electronic Transformer Electromagnetic Interference Study Based on Parallel Simulation

Power electronic converter (Power Electronic Transformer, PET) is widely used in power systems, so the research on PET electromagnetic disturbance (Electro Magnetic Interference, EMI) cannot be ignored. PET consists of many insulated gate bipolar transistors (Insulate-Gate Bipolar Transistor, IGBT). A large number of converter levels will cause problems such as small simulation steps and long simulation times. To solve the above problems, firstly, the IGBT and its anti-parallel diodes are modeled by an 8-node model to reduce the complexity of the system; secondly, after dividing the model into fine-grained models, CUDAC coding is used to realize the parallel operation of the system on the graphics processing unit (Graphics Processing Units, GPU). Finally, the feasibility of the proposed method is compared with the PSCAD simulation results.

A Power Factor Profile-Improved EV Charging System Using Bridgeless Buckboost-Cuk Converter

This article presents a power factor profile-improved bridgeless buckboost-Cuk converter-fed battery charging system for electric vehicle applications. The conventional charging system does not use any power factor improvement stage, due to which the supply current harmonics are very high and violate IEC-61000-3-2 standard guidelines. To meet the international standard guidelines, a compact and efficient power factor-improved converter stage is necessary. The power factor-improved converter in the present work uses a fourth-order Cuk converter during negative semi-cycle and a second-order buckboost converter during positive semi-cycles of the supply voltage. The amalgamation of a second- and fourth-order converter in a bridgeless configuration reduces the system’s order concerning a bridgeless Cuk converter-based system and also eradicates the need for a diode-based bridge rectifier (DbBR). Due to the presence of an input side inductor, there is no requirement for an external filter like a bridgeless buckboost converter-based scheme. The input inductor in the present scheme performs twin action; it reduces harmonic disturbances in the mains current during the negative semi-cycle and also works with capacitor CP to filter harmonics and improve the mains current profile during the positive semi-cycle of the mains voltage. The power factor-improved converter in the present work is operated in discontinuous conduction mode (DCM). This eliminates the requirement for extra sensors compared to continuous conduction mode (CCM). The scheme also eliminates the need for two extra back-feed diodes which are generally required in bridgeless configuration loop completion during different semi-cycles of mains voltage. In the present scheme, the work of back-feed diodes is done by the anti-parallel inherent diodes of the switches. In the second stage, a high-frequency-operated flyback converter is used which not only boosts the battery current profile but also provides the electrical isolation between the supply side and load. This article also presents the detailed stability analysis and math modeling of the presented bridgeless buckboost-Cuk converter. The presented system is built on MATLAB/Simulink, and results are presented and discussed to validate the system performance.

Thyristor-Based DCCB With Reliable Fast Reclosing Protection Ability by Restoring Capacitor Polarity

Lots of dc circuit breakers have been proposed for protecting medium voltage dc (MVDC) systems. However, they normally have one or more following limitations: low operational reliability, lack of controllability, lack of reclosing protection ability, power supply required, and high construction cost. To overcome these problems, a novel thyristor-based dc circuit breaker (TCB) is proposed in this paper. The proposed TCB could break the bi-directional current actively and reliably. In the reclosing process, the polarity of capacitor in the counter current loop could restore automatically to the initial state, and the auxiliary thyristor could be turned <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> naturally. As a result, the proposed TCB guarantees reliable fast reclosing protection ability on the premise of no additional pre-charge power supply. Moreover, all thyristors of the proposed TCB could be turned <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> by voltage drop of the anti-parallel diodes, and the overvoltage problem caused by reverse recovery process of thyristors is eliminated, which further enhances the reliability of TCB. The detailed topology introduction, parameters designing guidelines, scaled-down experimental results, and comparative study of the proposed TCB are all presented.

A Review of Power Electronic Devices for Heavy Goods Vehicles Electrification: Performance and Reliability

This review explores the performance and reliability of power semiconductor devices required to enable the electrification of heavy goods vehicles (HGVs). HGV electrification can be implemented using (i) batteries charged with ultra-rapid DC charging (350 kW and above); (ii) road electrification with overhead catenaries supplying power through a pantograph to the HGV powertrain; (iii) hydrogen supplying power to the powertrain through a fuel cell; (iv) any combination of the first three technologies. At the heart of the HGV powertrain is the power converter implemented through power semiconductor devices. Given that the HGV powertrain is rated typically between 500 kW and 1 MW, power devices with voltage ratings between 650 V and 1200 V are required for the off-board/on-board charger’s rectifier and DC-DC converter as well as the powertrain DC-AC traction inverter. The power devices available for HGV electrification at 650 V and 1.2 kV levels are SiC planar MOSFETs, SiC Trench MOSFETs, silicon super-junction MOSFETs, SiC Cascode JFETs, GaN HEMTs, GaN Cascode HEMTs and silicon IGBTs. The MOSFETs can be implemented with anti-parallel SiC Schottky diodes or can rely on their body diodes for third quadrant operation. This review examines the various power semiconductor technologies in terms of losses, electrothermal ruggedness under short circuits, avalanche ruggedness, body diode and conduction performance.

Integration of Non-Filamentary Pr0.7Ca0.3MnO3– Based Memristor With Silicon-PN Junction

Crossbar memristor arrays are gaining interest in the semiconductor industry for high-density storage and in-memory computing applications. For efficient array operations, highly non-linear selector (1S) or transistor (1T) devices are connected in series with memristor devices to rectify sneak path leakage currents. For selector-memristor integration, process and device compatibility is a must. In this work, we have experimentally demonstrated the integration of Pr <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.7</sub> Ca <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.3</sub> MnO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> (PCMO) based resistive random access memory (RRAM) and Silicon (Si) junction devices. We propose and evaluate various integration schemes for Si-PN junction Diode (1D) and PCMO-RRAM (1R) to identify a successful approach where both devices retain their characteristics after integration. Moreover, the electrical measurements for the integrated 1D1R structure show the SET switching of PCMO-RRAM. Lastly, we show bipolar RRAM switching analogous to 1S1R configuration using an anti-parallel diode connection. The integration approach can be used to design a scaled-1S1R or 1T1R cell for large-scale crossbar memristor arrays with PCMO-RRAM.