Integration of Non-Filamentary Pr0.7Ca0.3MnO3– Based Memristor With Silicon-PN Junction

Abstract

Crossbar memristor arrays are gaining interest in the semiconductor industry for high-density storage and in-memory computing applications. For efficient array operations, highly non-linear selector (1S) or transistor (1T) devices are connected in series with memristor devices to rectify sneak path leakage currents. For selector-memristor integration, process and device compatibility is a must. In this work, we have experimentally demonstrated the integration of Pr <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.7</sub> Ca <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.3</sub> MnO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> (PCMO) based resistive random access memory (RRAM) and Silicon (Si) junction devices. We propose and evaluate various integration schemes for Si-PN junction Diode (1D) and PCMO-RRAM (1R) to identify a successful approach where both devices retain their characteristics after integration. Moreover, the electrical measurements for the integrated 1D1R structure show the SET switching of PCMO-RRAM. Lastly, we show bipolar RRAM switching analogous to 1S1R configuration using an anti-parallel diode connection. The integration approach can be used to design a scaled-1S1R or 1T1R cell for large-scale crossbar memristor arrays with PCMO-RRAM.