Anisotropic Etching Research Articles

INVESTIGATION OF THE INFLUENCE OF SILICON NANOWIRE SYNTHESIS PARAMETERS ON THE CHARACTERISTICS OF PHOTOSENSITIVE SENSORS

Problem. Photosensitive sensors are widely used both in everyday life in climate systems and in communication devices and street lighting. In order to improve the performance parameters of photosensitive sensors, the use of silicon nanowires (SiNWs) has been proposed. A large number of articles are dedicated to the influence of synthesis parameters on the dimensions of SiNWs. However, there is a lack of research on the impact of the surface morphology of SiNW arrays on the electrical and photosensitive parameters of sensors based on them.The purpose of the work The aim of this work is to synthesize silicon nanowires using the metal-assisted chemical etching method, investigate their surface morphology, and fabricate photodiodes based on them to examine the influence of SiNW synthesis parameters on the characteristics of photosensitive sensors, considering the peculiarities of their structure.Research results. Photosensitive sensors of diode type based on SiNWs were synthesized and investigated. The influence of the following synthesis parameters of SiNWs on their lateral and vertical morphology as well as on characteristics of diode sensors based on them was demonstrated: the duration of the first and second stages of metal-assisted chemical etching (MACE), the content of silver nitride and hydrogen peroxide in the solutions of the first and second stages of MACE, as well as surface texturing and processing in isotropic and anisotropic etchants. The maximum operational parameters of the obtained photosensitivity sensors based on the SiNW array were as follows: rectification coefficient of 1320 and photosensitivity coefficient of 3.1 mA/lmV.Conclusions. The obtained results indicate that the technological parameters of the first and second stages of MACE, as well as pre- and post- chemical treatments, have a significant influence on increasing of the surface roughness, height, and porosity of SiNWs, which in turn affect the electric and photosensitive parameters of the sensors. Optimal SiNWs synthesis parameters for achieving of maximum photosensitivity have been established.

Atomic Layer Etching of Al2O3 Using F Radical and Al Precursors: Surface Reaction and Reaction Mechanism Study

In order to overcome the miniaturization of semiconductor devices, devices with a three-dimensional (3D) structure, such as FinFET and 3D vertical NAND devices, were introduced. The manufacturing of 3D devices requires both anisotropic etching in the vertical direction and isotropic etching in the horizontal direction. Therefore, a new technology with atomic-level precision is required for isotropic etching, which is dependent on wet etching. It is the thermal atomic layer etching (ALE) process that meets these requirements. Since the first report in 2016, the thermal ALE processes by alternating exposures to HF vapor and a metal precursor have been reported for various thin films. However, HF has issues with safety and corrosion. Recently, ALE processes using F radicals produced by inductively coupled plasma (ICP) of SF6 or NF3 have been reported [1,2]. However, the study on the reaction mechanism of F radicals is lacking. In this study, the surface reaction was studied for the modification and removal steps by NF3 remote plasma and Al precursors. We used quartz crystal microbalance (QCM) to measure the mass change during the ALE process and X-ray photoelectron spectroscopy (XPS) to analyze the composition of the modified layer. The mechanism of ALE using F radical was different from that using HF, due to the absence of H atoms. Density functional theory (DFT) simulation shows that amorphous carbon or fluorocarbon layer can be formed during the ALE by F radicals. Al precursor with fewer organic ligands was beneficial to suppress the formation of a carbon-containing surface layer. Acknowledgments This research was supported by the MOTIE (Ministry of Trade, Industry & Energy (project number 20012588) and KSRC (Korea Semiconductor Research Consortium) support program for the development of the future semiconductor device.

A Cyclic Etching Process Using HFE-347mcc3 as a Lower-GWP Alternative to Perfluorocarbons for High-Aspect-Ratio SiO2 Features

As circuits continue to integrate at higher levels, the critical dimensions of DRAM and 3D-NAND are decreasing, leading to an increase in aspect ratios of various features such as contact holes and via holes in DRAM, and channel holes of stack layers in 3D-NAND. This trend has made the process of etching high-aspect-ratio SiO2 features more challenging. To achieve this, it is necessary to satisfy specific conditions including high selectivity to the mask or the underlayer film and the anisotropic etch profiles.Perfluorocarbons (PFCs) such as CF4 and c-C4F8 are commonly used for SiO2 etching. PFCs form a thicker steady-state fluorocarbon film on Si than SiO2, leading to high SiO2/Si selectivity. In addition, PFCs enable anisotropic etching since a passivation layer is formed on the sidewall, preventing lateral etching of the sidewall by chemical etchants.However, PFCs are a representative greenhouse gas with a high global warming potential (GWP) compared to CO2, causing significant adverse effects on global warming. Therefore, there have been efforts to reduce greenhouse gas emissions, such as setting goals for greenhouse gas reduction by each country through the Paris Agreement in 2015. Semiconductor manufacturers have also committed to reducing greenhouse gas emissions per silicon substrate area by 30% compared to 2010. In this regard, various studies are being conducted to develop a SiO2 etching process using alternative materials with lower GWP than PFCs. Fluorinated ethers and fluorinated alcohols are potential substitutes due to their low GWPs and short lifetimes. For example, heptafluoropropyl methyl ether (HFE-347mcc3) has a GWP of ~530 and an atmospheric lifetime of 5.2 years, significantly lower than those of PFCs.During etching of SiO2, the mask is susceptible to damage and corrosion by ions, resulting in various pattern deformations such as bowing, necking, and striation. These deformations adversely affect the miniaturization of the DRAM structure by reducing the process margin between holes and have a negative influence on the electrical characteristics of the device, such as contact resistance, line edge roughness, and line width roughness.To prevent these pattern deformations, the cyclic etching process that repeats the passivation layer deposition step and SiO2 pattern etching step was devised. A fluorocarbon film is deposited on the mask to protect it, then SiO2 is etched. The fluorocarbon film is deposited again to reinforce the mask and damaged fluorocarbon film during the etching process, and then SiO2 etching step is repeated to achieve the high-aspect-ratio SiO2 features.In this study, the cyclic etching process was conducted using HFE-347mcc3 as a lower-GWP alternative to PFCs to etch SiO2 contact holes. The effect of the duration of each step on the etch profile was investigated by adjusting the duration of the deposition and etching steps. This work demonstrated the feasibility of using HFE-347mcc3 as a lower-GWP alternative to PFCs for cyclic etching of SiO2 contact holes to obtain anisotropic etch profiles.

(Invited) The Use of Plasmas for Isotropic Atomic Layer Etching

Atomic layer etching (ALE) is set to be a vital part of the advanced semiconductor manufacturing toolbox, known for its precise control of the film thickness and minimal damage. These benefits are possible due to the sequential self-limiting half-cycles that are employed within an ALE process. Initially, ALE was underestimated due to low etch rates, but it is now experiencing a renaissance due to the requirements imposed by further downscaling.1 The ALE community is mostly divided into two groups: plasma anisotropic and thermal isotropic etching. 2 In this work, the focus is on exploring isotropic plasma ALE, which is a relatively unexplored direction. This approach involves using plasma radicals to modify and/or etch material isotropically, while minimizing the directional ion component of the plasma. Isotropic plasma ALE can offer several benefits over strictly thermal ALE, such as higher etch rates, lower operating temperatures, and the ability to etch more resistant materials.In this talk we will first address some of the different techniques employed for plasma isotropic ALE in the literature. Subsequently, we will discuss our own work, which has focused on two isotropic plasma ALE chemistries. The first involves alternating between plasma fluorination and ligand-exchange half-cycles, this ALE chemistry has been found to be effective for etching Al2O3, HfO2, AlN, and GaN films.3,4 Surface contaminants and roughness were found to be reduced post ALE, an aspect that is particularly important for AlN and GaN films that are used in quantum, power semiconductor and LED applications. The second approach involves using diketone (e.g. acetylacetone, hexafluoroacetylacetone) doses followed by either H2 or O2 plasma exposures for ALE of Al2O3 and ZnO.5 The diketone in this process acts to etch the surface, however due to competitive adsorption of different diketone orientations an etch inhibition layer forms. The plasma step is then utilized to clean the surface, removing the self-limiting inhibitor layer, enabling etching to continue in the next cycle. This ALE chemistry diverges from the typical modification/removal ALE cycle, where a modified layer if often observed on the material post ALE. In comparison the diketone ALE chemistry does not rely on modification of the surface making it an ideal process for surface cleaning. This approach provides improved selectivity over the plasma fluorination process and also enables smoothing.Plasma isotropic ALE is a growing part of the ALE community that can help accelerate the adoption of ALE in academia and industry. The potential benefits of ALE are only just beginning to be explored, and more processes are needed to etch the ever-increasing range of materials utilized in IC manufacturing. Kanarik, K. J., Tan, S. & Gottscho, R. A. Atomic Layer Etching: Rethinking the Art of Etch. J Phys Chem Lett 9, 4814–4821 (2018).George, S. M. Mechanisms of Thermal Atomic Layer Etching. Acc Chem Res 53, 1151–1160 (2020).Chittock, N. J. et al. Isotropic plasma atomic layer etching of Al2O3 using a fluorine containing plasma and Al(CH3)3. Appl Phys Lett 117, 162107 (2020).Wang, H., Hossain, A., Catherall, D. & Minnich, A. J. Isotropic plasma-thermal atomic layer etching of aluminum nitride using SF6 plasma and Al(CH3)3. 1–14 (2022) doi:arXiv.2209.00150.Mameli, A., Verheijen, M. A., Mackus, A. J. M., Kessels, W. M. M. & Roozeboom, F. Isotropic Atomic Layer Etching of ZnO Using Acetylacetone and O2 Plasma. ACS Appl Mater Interfaces 10, 38588–38595 (2018).

Inverted pyramid structures fabricated on monocrystalline silicon surface with a NaOH solution

Low-cost aqueous alkaline etching has been widely adopted for monocrystalline silicon surface texturing in current industrial silicon solar cells. However, conventional alkaline etching can only prepare upright pyramid structures on mono-crystalline silicon surfaces. This study demonstrates for the first time the use of ethylene glycol butyl ether (EGBE) to regulate aqueous anisotropic alkaline etching and prepare inverted pyramid structures on monocrystalline silicon surfaces. Acidic metal-catalyzed etching solutions are not the best choice for monocrystalline silicon due to their inherent disadvantages, such as noble metal pollution and relatively high costs. The one-step method to produce the inverted pyramid structures by using alkaline etch with EGBE additive is simple and inexpensive, does not generate noble metal pollution, and especially compatible with current industrial silicon solar cell production lines. With the use of a sodium hydroxide (NaOH) solution containing a low-cost additive, inverted pyramid structures can be prepared on mono-crystalline silicon surface in a short time. This method is suitable for various types of silicon wafers and has great potential for industrial solar cell applications.

Shape tuning of large area silicon nanotip arrays through reactive ion etching

Nanostructures formed in silicon form an important class of structures that span a broad spectrum of application areas. Of these, columnar structures of silicon featuring tiplike apexes have their own niche applications. The ability to afford shape tunability for these structures further enhances their application potential. In this paper, we present our findings on the large area fabrication of silicon nanotips defined through microsphere lithography and shape tuned through a combination of different reactive ion etching (RIE) techniques. The self-sharpening mechanism of the tips when using nonplanar etch masks (microspheres) under anisotropic etching conditions is elucidated. We further show that depending on the manner of etching (continuous versus discrete multistep etch), identical anisotropic etching recipes produce vastly different tip morphologies. Hourglass-shaped silicon tips were obtained when silicon was subjected to anisotropic followed by isotropic etching conditions. Sharp silicon tips with tip apex radii on the order of 2 nm have been successfully realized when the RIE shape tuned tips were subjected to a series of oxidative sharpening steps.

Modern Scanning Electron Microscopy. 2. Test objects for Scanning Electron Microscopy

The review of the test objects intended for calibration of scanning electron microscopes and researches to secondary electronic emission of a relief surface of a solid state in scanning electron microscope is carried out. The test objects are divided on two parameters – kind of a relief and structure of a relief. By the form of relief the test objects are divided on single, pitch and periodic. On a structure of a relief of the test objects are divided into objects with a rectangular structure and objects with a trapezoid structure with the large and small corners of an inclination of lateral walls. The examples of such the test objects are given. Their characteristics and methods of certification of parameters are described. The advantages and lacks of the test objects are considered. Is shown, that the best characteristics have the tests objects representing pitch structures consisting of trapezoid trenches with the large corners of an inclination of lateral walls. The test objects are created in monosilicon with of a surface orientation by {100} by method liquid anisotropic etching of silicon. These test objects allow defining all characteristics scanning electron microscopes, influencing on measurement of the linear sizes of relief structures used in microelectronics and nanotechnology. With their help it is possible to carry out correlation measurements, which raise accuracy of calibration scanning electron microscopes up to ten times.

Improved uniformity and anisotropy of through-mask electrochemical micromachining by localized etching and homogeneous flow

This contribution aims to point out the potential of through-mask electrochemical micromachining (TMEMM) as an environmentally friendly alternative for thin metal layer patterning for applications such as printed circuit boards (PCBs). Two process chamber concepts with shearing and impinging electrolyte flow, based on the concept of localized etching, are introduced. The etching results, obtained with simple mask designs, were investigated regarding homogeneity in etch depth and anisotropy. Compared to a simple setup with unspecific electrolyte flow and full area etching, a significant improvement in microscopic and macroscopic homogeneity (deviations reduced from >100 to <10%) and anisotropy (etch factors increased from ~4 to >7) could be shown. A comparison to an industrial chemical etching process using a simple mask design revealed equal macroscopic homogeneity and higher etch factors in TMEMM. Only the microscopic homogeneity leaves still room for improvement. It is presented for the first time that island formation can be prevented completely over a large area (5 × 20 mm2) with TMEMM. These results demonstrate the advantages and the potential that can be achieved with TMEMM by designing appropriate tools.

An approach to reduce surface charging with cryogenic plasma etching using hydrogen-fluoride contained gases

The surface conductivity influences the etched pattern profiles in the plasma process. In the dielectric film etching, it is vital to reduce the charging build-up, which bends the trajectory of incoming ions for highly anisotropic etching. A significant increase in surface electric conductivity of SiO2 films was observed when exposed to down-flow plasmas containing hydrogen fluoride (HF) at cryogenic temperature (−60 °C). This phenomenon can be attributed to two factors: (i) the absorption of HF and/or its compounds and (ii) the presence of H2O, which is likely originating from the etching by-product of SiO2 and/or within the reactor. Comparing the surface electric resistance of the samples treated with HF plasmas to that of CF4/H2 and C4F8/H2 plasmas, we found that HF plasma treatment enables to be approximately three and six orders of magnitude lower. By using in situ x-ray photoemission spectroscopy, it was revealed that the presence of HF and/or its compounds and H2O were absorbed on the sample surface at −60 °C. These results strongly suggest that the cryogenic plasma etching with HF-contained gases can be used to alleviate the charge build-up issues.

Problems of Wafer Level Packaging of Sensitive Elements for MEMS

The key problems of technological processes used in the manufacture of sensitive elements (SE) of micromechanical accelerometers (MMA) of pendulum and compensation types with assembly and sealing at the level of plates are considered. A technology for the formation of dielectric stoppers has been proposed, which made it possible to increase the yield of suitable ones by eliminating the effect of "sticking" without affecting the output characteristics of MMA. It was found that such SE can withstand multiple impact overloads up to 700 g. The characteristics of the pendulum SE are given for the range of measured accelerations ±1 g and for the acceleration range ±10 g. It is shown that the silicon-over-cavity (SOC) technology used for the manufacture of compensating-type SE accelerometers is much more complicated than the pendulum-type SE technology, but has a better yield with high repeatability of characteristics. The main stages of SOC technology are shown: the stage of highly anisotropic vacuum-plasma etching of a thin silicon wafer; stage of anode bonding with a sealing glass cover; the stage of manufacturing hermetic contacts. Modes have been determined that make it possible to carry out highly anisotropic vacuum-plasma etching of the SE with etching walls that have a deviation from the vertical of only ±0.15 µm at a depth of 60 µm in grooves 4 µm wide, both for the pendulum and for the fixed part of the accelerometer. The SOC technology makes it possible to manufacture sensitive elements not only for MMA, but also for micromechanical gyroscopes. It is shown that SE accelerometers of compensation type can serve as micro-sized vacuum sensors when testing the efficiency of the getter coating in small-sized vacuum volumes.

Array structure of monocrystalline silicon surface processed by femtosecond laser machining assisted with anisotropic chemical etching

Monocrystalline silicon (m-Si) with array structure has excellent optical and surface properties in the application of solar cells and optoelectronics. However, due to its hard and brittle properties, the efficient and high-quality micro-processing of complex array structured m-Si surface is difficult. In this work, micron array structure, such as inverted pyramid (IP) array structure, V-shaped groove array structure, and positive pyramid array structure, was generated on the m-Si surface by an efficient femtosecond laser machining assisted with anisotropic chemical etching. The morphology changes of microholes during the etching process, as well as the surface and optical properties of array structured m-Si, have also been studied. Experimental results showed that V-shaped groove array structure m-Si achieved superhydrophilic performance. The m-Si of IP array structure and V-shaped groove array structure exhibit high absorptivity (>95 %) and low light reflectivity (<5%) within a wide spectral range from 400 to 950 nm. This study reveals that femtosecond laser machining assisted with anisotropic chemical etching is a facile and feasible avenue to produce array structured m-Si with excellent optical performance.

Wet‐Etching‐Boosted Charge Storage in 1D Nitride‐Based Systems for Imitating Biological Synaptic Behaviors

AbstractNitride materials for memristors are benefited from their high response speed and high power density. The memristive effects on 1D nitride structures has not yet been elucidated. Hence, the activation of the memristive capability of nanowire (NW)‐based nitride memristors using an uncomplicated fabrication as single‐step anisotropic wet etching is proposed. Among nitrides, gallium nitride, a third‐generation semiconductor, exhibits properties potentially suitable for neuromorphic applications. The wet etchant considerably alters the chemisorbed molecules and dangling bonds associated with the surface states of the nanowires. A device based on such NWs which exhibits low power consumption with no required compliance current and forming voltage for operation is demonstrated. It can integrate all memristive capabilities, including multiple state switching, nonvolatile bipolar memory, and Ca2+ dynamics‐imitating synaptic actions. The examination of the memristive process also highlights the significance of altering surfaces in the devices, in addition to the shared principles that underlie biological and artificial synapses. The operating mode of the nitride‐nanowire devices can be controlled by controlling the formation/dissolution of the oxygen‐conductive path along the nanowires. Thus, the study realizes nanowire memristors based on a nitride material framework, that is promising for application in the 1D–1D system downsizing required for the bio‐inspired artificial synapse.

Surface reaction during thermal atomic layer etching of aluminum oxide films using fluorine radicals and trimethylaluminum

We investigated the surface reaction of the thermal atomic layer etching (ALE) of Al2O3 film using fluorine (F) radicals and trimethylaluminum (TMA). As a strong fluorination source to replace HF, we used NF3 remote plasma to generate F radicals without spontaneous or anisotropic etching by ion bombardment. The mass was increased by F radicals and decreased by TMA. X-ray photoelectron spectroscopy (XPS) analysis showed that AlF3 and AlOxFy were formed by F radicals, and all AlF3 and a significant portion of AlOxFy were removed by TMA. At 250 °C, the etch per cycle (EPC) was fully saturated at 1.58 Å/cycle for the NF3 remote plasma of 4 s and the TMA pulse time of 3 s. Based on the saturation behavior, isotropic etching was demonstrated for the Al2O3 film prepared on a trench pattern. The EPC increased progressively with temperature from 0.1 Å/cycle at 198 °C to 4.2 Å/cycle at 320 °C. Since the thickness of the fluorinated layer did not increase significantly with increasing temperature, the removal step determined the EPC.

Orientation-dependent etching of silicon by fluorine molecules: A quantum chemistry computational study

Anisotropic etching is a widely used process in semiconductor manufacturing, in particular, for micro- and nanoscale texturing of silicon surfaces for black silicon production. The typical process of plasma-assisted etching uses energetic ions to remove materials in the vertical direction, creating anisotropic etch profiles. Plasmaless anisotropic etching, considered here, is a less common process that does not use ions and plasma. The anisotropy is caused by the unequal etching rates of different crystal planes; the etching process, thus, proceeds in a preferred direction. In this paper, we have performed quantum chemistry modeling of gas-surface reactions involved in the etching of silicon surfaces by molecular fluorine. The results confirm that orientation-dependent etch rates are the reason for anisotropy. The modeling of F2 dissociative chemisorption on F-terminated silicon surfaces shows that Si–Si bond breaking is slow for the Si(111) surface, while it is fast for Si(100) and Si(110) surfaces. Both Si(100) and Si(110) surfaces incorporate a larger number of fluorine atoms resulting in Si–Si bonds having a larger amount of positive charge, which lowers the reaction barrier of F2 dissociative chemisorption, yielding a higher etch rate for Si(100) and Si(110) surfaces compared to Si(111) surfaces. Molecular dynamics modeling of the same reactions has shown that the chosen reactive bond order potential does not accurately reproduce the lower reaction barriers for F2 dissociative chemisorption on Si(100) and Si(100) surfaces. Thus, reparameterization is necessary to model the anisotropic etching process that occurs at lower temperatures.

(Best Paper Award, Invited) Manufacturing of Nanosheets and Multilayer Nanogaps in Silicon

Nanogap technology is the basic concept for many promising devices such as localized SOI, multichannel FETs, and resonant tunneling diodes.It will be shown that intrinsic bulk strain in single crystalline silicon can be used to create homogeneous nanogaps with a few nanometer gap distance. The strain has been created by epitaxial growth of Si1-xGex/Si multi-layer stacks on 200 mm (100) silicon wafers. The stacks were patterned by RIE to reveal the side walls for subsequent lateral etching with gaseous hydrochloric acid. In accordance with former investigations [1] we found that a selectivity up to 1000:1 for Si1-xGex/Si can be achieved for Ge-concentrations >30% and growth temperatures T<650°C. XRD measurements, SEM pictures and wagon wheel test structures prove that for the anisotropic lateral etching behavior intrinsic strain is the dominant factor. Furthermore, the crystal orientation plays a dominant role (Fig. 1). Based on this behavior multilayer nanogaps with spacings <10 nm had been fabricated.In a subsequent process nanogaps down to 5 nm have been successfully filled completely with dielectrics and/or metals by low temperature (T<450°C) plasma oxidation, LPCVD as well as ALD (Fig. 2). The resulting nanosheets can be used for device applications.Vertical diodes and lateral MOS transistors with nanogaps and nanosheets have been fabricated. Diodes with a SiO2 gap filling show perfect Fowler-Nordheim tunneling, which proves the high quality of the gap filling process. The electrical properties of nanogap-MOSFETs and various nanogap-diodes will be presented.[1] Destefanis et al., Semiconductor Sci. Technol. 23, 1 (2008) Fig. 1: Wagon wheel structure showing the etch anisotropy of 8 nm SiGe layer in Si Fig. 2: SEM cross section of a multistack of 6 SiGe layers selectively etched and completely filled with LPCVD oxide

Etching conditions effect on anisotropic properties of sapphire

By patterning sapphire substrate (PSS) and then growing gallium nitride (GaN) film through wet etching process, the generation of dislocation and lattice defects of LED substrate can be significantly reduced, and the luminous efficiency and stability of the prepared led beads can be greatly improved. Due to the current anisotropic etching mechanism of sapphire has not been fully revealed, the etching evolution process and structure morphology cannot be accurately predicted and controlled, and ultimately it is difficult to ensure the structural quality of the patterned substrate. In this study, the etching rates of all crystal planes of sapphire in 98%H2SO4:85%H3PO4 = 3:1 etching solution were obtained through experiments, and the microstructure etching process and surface morphology were analyzed in detail. In addition, the influence of etching conditions on sapphire etching microstructure and surface morphology was also analyzed through experiments. The experimental results show that: 1) increasing the temperature can speed up the etching reaction, but it will make the surface quality worse; 2) Phosphoric acid as an etching buffer can improve the quality of etched structural planes; 3) The optimal etching rate and surface quality can be obtained by etching in 98%H2SO4:85%H3PO4 = 3:1 solution.

Differently shaped Ag crystallites and four current transport paths at sintered Ag/Si interface of crystalline silicon solar cells

The comprehensive understanding of the Ohmic contact mechanism on the front metalization is highly desirable for further improvement of crystalline silicon solar cells performance. However, there are still controversial views about current transport paths between silver electrode and silicon emitter. To clarify this significant issue, we applied the selective acid etching (AE) process and the method of mechanical stripping process to prepare proper samples for direct observation of the Ag/Si contact interface. It is revealed that four kinds of Ag crystallites are grown with variant shapes and sizes on the pyramid tips, {111} planes, edges and tiny bumps at valleys of the textured Si surface resulting from anisotropic etching of Si emitter by the flowing molten glass frit during firing and the consequent epitaxially growth of Ag on the etching pits during cooling. All these Ag crystallites are in direct contact with Si emitter, serving as the most important contact points on the Si side. Meanwhile, three kinds of spherical Ag particles are formed in the resolidified glass frit during cooling which are crucial tunneling paths, conducting between glass-covered Ag crystallites on silicon and Ag bulk above. As a whole, four current transport paths are suggested mainly via Ag crystallites, Ag particles or both. In addition, the four electron transport paths are further confirmed by the Kelvin probe force microscopy characterization. The clarification and detailed understanding of all current transport paths are key points to design better silver paste and sintering process, and hence to improve the solar cell performance.

Patterning two‐dimensional semiconductors with thermal etching

AbstractThe controllable synthesis of complicated nanostructures in advanced two‐dimensional (2D) semiconductors, such as periodic regular hole arrays, is essential and remains immature. Here, we report a green, facile, highly controlled synthetic method to efficiently pattern 2D semiconductors, such as periodic regular hexagonal‐shaped hole arrays (HHA), in 2D‐TMDs. Combining the production of artificial defect arrays through laser irradiation with anisotropic annealing etching, we created HHA with different arrangements, controlled hole sizes, and densities in bilayer WS2. Atomic force microscopy (AFM), Raman, photoluminescence (PL), and scanning transmission electron microscopy (STEM) characterization show that the 2D semiconductors have high quality with atomical clean and sharp edges as well as undamaged crystals in the unetched region. Furthermore, other nanostructures, such as nanoribbons and periodic regular triangular‐shaped 2D‐TMD arrays, can be fabricated. This kind of 2D semiconductors fabrication strategy is general and can be extended to a series of 2D materials. Density functional theory (DFT) calculations show that one WS2 molecule from the edges of the laser‐irradiated holed region exhibits a robust etching activation, making selective etching at the artificial defects and the fabrication of regular 2D semiconductors possible.image

Advanced low blaze angle x-ray gratings via nanoimprint replication and plasma etch.

We developed a new method of making ultra-low blaze angle diffraction gratings for x-ray applications. The method is based on reduction of the blaze angle of a master grating by nanoimprint replication followed by a plasma etch. A master blazed grating with a relatively large blaze angle is fabricated by anisotropic wet etching of a Si single crystal substrate. The surface of the master grating is replicated by a polymer material on top of a quartz substrate by nanoimprinting. Then a second nanoimprinting is performed using the 1st replica as a mold to replicate the saw-tooth surface into a resist layer on top of a Si grating substrate. A reactive ion etch is used to transfer the grating grooves into the Si substrate. The plasma etch provides reduction of the groove depth by a factor defined by the ratio of the etch rates for the resist and Si. We demonstrate reduction of the blaze angle of a master grating by a factor of 5 during fabrication of a 200 lines/mm blazed grating with a blaze angle of 0.2°. We investigated the quality and performance of the fabricated low blaze angle gratings and evaluate process accuracy and reproducibility. The new blaze angle reduction method preserves the planarity of the optical surface of the grating substrate and at the same time provides improvement in the grating groove quality during the reduction process.

Impact of the W etching process on the resistive switching properties of TiN/Ti/HfO2/W memristors

In this work, we investigate the effects related to the etching process of the W bottom electrode (BE) on the breakdown voltages and the resistive switching (RS) characteristics of TiN/Ti/HfO2/W memristors. Two different W-BE etching processes are compared: anisotropic dry etching and isotropic wet etching. In order to complete the analysis, scanning electron microscope inspections are used to investigate the profile of the patterned BE. Finally, the hysteretic current–voltage (I-V) characteristics are simulated using the Dynamic Memdiode Model (DMM).