Analog Signal Processing Research Articles

A Low-Power 5-Bit Two-Step Flash Analog-to-Digital Converter with Double-Tail Dynamic Comparator in 90 nm Digital CMOS

Low-power portable devices play a major role in IoT applications, where the analog-to-digital converters (ADCs) are very important components for the processing of analog signals. In this paper, a 5-bit two-step flash ADC with a low-power double-tail dynamic comparator (DTDC) using the control switching technique is presented. The most significant bit (MSB) in the proposed design is produced by only one low-power DTDC in the first stage, and the remaining bits are generated by the flash ADC in the second stage with the help of an auto-control circuit. A control circuit produced reference voltages with respect to the control input and mid-point voltage (Vk). The proposed design and simulations are carried out using 90 nm CMOS technology. The result shows that the peak differential non-linearity (DNL) and integral non-linearity (INL) are +0.60/−0.69 and +0.66/−0.40 LSB, respectively. The signal-to-noise and distortion ratio (SNDR) for an input signal having a frequency of 1.75 MHz is found to be 30.31 dB. The total power consumption of the proposed design is significantly reduced, which is 439.178 μW for a supply voltage of 1.2 V. The figure of merit (FOM) is about 0.054 pJ/conversion step at 250 MS/s. The present design provides low power consumption and occupies less area compared to the existing works.

Design and implementation of a nondestructive testing system for magnetic field imaging based on machine learning

This study presents the design of a nondestructive testing (NDT) system for detecting metal defects using a magnetic field sensor array. The system integrates a hardware-software detection framework that includes parallel computation and processing cores, along with multiple anisotropic magnetoresistance (AMR) sensors. These AMR sensors capture subtle variations in the magnetic field, which serve as the foundation for defect identification. The system enables synchronized data acquisition from multiple AMR sensors, achieving multi-axis data fusion and parallel signal processing. Furthermore, the detection system gathers defect features to train an NDT system based on machine learning (ML). Subsequently, ML-generated defect imaging features are processed through an imaging framework, producing magnetic field imaging (MFI) for precise defect localization. The study tested six different metal samples with various defect sizes and types to validate the system. The results demonstrate the system’s ability to accurately detect and identify different defects, highlighting the high precision of magnetic field detection and the overall effectiveness of the proposed system for NDT.

Noise-resilient designs and analysis for optical neural networks

Abstract All analog signal processing is fundamentally subject to noise, and this is also the case in next generation implementations of Optical Neural Networks (ONNs). Therefore, we propose the first hardware-based approach to mitigate noise in ONNs. A tree-like and an accordion-like design are constructed from a given Neural Network (NN) that one wishes to implement. Both designs have the capability that the resulting ONNs give outputs close to the desired solution. To establish the latter, we analyze the designs mathematically. Specifically, we investigate a probabilistic framework for the tree-like design that establishes the correctness of the design, i.e., for any feed-forward NN with Lipschitz continuous activation functions, an ONN can be constructed that produces output arbitrarily close to the original. ONNs constructed with the tree-like design thus also inherit the universal approximation property of NNs. For the accordion-like design, we restrict the analysis to NNs with linear activation functions and characterize the ONNs’ output distribution using exact formulas. Finally, we report on numerical experiments with LeNet ONNs that give insight into the number of components required in these designs for certain accuracy gains. The results indicate that adding just a few components and/or adding them only in the first (few) layers in the manner of either design can already be expected to increase the accuracy of ONNs considerably. To illustrate the effect we point to a specific simulation of a LeNet implementation, in which adding one copy of the layers components in each layer reduces the Mean Squared Error (MSE) by 59.1% for the tree-like design and by 51.5% for the accordion-like design. In this scenario, the gap in accuracy of prediction between the noiseless NN and the ONNs reduces even more: 93.3% for the tree-like design and 80% for the accordion-like design.

Exploiting Spatial Ionic Dynamics in Solid-State Organic Electrochemical Transistors for Multi-Tactile Sensing and Processing.

The human nervous system inspires the next generation of sensory and communication systems for robotics, human-machine interfaces (HMIs), biomedical applications, and artificial intelligence. Neuromorphic approaches address processing challenges; however, the vast number of sensors and their large-scale distribution complicate analog data manipulation. Conventional digital multiplexers are limited by complex circuit architecture and high supply voltage. Large sensory arrays further complicate wiring. An 'in-electrolyte computing' platform is presented by integrating organic electrochemical transistors (OECTs) with a solid-state polymer electrolyte. These devices use synapse-like signal transport and spatially dependent bulk ionic doping, achieving over 400 times modulation in channel conductance, allowing discrimination of locally random-access events without peripheral circuitry or address assignment. It demonstrates information processing from 12 tactile sensors with a single OECT output, showing clear advantages in circuit simplicity over existing all-electronic, all-digital implementations. This self-multiplexer platform offers exciting prospects for circuit-free integration with sensory arrays for high-quality, large-volume analog signal processing.

A Review of Current Differencing Buffered Amplifiers: Performance Metrics and Technological Advances

Current Differencing Buffered Amplifiers (CDBAs) are a critical class of analog circuit components capable of handling both current and voltage signals with minimal power consumption. Due to their low impedance voltage output, they play a significant role in modern electronics for developing high-performance, high-precision analog and mixed-signal circuits. But, designing and characterizing CDBAs pose several challenges, such as ensuring stability at high frequencies, minimizing noise impact for high-precision applications, and enhancing adaptability. Integrating CDBAs with other analog components to create multifunctional integrated circuits opens many opportunities in the analog signal-processing domain. This paper reviews the evolution and applications of CDBAs in analog signal processing. Various implementation schemes, including those using commercial Current Feedback Amplifiers (CFAs) and novel CMOS configurations, are analyzed for their performance metrics such as supply voltage, power dissipation, input/output impedances, and technology node. Future trends and challenges in advancing CDBA technology towards higher integration and lower-voltage operation are discussed, highlighting potential applications in next-generation electronics.

An integrated dual-frequency IVUS system with interleaved sampling and parallel signal processing based on FPGA

Abstract Due to the lack of high voltage and low frequency pulse transmission channels, commercial high frequency IVUS imaging system cannot meet the hardware requirements of ultrasound angiography. Therefore, it is of great research significance to develop a dual-frequency IVUS rotary imaging system with high integration, high sampling rate and sampling accuracy. In this work, an integrated dual-frequency IVUS system with interleaved sampling and parallel signal processing based on FPGA was developed. The central frequency of low-frequency channel is up to 10MHz, and the peak voltage range is 80-200V. The central frequency of the high-frequency channel is up to 60MHz, and the voltage peak-to-peak range is 40-80V. The acquisition channel is 500MHz and 12bit, which is realized by interleaved sampling of two ADC. The motor controlled ultrasonic transducer acquires 400-800 lines per turn, and eventually form a 360-degree IVUS hybrid imaging successfully.

Dual-Mode Embedded Impulse-Radio Ultra-Wideband Radar System for Biomedical Applications.

This paper presents a real-time and non-contact dual-mode embedded impulse-radio (IR) ultra-wideband (UWB) radar system designed for microwave imaging and vital sign applications. The system is fully customized and composed of three main components, an RF front-end transmission block, an analog signal processing (ASP) block, and a digital processing block, which are integrated in an embedded system. The ASP block enables dual-path receiving for image construction and vital sign detection, while the digital part deals with the inverse scattering and direct current (DC) offset issues. The self-calibration technique is also incorporated into the algorithm to adjust the DC level of each antenna for DC offset compensation. The experimental results demonstrate that the IR-UWB radar, based on the proposed algorithm, successfully detected the 2D image profile of the object as confirmed by numerical derivation. In addition, the radar can wirelessly monitor vital sign behavior such as respiration and heartbeat information.

Seat to beat: Novel capacitive ECG integration for in-car cardiovascular measurement

Cardiovascular diseases (CVD) are a leading cause of global mortality, responsible for approximately one in five deaths. In response to these concerning statistics, there is a growing need for innovative solutions enabling cardiac monitoring beyond medical facilities. This paper demonstrates the fabrication and development of a novel system designed to be integrated into passenger car seats, facilitating continuous monitoring of passengers’ cardiac activity. The system comprises a capacitive electrode prototype, a custom-designed analog signal processing circuit, and a computing unit. Two ultrathin capacitive electrodes were fabricated with a diameter of 56.42 mm protected by a guard layer to reduce noise. The amplification circuitry was comprised of operational amplifiers tasked with filtering and conditioning the electrocardiogram (ECG) signal. Heart rates calculated from our measurements were comparable with clinical ECG. The experimental setup underwent testing on human subjects while they were in a state of tranquil sitting within passenger cars and also in laboratory conditions. The proposed system offers the flexibility for single and dual power supplies in full capacitive or hybrid mode. Our experimental results confirm the system’s feasibility and its capability to record high-quality signals from weak biopotentials, highlighting its potential for real-world applications.

Polarization-diverse soliton transitions and deterministic switching dynamics in strongly-coupled and self-stabilized microresonator frequency combs

Dissipative Kerr soliton microcombs in microresonators have enabled fundamental advances in chip-scale precision metrology, communication, spectroscopy, and parallel signal processing. Here we demonstrate polarization-diverse soliton transitions and deterministic switching dynamics of a self-stabilized microcomb in a strongly-coupled dispersion-managed microresonator driven with a single pump laser. The switching dynamics are induced by the differential thermorefractivity between coupled transverse-magnetic and transverse-electric supermodes during the forward-backward pump detunings. The achieved large soliton existence range and deterministic transitions benefit from the switching dynamics, leading to the cross-polarized soliton microcomb formation when driven in the transverse-magnetic supermode of the single resonator. Secondly, we demonstrate two distinct polarization-diverse soliton formation routes – arising from chaotic or periodically-modulated waveforms via pump power selection. Thirdly, to observe the cross-polarized supermode transition dynamics, we develop a parametric temporal magnifier with picosecond resolution, MHz frame rate and sub-ns temporal windows. We construct picosecond temporal transition portraits in 100-ns recording length of the strongly-coupled solitons, mapping the transitions from multiple soliton molecular states to singlet solitons. This study underpins polarization-diverse soliton microcombs for chip-scale ultrashort pulse generation, supporting applications in frequency and precision metrology, communications, spectroscopy and information processing.

An FPGA-based parallel deconvolution application envisaging high-energy calorimeters operating under severe pile-up conditions

Signal pileup may arise when the system response time is larger than what would be required by the event rate in the application. In this condition, information superposition occurs, and signal estimation is deteriorated due to such information distortion. For online applications, mitigating such a pileup distortion usually requires embedded digital signal processing, which often involves FPGA-based designs when high event rates are a concern. Recently, high-energy particle experiments started facing an unprecedented increase in pileup conditions, which demanded new approaches for signal estimation. This work proposes a dedicated parallel signal processing system embedded on an FPGA platform that implements different filtering techniques for online energy reconstruction in calorimeters (energy measurement) operating under severe pileup conditions. Each designed filter is an inverse approximation of the calorimeter readout channel's impulse response, performing deconvolution of the incoming signals. Such a deconvolution approach for energy estimation was recently introduced, and the proposed filters were implemented in this work. Evaluation of the digital system design was performed using a data set that considers a typical high-energy calorimeter front-end response, as high-luminosity particle collider experiments produce high pileup distortions in calorimeter signals when processing the subproducts of the collisions. As the Large Hadron Collider (LHC) provides the most demanding conditions in terms of signal pileup, the acquisition system of the proposed solution is synchronous with its collision rate (40 MHz). The results showed that the proposed implementation may be applied as a preprocessing (pileup reduction) step in calorimeter instrumentation and could reduce the signal pileup within the fast response time required by such experiments.

TRENDS OF THE MICROWAVE PHOTONIC RADARS

Today, the world's leading countries are intensively working on the development of new generation radars - microwave photonic radars. Microwave photonic radars make it possible to significantly reduce the mass and size characteristics of radar stations, to increase the information capability and range of target detection due to the reduction of losses in long communication lines when using optical fiber, to ensure high immunity due to the significantly lower sensitivity of optical-electronic equipment and fiber-optic lines of communication connection to external electromagnetic influences. Microwave photonics provides wide bandwidth, flat response, low loss transmission, multi-dimensional multiplexing, ultra-fast analog signal processing and immunity to electromagnetic interference. Radar implementation in the optical domain can provide better resolution, coverage, and speed performance, which would be difficult to implement with traditional electronics. The review article examines the state of development and system architectures of such photonic radars as optoelectronic hybrid radars, all-optical radars, multifunctional microwave photonic radar systems, distributed microwave photonic radars, software-defined radars, and cognitive radars. New technologies in this field and possible future directions of research are discussed. As an example, a broadband microwave photon radar reproduced on the basis of a microcircuit is considered. The broadband signal generator and receiver are built into the silicon crystal on the insulator. A high-precision distance measurement with a resolution of 2.7 cm and an error of less than 2.75 mm was obtained. Visualization of multiple targets with complex profiles has been implemented. But the performance of most integrated microwave photonic chips is not yet satisfactory for practical radar applications. Monolithic integration of key microwave photonic subsystems is also not mature enough for practical applications, so hybrid integration of devices fabricated on their optimal integration platforms is of practical interest. At present, indium phosphide, silicon nitride and silicon on insulator are the three leading platforms for photonic integration

Parallel processing of sensor signals using deep learning method for aero-engine remaining useful life prediction

Abstract Accurately predicting the remaining useful life of aerospace engines is crucial for enhancing the reliability of aviation equipment. While some methods have taken note of the challenges posed by vast sensor data and complex signal interrelationships, there is still room for improvement in performance. This paper proposes a novel deep learning model that utilizes a parallel structure to independently process inputs from various sensor signals. Each branch in this parallel structure employs a combination of an improved Inception module and a novel feature filtering module as a feature extractor. The improved Inception module boasts a larger perceptual field to ensure the integrity of feature information. The feature filtering module calculates the importance weights of feature information through convenient computation, allowing the network to focus more on feature information without significantly increasing computational complexity. Finally, the feature extractor is combined with a gated recurrent unit module to learn features from sensor signals. Extensive experiments were conducted on the C-MAPSS standard dataset, comparing the proposed method with other state-of-the-art methods. Ablation experiments were performed on the new generation N-CMAPSS standard dataset. The results of the experiments confirm the superiority and rationality of the proposed prediction method.

Synergistic Effect of Ferroelectric and HfO2/SiO2 Hetero dielectrics in Junctionless FET for Analog and RF Applications

AbstractThe synergistic effect of ferroelectric and HfO2/SiO2 (Hafnium dioxide/ Silicon dioxide) hetero dielectrics in double gate Junctionless Field Effect Transistor is investigated using TCAD Tool. The study encompasses a wide range of parameters, allowing for a detailed examination of the impact of hysteresis on the overall functionality of the double gate Junctionless FET. One crucial aspect of the investigation involves examining the analog and RF performance of the device. The high transconductance (gm) of 5.42 mS, a gain of 95 dB (decibel), a cut‐off frequency of 553.9 GHz (gigahertz), a gain transconductance frequency product (GTFP) of 50.9 THz (terahertz), and a gain bandwidth product (GBW) of 188 GHz shows its great potential for analog and RF signal processing applications as well as for other high data rate wireless applications such as Machine Learning (ML), Artificial Intelligence (AI) and Internet‐of‐Thing (IoT). The low transit time of 17 ns (nano second), with high ION/IOFF ratio range of 107 shows that the device has good switching behavior also. This aspect of the research aims to unveil the device's viability for analog and high‐frequency applications, contributing valuable insights to the emerging electronic technologies field.

Stabilizing Analog Signal Processing of Artificial Synapse Under Heat Fluctuations Through Light‐Temperature Antagonistic Operation

Stabilizing Analog Signal Processing of Artificial Synapse Under Heat Fluctuations Through Light‐Temperature Antagonistic Operation

High Wideband Digital Oscilloscope Design

In most test applications, acquisition and analysis involving simultaneous processing of analog and digital signals. However, the bandwidth of most mainstream digital oscilloscopes is limited to 100 MHz, which is unable to meet the testing needs of high-frequency signals in complex electronic systems [1], and therefore, high-bandwidth digital oscilloscopes have emerged. Based on this background, this paper designs a digital oscilloscope hardware platform with high bandwidth by integrating FPGA and ARM technologies, aiming to meet the rigorous testing requirements of modern electronic systems. The FPGA module is based on the xc7s75fgga676 chip, which is mainly responsible for ADC control, data processing and frequency measurement functions. AM5708 is selected as the ARM module to realize the trigger, time base, amplitude and automatic setting functions of the oscilloscope. In order to ensure the accuracy and fidelity of waveform changes, the Sinc function interpolation method is used. This design further improves the acquisition bandwidth and processing speed on the basis of traditional MSO (Mixed Signal Oscilloscope) oscilloscopes, which is of great significance for the acquisition and processing of high-speed signals.

Reconfigurable stochastic neurons based on strain engineered low barrier nanomagnets

Stochastic neurons are efficient hardware accelerators for solving a large variety of combinatorial optimization problems. ‘Binary’ stochastic neurons (BSN) are those whose states fluctuate randomly between two levels +1 and −1, with the probability of being in either level determined by an external bias. ‘Analog’ stochastic neurons (ASNs), in contrast, can assume any state between the two levels randomly (hence ‘analog’) and can perform analog signal processing. They may be leveraged for such tasks as temporal sequence learning, processing and prediction. Both BSNs and ASNs can be used to build efficient and scalable neural networks. Both can be implemented with low (potential energy) barrier nanomagnets (LBMs) whose random magnetization orientations encode the binary or analog state variables. The difference between them is that the potential energy barrier in a BSN LBM, albeit low, is much higher than that in an ASN LBM. As a result, a BSN LBM has a clear double well potential profile, which makes its magnetization orientation assume one of two orientations at any time, resulting in the binary behavior. ASN nanomagnets, on the other hand, hardly have any energy barrier at all and hence lack the double well feature. That makes their magnetizations fluctuate in an analog fashion. Hence, one can reconfigure an ASN to a BSN, and vice-versa, by simply raising and lowering the energy barrier. If the LBM is magnetostrictive, then this can be done with local (electrically generated) strain. Such a reconfiguration capability heralds a powerful field programmable architecture for a p-computer whereby hardware for very different functionalities such as combinatorial optimization and temporal sequence learning can be integrated in the same substrate in the same processing run. This is somewhat reminiscent of heterogeneous integration, except this is integration of functionalities or computational fabrics rather than components. The energy cost of reconfiguration is miniscule. There are also other applications of strain mediated barrier control that do not involve reconfiguring a BSN to an ASN or vice versa, e.g. adaptive annealing in energy minimization computing (Boltzmann or Ising machines), emulating memory hierarchy in a dynamically reconfigurable fashion, and control over belief uncertainty in analog stochastic neurons. Here, we present a study of strain engineered barrier control in unconventional computing.

Electronically Tunable Grounded and Floating Capacitance Multipliers Using a Single Active Element

A capacitance multiplier is an active circuit designed specifically to increase the capacitance of a passive capacitor to a significantly higher capacitance level. In this paper, the use of a voltage differencing differential difference amplifier (VDDDA), an electronically controllable active device for designing grounded and floating capacitance multipliers, is proposed. The capacitance multipliers proposed in this study are extremely simple and consist of a VDDDA, a resistor, and a capacitor. The multiplication factor (Kc) can be electronically controlled by adjusting the external bias current (IB). It offers an easy way of controlling it by utilizing a microcontroller for modern analog signal processing systems. The multiplication factor has the potential to be adjusted to a value that is either less than or greater than one, hence widening the variety of uses. The grounded capacitance multiplier can be easily transformed into a floating one by utilizing Zc-VDDDA. PSpice simulation and experimentation with a VDDDA realized from commercially available integrated circuits were used to test the performance of the proposed capacitance multipliers. The multiplication factor is electronically adjustable, ranging in approximation from 0.56 to 13.94. The operating frequency range is approximately three frequency decades. The realization of the lagging and leading phase shifters using the proposed capacitance multiplier is also examined and proven. The results reveal that the lagging and leading phase shifts are electronically tuned via the multiplication factor of the proposed capacitance multipliers.

A New CMOS FTFNDITA Implementation and Its Application

ABSTRACT This research article presents a new design of a CMOS analog building block, termed a Four Terminal Floating Nullor Differential Input Transconductance Amplifier (FTFNDITA). This new analog building block can operate up to the MHz range and offers low-power dissipation circuitry. The proposed FTFNDITA works with ± 1.65 V power supply. Moreover, a ICs-based FTFNDITA is also developed using an off-self commercially available Current Feedback Operational Amplifier (CFOA) as IC AD844 and Operational Transconductance Amplifier (OTA) as IC LM13700 or IC CA3080. To extend the application perspective of the proposed FTFNDITA blocks, a few fundamental analog signal processing circuits like the design of Floating Inductor Simulator (FIS), First-Order Low-Pass Filter (FLPF), Floating Capacitance Multiplier (FCM), and its extension for active filter design, are incorporated. In addition, a non-ideality investigation is also performed to test the deviation between the ideal and practical design. Finally, PSPICE and experimental verifications are observed to validate the functionality of FTFNDITA.

A High Dynamic Velocity Locked Loop for the Carrier Tracking of a Wide-Band Hybrid Direct Sequence/Frequency Hopping Spread-Spectrum Signal

For hybrid direct sequence/frequency hopping (DS/FH) spread spectrum signals, even if the relative motion speed between the transmitter and receiver remains constant, the Doppler frequency will vary due to the continuous hopping of the carrier frequency. Under high dynamic conditions, the first-order and second-order change rates of the Doppler frequency attached to the received signal further increase the Doppler frequency agility, making it difficult for the carrier tracking loop to maintain steady-state tracking. To address these issues, a high dynamic velocity locked loop (HD-VLL) is proposed in this paper. Specifically, the accumulated phase tracking error caused by acceleration and jerk is first analyzed. Subsequently, to compensate for this phase tracking error with the system clock, the proposed loop adds an acceleration compensation module and a jerk compensation module. However, this results in the output of the high dynamic loop filter being updated with the system clock, which contradicts the multiplexing design of a traditional loop filter for parallel signal processing, making the hardware implementation of an HD-VLL impractical. Therefore, this contradiction leads us to design an HD-VLL-based multi-carrier NCO (HD-VLL-NCO). The HD-VLL and HD-VLL-NCO are simulated, revealing the HD-VLL’s superior dynamic adaptability and steady-state tracking, while the HD-VLL-NCO achieves comparable accuracy with the appropriate truncation bit width.

Radio‐Frequency Linear Analysis and Optimization of Silicon Photonic Neural Networks

Broadband analog signal processors utilizing silicon photonics have demonstrated a significant impact in numerous application spaces, offering unprecedented bandwidths, dynamic range, and tunability. In the past decade, microwave photonic techniques have been applied to neuromorphic processing, resulting in the development of novel photonic neural network architectures. Neuromorphic photonic systems can enable machine learning capabilities at extreme bandwidths and speeds. Herein, low‐quality factor microring resonators are implemented to demonstrate broadband optical weighting. In addition, silicon photonic neural network architectures are critically evaluated, simulated, and optimized from a radio‐frequency performance perspective. This analysis highlights the linear front‐end of the photonic neural network, the effects of linear and nonlinear loss within silicon waveguides, and the impact of electrical preamplification.