This work is intended to present a novel MOS-C design of first order frequency selective analog structure that plays essential role in phase equalization. The proposed idea employs 2 electronically tunable operational trans-conductance amplifiers, 7 MOS transistors forming active resistors and 1 grounded capacitor. Substantial flexibility to work in all 4 possible mode of operation enriches the uniqueness of proposed frequency selective structure. Non-ideal scenarios along with parasitic effects are also incorporated to explore real time performance of proposed structure. The emphasis on design has been enhanced by studying the effects of capacitor variations through Monte-Carlo analysis and the effects due to the temperature variations. Typical 0.18 µm CMOS process parameters are utilized in the verification of presented theoretical aspects through PSPICE simulation. To make room for the practicability of the proposed circuit, the experimental realization using commercially available ICs is also explored and included.
 HIGHLIGHTS
 
 A novel MOS-C design of first order frequency selective analog network is presented in this paper
 The proposed idea employs two electronically tunable operational trans-conductance amplifiers, seven MOS transistors forming active resistors and one grounded capacitor
 Non-ideal scenarios along with parasitic effects are also incorporated to explore real time performance of proposed structure
 18 µm CMOS process parameters are utilized in the verification of presented theoretical aspects through PSPICE simulation
 To explore the practicability aspect of the proposed circuit, the experimental realization using commercially available ICs is also explored and included
 
 GRAPHICAL ABSTRACT