Analog Components Research Articles

Disulfide Bond Formation in the Cytoplasm

Disulfide bond formation is critical for biogenesis of many proteins. While most studies in this field are aimed at elucidating the mechanisms in the endoplasmic reticulum, intermembrane space of mitochondria, and prokaryotic periplasm, structural disulfide bond formation also occurs in other compartments including the cytoplasm. Such disulfide bond formation is essential for biogenesis of some viruses, correct epidermis biosynthesis, thermal adaptation of some extremophiles, and efficient recombinant protein production. The majority of work in this new field has been reported in the past decade. Within the past few years very significant new data have emerged on the catalytic and noncatalytic mechanisms for disulfide bond formation in the cytoplasm. This includes the crystal structure of a key component of viral oxidative protein folding, identification of a missing component in cytoplasmic disulfide bond formation in hyperthermophiles, and introduction of de novo dithiol oxidants in engineered oxidative folding pathways. While a broad picture of cytoplasmic disulfide bond formation has emerged many critical questions remain unanswered. The individual components in the natural systems are largely known, but the molecular mechanisms by which these processes occur are largely deduced from the mechanisms of analogous components in other compartments. This prevents full understanding and manipulation of these systems, including the potential for novel anti-viral drugs based on the unique features of their sulfhydryl oxidases and the generation of more efficient cell factories for the large-scale production of therapeutic and industrial proteins.

Multiloop High-Power-Supply-Rejection Quadrature Ring Oscillator

This paper presents a source-follower-delay-cell, multiloop ring oscillator that provides power-supply isolation. The main contributions of this work are a source-follower-based delay cell with a multiloop ring structure achieving improved supply rejection, a design-oriented analysis of the proposed structure to facilitate its use, and a layout technique allowing straightforward mask design for the multiloop oscillator. The oscillator also features differential control voltages to allow rejection of common-mode control and supply noise. The oscillator was fabricated in a UMC 90-nm CMOS pure logic process with no analog components (regular VT), and the minimum measured incremental supply sensitivity is 0.003 [%-change <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">osc</sub> <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">/</sup> %-change <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DD</sub> ], which is more than 20 dB better than that of a conventional CMOS-delay-cell quadrature oscillator fabricated on the same test chip. The oscillator's measured tuning range is 0.63-8.1 GHz. Over the tuning range, the phase noise varies from - 106 to - 88 dBc/Hz at 10-MHz offset, and the power consumption ranges from 7 to 26 mW from a 1-V supply. The measured mean quadrature accuracy performance is within -1.5° to +2.25° error including board parasitics without any trimming/tuning across the oscillator's frequency range.

Compressive Spectrum Sensing Using a Bandpass Sampling Architecture

Fast and reliable detection of available channels (i.e., those temporarily unoccupied by primary users) is a fundamental problem in the context of emerging cognitive radio networks, without an adequate solution. The (mean) time to detect idle channels is governed by the front-end bandwidth to be searched for a given resolution bandwidth. Homodyne receiver architectures with a wideband radio-frequency front-end followed by suitable channelization and digital signal processing algorithms, are consistent with speedier detection, but also imply the need for very high speed analog-to-digital converters (ADCs) that are impractical and/or costly. On the other hand, traditional heterodyne receiver architectures consist of analog band-select filtering followed by down-conversion that require much lower rate ADCs, but at the expense of significant scanning operation steps that constitute a roadblock to lowering the scan duration. In summary, neither architecture provides a satisfactory solution to the goal of (near) real-time wideband spectrum sensing. In this work, we propose a new compressive spectrum sensing architecture based on the principle of under-sampling (or bandpass sampling) that provides a middle ground between the above choices, i.e., our approach requires modest ADC sampling rates and yet achieves fast spectrum scanning. Compared to other compressive spectrum sensing architectures, the proposed method does not require a high-speed Nyquist rate analog component. A performance model for the scanning duration is developed based on the mean time to detect all idle channels. Numerical results show that this scheme provides significantly faster idle channel detection than the conventional serial search scheme with a heterodyne architecture.

The contribution of hydrophobic residues in the pore-forming region of the ryanodine receptor channel to block by large tetraalkylammonium cations and Shaker B inactivation peptides

Although no high-resolution structural information is available for the ryanodine receptor (RyR) channel pore-forming region (PFR), molecular modeling has revealed broad structural similarities between this region and the equivalent region of K+ channels. This study predicts that, as is the case in K+ channels, RyR has a cytosolic vestibule lined with predominantly hydrophobic residues of transmembrane helices (TM10). In K+ channels, this vestibule is the binding site for blocking tetraalkylammonium (TAA) cations and Shaker B inactivation peptides (ShBPs), which are stabilized by hydrophobic interactions involving specific residues of the lining helices. We have tested the hypothesis that the cytosolic vestibule of RyR fulfils a similar role and that TAAs and ShBPs are stabilized by hydrophobic interactions with residues of TM10. Both TAAs and ShBPs block RyR from the cytosolic side of the channel. By varying the composition of TAAs and ShBPs, we demonstrate that the affinity of both species is determined by their hydrophobicity, with variations reflecting alterations in the dissociation rate of the bound blockers. We investigated the role of TM10 residues of RyR by monitoring block by TAAs and ShBPs in channels in which the hydrophobicity of individual TM10 residues was lowered by alanine substitution. Although substitutions changed the kinetics of TAA interaction, they produced no significant changes in ShBP kinetics, indicating the absence of specific hydrophobic sites of interactions between RyR and these peptides. Our investigations (a) provide significant new information on both the mechanisms and structural components of the RyR PFR involved in block by TAAs and ShBPs, (b) highlight important differences in the mechanisms and structures determining TAA and ShBP block in RyR and K+ channels, and (c) demonstrate that although the PFRs of these channels contain analogous structural components, significant differences in structure determine the distinct ion-handling properties of the two species of channel.

Artificial Intelligence Approaches to Advance Signal Processing and Simulation Methods for Efficient Power Supplies

This paper gives a different signal processing techniques, which are widely used for improving efficiency of power supplies. There are several numbers of power quality problems in power supplies, such as voltage sag, high harmonic currents, voltage swells, power-quality disturbances, a wide spectrum of harmonic components etc. This paper suggests different artificial intelligence approaches to advance signal processing techniques for improving the power quality. Today electronics systems are often composed of mixed analog and digital components. In order to simulate the entire system, many types of software should work together and co-simulation is necessary for power drivers. In this paper, the modeling of a power supply system using matlab/simulink, VHDL, FPGA module for PWM generator is presented. The power supplies are consisting of different power converters which are modeled and simulated in simulink environment. This design approach presents all the advantages of software and features.

A Comparison of Simulation and Hardware-in-the- Loop Alternatives for Digital Control of Power Converters

Debugging digital controllers for power converters can be a problem because there are both digital and analog components. This paper focuses on debugging digital controllers to be implemented in Field Programmable Gate Arrays or Application Specific Integrated Circuits, which are designed in hardware description languages. Four methods are proposed and described. All of them allow simulation, and two methods also allow emulation-synthesizing the model of the converter to run the complete closed-loop system in actual hardware. The first method consists in using a mixed analog and digital simulator. This is the easiest alternative for the designer, but simulation time can be a problem, specially for long simulations like those necessary in power factor correction or when the controller is very complex, for example, with embedded processors. The alternative is to use pure digital models, generating a digital model of the power converter. Three methods are proposed: real type, float type and fixed point models (in the latter case including hand-coded and automatic-coded descriptions). Float and fixed point models are synthesizable, so emulation is possible, achieving speedups over 20 000. The results obtained with each method are presented, highlighting the advantages and disadvantages of each one. Apart from that, an analysis of the necessary resolution in the variables is presented, being the main conclusion that 32-bit floating point is not enough for medium and high switching frequencies.

Hydroxyapatite nanoparticle reinforced peptide amphiphile nanomatrix enhances the osteogenic differentiation of mesenchymal stem cells by compositional ratios

In the field of bone tissue engineering, there is a need for materials that mimic the native bone extracellular matrix (ECM). This need is met through the creation of biphasic composites intended to mimic both the organic and inorganic facets of the native bone ECM. However, few studies have created composites with organic ECM analogous components capable of directing cellular behaviors and many are not fabricated in the nanoscale. Furthermore, few attempts have been made at investigating how variations of organic and inorganic components affect the osteogenic differentiation of human mesenchymal stem cells (hMSCs). To address these issues, biphasic nanomatrix composites consisting of hydroxyapatite nanoparticles (HANPs) embedded within peptide amphiphile (PA) nanofibers tailored with the RGDS cellular adhesion motif (PA-RGDS) were created at various HANP to PA-RGDS ratios. Fabrication of these biphasic nanomatrix composites was confirmed via scanning electron microscopy (SEM) and transmission electron microscopy (TEM). The long-term cellularity and osteogenic differentiation of hMSCs in response to the different compositional ratios were then assessed by quantifying the timed expression of genes indicative of osteogenic differentiation, alkaline phosphatase activity, and DNA content over time. Decreased cellularity and the expression of genes over time correlated with increasing compositional ratios between HANP and PA-RGDS. The highest HANP to PA-RGDS ratio (66% HANP) exhibited the greatest improvement to the osteogenic differentiation of hMSCs. Overall, these results demonstrate that the compositional ratio of biphasic nanomatrix composites plays an important role in influencing the osteogenic differentiation of hMSCs. Based on the observations presented within this study, these biphasic nanomatrix composites show promise for future usage in bone tissue engineering applications.

An FPGA-based ultrasound imaging system using capacitive micromachined ultrasonic transducers

We report the design and experimental results of a field-programmable gate array (FPGA)-based real-time ultrasound imaging system that uses a 16-element phased-array capacitive micromachined ultrasonic transducer fabricated using a fusion bonding process. The imaging system consists of the transducer, discrete analog components situated on a custom-made circuit board, the FPGA, and a monitor. The FPGA program consists of five functional blocks: a main counter, transmit and receive beamformer, receive signal pre-processing, envelope detection, and display. No dedicated digital signal processor or personal computer is required for the imaging system. An experiment is carried out to obtain the sector B-scan of a 4-wire target. The ultrasound imaging system demonstrates the possibility of an integrated system-in-a-package solution.

All-digital DSP-based phase-locked loop for induction heating applications

SUMMARY Phase-locked loop schemes are widely used in induction heating applications for controlling the converters. Most authors use total or partial analog solutions to implement the control schemes, which are less sturdy and flexible to changes than digital schemes. In this paper, an all-digital DSP-based PLL is presented. It has fewer variations due to the tolerances of the analog components and provides great flexibility in a wide range of conditions just by reprogramming. Moreover, it allows changing dynamically some of the parameters during the process and opens up the possibility of more complex control algorithms. The all-digital PLL has been simulated and experimentally tested, demonstrating the feasibility and reliability of this type of control in a real industrial equipment. Copyright © 2012 John Wiley & Sons, Ltd.

A Molecular Light-Driven Water Oxidation Catalyst

Two mononuclear Ru(II) complexes, [Ru(ttbt)(pynap)(I)]I and [Ru(tpy)(Mepy)(2)(I)]I (tpy = 2,2';6,2"-terpyridine; ttbt = 4,4',4"-tri-tert-butyltpy; pynap = 2-(pyrid-2'-yl)-1,8-naphthyridine; and Mepy = 4-methylpyridine), are effective catalysts for the oxidation of water. This oxidation can be driven by a blue (λ(max) = 472 nm) LED light source using [Ru(bpy)(3)]Cl(2) (bpy = 2,2'-bipyridine) as the photosensitizer. Sodium persulfate acts as a sacrificial electron acceptor to oxidize the photosensitizer that in turn drives the catalysis. The presence of all four components, light, photosensitizer, sodium persulfate, and catalyst, are required for water oxidation. A dyad assembly has been prepared using a pyrazine-based linker to join a photosensitizer and catalyst moiety. Irradiation of this intramolecular system with blue light produces oxygen with a higher turnover number than the analogous intermolecular component system under the same conditions.

Energy Efficient Sensor Nodes Powered by Kinetic Energy Harvesters – Design for Optimum Performance

In an energy harvester powered wireless sensor node system, as the energy harvester is the only energy source, it is crucial to configure the microcontroller and the sensor node so that the harvested energy is used efficiently. This paper outlines modelling, performance optimisation and design exploration of the complete, complex system which includes the analogue mechanical model of a tunable kinetic microgenerator, its magnetic coupling with the electrical blocks, electrical power storage and processing parts, the digital control of the microgenerator tuning system, as well as the power consumption models of sensor node. Therefore not only the energy harvester design parameters but also the sensor node operation parameters can be optimised in order to achieve the best system performance. The power consumption models of the microcontroller and the sensor node are built based on their operation scenarios so that the parameters of the digital algorithms can be optimised to achieve the best energy efficiency. In the proposed approach, two Hardware Description Languages, VHDL-AMS and SystemC-A is used to model the system's analogue components as well as the digital control algorithms which are implemented in the microcontroller and the sensor node. Simulation and performance optimisation results are verified experimentally. In the development of the fast design exploration tool based on the response surface technique, the response surface model (RSM) is constructed by carrying out a series of simulations. The RSM is then optimised using MATLAB's optimisation toolbox and the optimisation results are presented.

Design and Realization of a Digital Multichannel Fluxgate Signal Processing System

Addressing drawbacks of analog components and questions of multi-channel fluxgate signal operation, a FPGA (Field Programmable Gate Array) based signal processing system is designed. Three copies of sub modules compose the whole system, each of which exclusively processes one of three outputs of the fluxgate sensor. A “Phase-Sensitive-Rectification &amp; Low-Pass-Filtering” circuit structure is employed in the processing module, through which the fluxgate signal harmonics are extracted and converted into direct quantities according to detected magnetic intensities. Firstly designed in HDL (Hardware Description Language), afterward configurated in a FPGA chip, finally tested by processing outputs of a fluxgate sensor probe in real-time, the functionality of the designed system is verified. With inherent advantages, this FPGA based design is much reliable over temperature; by processing signals not time-sharingly but synchronously, its working speed is excellently high.

A 6-GHz All-Digital Fractional-$N$ Frequency Synthesizer Using FIR-Embedded Noise Filtering Technique

A 6-GHz all-digital fractional- frequency synthesizer using an FIR-embedded noise filtering technique is presented. This noise filtering technique is realized in the digital domain without multiple matched analog components. This fractional- frequency synthesizer is fabricated in a 90-nm CMOS process, and it occupies 0.18 . Its power is 28.8 mW with a supply of 1.2 V. The measured out-of-band phase noise at an offset of half the reference frequency is improved by more than 13 dB around 6 GHz considering cancellation variations for different output frequencies.

Study on Methanol Synthesis with the Analog Components of Bluecoke Furnace Gas by Rich Oxygen Carbonization

According to the components of bluecoke furnace gas by rich oxygen carbonization, the methane conversion and methanol synthesis processes with simulation mix gas were separately researched using the self-made catalysts. The results show that the conversion rate of methane could achieve about 95% under the conditions of temperature of 800°C, space velocity of 9000h-1 and the ratio of water to hydrocarbon of about 3.0 with self-made Ni/γ-Al2O3 catalyst. For synthesis of methanol with self-made CuO-ZnO-Al2O3 catalyst in fixed reactor from the reformed gas, the space time yield and selectivity of coarse methanol respectively reached 1.5451g•g-1•h-1 and 99.6143% under the conditions of temperature of 240°C, pressure of 5.5MPa and space velocity of 12000h-1.

Analog VLSI Implementation of Neural Network Architecture for Signal Processing

With the advent of new technologies and advancement in medical science we are trying to process the information artificially as our biological system performs inside our body. Artificial intelligence through a biological word is realized based on mathematical equations and artificial neurons. Our main focus is on the implementation of Neural Network Architecture (NNA) with on a chip learning in analog VLSI for generic signal processing applications. In the proposed paper analog components like Gilbert Cell Multiplier (GCM), Neuron activation Function (NAF) are used to implement artificial NNA. The analog components used are comprises of multipliers and adders’ along with the tan-sigmoid function circuit using MOS transistor in subthreshold region. This neural architecture is trained using Back propagation (BP) algorithm in analog domain with new techniques of weight storage. Layout design and verification of the proposed design is carried out using Tanner EDA 14.1 tool and synopsys Tspice. The technology used in designing the layouts is MOSIS/HP 0.5u SCN3M, Tight Metal.

Post-silicon debugging of PMU integration errors using behavioral models

Power Management Units (PMUs) are large integrated mixed-signal circuits, having several linear and switching regulators for supplying customized voltages to the components of a low power platform. The presence of analog components in the integration circuitry makes it very hard to eliminate all pre-silicon integration errors, including some common types of errors. During post-silicon debug the designer typically wants to rule out the common types of errors before considering other types of bugs. This is facilitated by a mechanism for mapping back from observed anomalies to these known types of integration errors. We present an approach that enables this task by creating a fault map through pre-silicon analysis of the PMU. The proposed pre-silicon analysis makes use of formal properties and behavioral models to accelerate simulation, and is thereby able to create the fault map within feasible limits of time. We present experimental results on industrial strength PMUs to demonstrate the feasibility of this step. We also present a post-silicon debugging approach, which uses the inverse of the fault map to shortlist the set of known types of integration errors that must be ruled out before looking for other forms of bugs.

An Explicit Linearized State-Space Technique for Accelerated Simulation of Electromagnetic Vibration Energy Harvesters

Vibration energy harvesting systems pose significant modeling and design challenges due to their mixed-technology nature, extremely low levels of available energy and disparate time scales between different parts of a complete harvester. An energy harvester is a complex system of tightly coupled components modeled in the mechanical, magnetic, as well as electrical analog and digital domains. Currently available design tools are inadequate for simulating such systems due to prohibitive CPU times. This paper proposes a new technique to accelerate simulations of complete vibration energy harvesters by approximately two orders of magnitude. The proposed technique is to linearize the state equations of the system's analog components to obtain a fast estimate of the maximum step-size to guarantee the numerical stability of explicit integration based on the Adams-Bashforth formula. We show that the energy harvester's analog electronics can be efficiently and reliably simulated in this way with CPU times two orders of magnitude lower than those obtained from two state-of-the-art tools, VHDL-AMS and SystemC-A. As a case study, a practical, complex microgenerator with magnetic tuning and two types of power-processing circuits have been simulated using the proposed technique and verified experimentally.

Single-Sample Robust Joint Source–Channel Coding: Achieving Asymptotically Optimum Scaling of SDR Versus SNR

In this paper, we consider the problem of zero-delay (encoding a single-source sample) robust joint source-channel coding over an additive white Gaussian noise channel. We propose a new scheme that, unlike previously known coding schemes, achieves the optimal scaling of the source signal-to-distortion ratio (SDR) versus channel signal-to-noise ratio (SNR). Also, we propose a family of robust codes, which together maintain a bounded gap with the optimum SDR curve (in terms of decibel). To show the importance of this result, we derive some theoretical bounds on the asymptotic performance of a widely used class of delay-limited hybrid digital-analog (HDA) coding schemes based on superposition of analog and digital components. We show that, unlike the delay-unlimited case, for this class of delay-limited HDA codes, the asymptotic performance loss is unbounded (in terms of decibels). Although the main focus of this paper is on uniform sources, it is also shown that the results are also valid for a more general class of well-behaved distributions.

Efficient Transient Simulation of Non-linear Dynamic Networks with Discontinuous Forcing

AbstractNew technologies produce highly complex hybrid systems containing analogue components next to digital hardware and software. Simulating those mixed-signal systems exhibits discontinuities in signals due to the nature of the digital components. In this paper, an efficient and accurate method for the transient analysis of non-linear dynamic systems is presented that can handle discontinuous forcing functions which may occur as prescribed voltages or forces, for instance. It is based on a transformation of a model's equation system by substituting the time for a new independent variable. This approach facilitates suitable system-level models that altogether maintain the performance that is needed for an overall system-level simulation of complex application scenarios.

Design and Implementation of an Analogue Tester Board

The recent rapid development of electronics and continual increase of the complexity and variety of electronic circuits (chips, packets, micro- and embedded systems) creates a demand for viable test and diagnostic methods. These recent developments have led to a great deal of research interest in electronic diagnostic systems, especially of effective diagnosis methods of detection, localization and identification levels of hard (catastrophic) and soft (parametric) faults in analog circuits. At present, the majority of electronic devices (embedded systems) are designed based on digital circuits; however a lot of them also contain analog components that require more complicated testing techniques. This paper presents a novel, electronic components tester board with inside, outside of circuit under tested. The design is first simulated by using the electronic work-bench software Multisim 11 in order to obtain satisfactory theoretical results for each standalone element of the design. Thereafter, the design is practically implemented and experimentally verified to show agreement with the simulated results.