AMS Technology Research Articles

A Teutonic stronghold in the Carpathian Mountains

The HiLands Project (2018-2022) brought the opportunity to investigate several main communication corridors within the Curvature Carpathians. At the northern end of Rucăr-Bran Pass we had a great surprise, finding in the woods three strongholds, just one kilometre west of Bran Castle. Several trips on the mountain and two short digging sessions uncovered two hillforts made by the Teutonic Order, and a third one, shortly after they left. Hidden in dense forests, they have been deserted and forgotten, not being recorded in any historical accounts. The two western strongholds are enclosed by a common outer palisade, as they were built and used together. They are rather small, each with two rows of palisades, separated by a large ditch. The eastern one firstly served as a chalk quarry for the above-mentioned buildings, but two or three generations later was turned into a fortification. The northern long side is made up by a bare cliff, almost vertical, the southern side is closed by a large palisade, with no ditch (as it was not necessary due to the strong slopes). The downside of our research is the almost complete lack of artefacts from the 13th century, the proposed chronology being based exclusively on C14 AMS technology. Such a situation fuelled the question whether the western complex could be one of the five attested Teutonic fortresses. Its position is outstanding, offering perfect visibility up to the Bran Pass (10 km southward) or down to the Râşnov fortress (12 km northward).

Application In Communication Equipments Antiseismic Time History Analysis Based on Advanced Mass Scaling

RADIOSS is a powerful and stable explicit non-linear finite element analysis (FEA) solver in Altair HyperWorks. In this paper, the seismic time history analysis of communication equipment based on RADIOSS solver was taken as the research object. In the numerical simulation, three methods were applied in the computational efficiency enhancement: the non-timestep control method, the traditional mass scaling technology, and the advanced mass scaling technology (AMS). Calculations prove that the AMS technology in RADIOSS can not only improve the solution efficiency, but also guarante the calculation accuracy in antiseismic time history analysis.

Mathematical modeling of deep learned artificial intelligence and axiomatic for system-informational culture implementation

In system informational culture SIC man is occupied by inter discipline activity proceeding in computer instrumental systems SI So natural intellect IN and artificial intelligence IA must achieve semantic level of communication It becomes possible due to deep learning of the partners both Meanings as the utmost mathematical abstractions have been already applied in computer sciences and human mind is backward By authors opinion person s subjectization in SIC can be accomplished with the help of rational educational model ER system axiomatic method AMS usage and technology of universal IN tutoring TU implementation in the form of IA

A CMOS Frontend for Scintillators Readout by Photodiodes for Nuclear Physics Experiments

We designed a CMOS frontend for the readout of scintillators coupled with silicon photodiodes for nuclear physics experiments. The preamplifier features a continuous-reset feedback and an input pMOS transistor. The designed input dynamic range is 90-MeV silicon equivalent. The frontend has been integrated in single channel and multichannel versions up to 16-channel application specific integrated circuits (ASICs) in the C35B4C3 AMS technology. The measured integral-non-linearity over the whole dynamic range is below 0.5%. The intrinsic rise time (10%–90%) of the preamplifier is of the order of 3 ns over the entire dynamic range and is below 50 ns when coupled with a 130-pF photodiode. We qualified the spectroscopic performance by acquiring spectra of a mixed nuclei $\alpha $ source and of different $\gamma $ sources (137Cs and 60Co) with a CsI(Tl) scintillator crystal $3.2~\text {cm}\times 3.2~\text {cm}\times 6~\text {cm}$ coupled with a $18~\text {mm}\times 18~\text {mm}$ silicon p-i-n diode 300- $\mu \text{m}$ -thick readout by the developed ASIC.

Photodetectors and front-end electronics for the LHCb RICH upgrade

The RICH detectors of the LHCb experiment provide identification of hadrons produced in high energy proton-proton collisions in the LHC at CERN over a wide momentum range (2–100GeV/c). Cherenkov light is collected on photon detector planes sensitive to single photons. The RICH will be upgraded (in 2019) to read out every bunch crossing, at a rate of 40MHz. The current hybrid photon detectors (HPD) will be replaced with multi-anode photomultiplier tubes (customisations of the Hamamatsu R11265 and the H12699 MaPMTs). These 8×8pixel devices meet the experimental requirements thanks to their small pixel size, high gain, negligible dark count rate (∼50Hz/cm2) and moderate cross-talk. The measured performance of several tubes is reported, together with their long-term stability. A new 8-channel front-end chip, named CLARO, has been designed in 0.35µm CMOS AMS technology for the MaPMT readout. The CLARO chip operates in binary mode and combines low power consumption (∼1mW/Ch), wide bandwidth (baseline restored in ⩽25ns) and radiation hardness. A 12-bit digital register permits the optimisation of the dynamic range and the threshold level for each channel and provides tools for the on-site calibration. The design choices and the characterization of the electronics are presented.

An automatic transimpedance gain control circuit for analogue front-ends of drifting amperometric biosensors

Abstract When amperometric biosensors drift, their sensitivity drops with time: the same difference in detected concentration value Δ C results in lower sensor output current Δ I as the measurement/monitoring time progresses. This limitation affects the longevity of biosensors. To counterbalance for the drop in sensitivity, manual adjustment of the I-to-V transimpedance gain is usually applied. This paper presents an automatic transimpedance gain control circuit suitable for switched-capacitor-based current analogue front-ends. The circuit has been fabricated in the 0.35 μ m AMS technology, occupies an area of 0.028 mm 2 and consumes 14.5 μ W from a 3.3 V supply. Measured results confirm the automatic selection between three values of transimpedance gain, namely 1, 10 and 100 G Ω each optimised for sensor current range values of ±1.65 nA, ±165 pA and ±16.5 pA respectively. Though the reported topology has been tailored for glucose/lactate amperometric biosensors of slow temporal dynamics, its parameters can be made to match the conditions of other physiological/physical processes in need of monitoring.

Studies of irradiated AMS H35 CMOS detectors for the ATLAS tracker upgrade

Silicon detectors based on the HV-CMOS technology are being investigated as possible candidate for the outer layers of the ATLAS pixel detector for the High Luminosity LHC. In this framework the H35Demo ASIC has been produced in the 350 nm AMS technology (H35). The H35Demo chip has a large area (18.49 × 24.40 mm2) and includes four different pixel matrices and three test structures. In this paper the radiation hardness properties, in particular the evolution of the depletion region with fluence is studied using edge-TCT on test structures. Measurements on the test structures from chips with different substrate resistivity are shown for non irradiated and irradiated devices up to a cumulative fluence of 2 ⋅ 1015 1 MeV neq / cm2.

Current-Mode Rail-to Rail Instrumentation Amplifier for General Purpose Instrumentation Applications

Instrumentation amplifiers are used extensively in bio-potential reading, industrial sensor applications, Wheatstone bridge amplifiers etc. In this work, a high input common-mode range instrumentation amplifier is presented. The amplifier is composed of two second generation current conveyors (CCII+) with common-mode input range close to supply swings and a differential difference current conveyor (DDCC) at the second stage with high voltage swing at the output. Also an optional DC servo loop is employed as a feedback to second stage for the removal of any possible DC offset voltage at the output which can be used for AC coupled applications. The simple design strategy with high input common-mode range and nearly rail-to-rail output stage together with increased bandwidth advantage of current-mode approach makes the proposed implementation desirable for many of the general purpose instrumentation applications. The design is made using 0.35μm AMS technology with 3V supply voltage. The operation is verified by HSPICE simulations.

Results of the 2015 testbeam of a 180 nm AMS High-Voltage CMOS sensor prototype

Active pixel sensors based on the High-Voltage CMOS technology are being investigated as a viable option for the future pixel tracker of the ATLAS experiment at the High-Luminosity LHC. This paper reports on the testbeam measurements performed at the H8 beamline of the CERN Super Proton Synchrotron on a High-Voltage CMOS sensor prototype produced in 180 nm AMS technology. Results in terms of tracking efficiency and timing performance, for different threshold and bias conditions, are shown.

A low-power 12-bit SAR ADC for remote pressure measurement

A 12-bit low power successive approximation ADC has been designed and fabricated in 0.35 µm, poly---poly capacitor AMS technology. The SAR ADC is targeted for bridge type pressure sensor in wireless sensor node applications. An improved cascaded inverter based comparator is used for its lower power consumption at reduced supply voltage of 1.3 V. A modified SAR digital circuit has been incorporated to accommodate a higher input range of 1.8 V for the ADC . For a given noise floor, the higher input range of ADC ensures enhanced SNR performance relaxing the constraint on sensor interface circuit preceding to the ADC. Also a novel switching scheme is used in the feedback of comparator to reduce the charge injection induced offset without sacrificing the useful bandwidth of ADC. The inverter based comparator consumes 2 µW of power while operating at a speed of 1.6 MHz. The comparator does not make use of any offset cancellation techniques. By suitably choosing the capacitor array of inherent DAC, the calibration techniques have been avoided for the ADC. The ADC achieves an effective number of bits of 10.01 while consuming 6.69 µW at a conversion speed of 100 KHz. The FOM of the whole ADC is found to be 64.8 fJ/conversion-step. The active area occupied by the ADC is 0.170625 mm2 (375 µm × 455 µm).

Self‐calibrating closed‐loop circuit for configurable constant voltage thermal anemometers

A new circuit is described which applies a configurable voltage across an RTD while the current flowing through it is measured with a current mirror. The circuit also allows working with voltages above the IC supply voltage to cope with the high power RTD dissipation normally required in thermal anemometers. The circuit is periodically calibrated to cancel the errors and amplifier offset and therefore improves measurement accuracy. Experimental measurements of the circuit fabricated using 0.35 μm AMS technology show the functionality and improved power efficiency.

A 6 μW per channel analog biomimetic cochlear implant processor filterbank architecture with across channels AGC.

A new analog cochlear implant processor filterbank architecture of increased biofidelity, enhanced across-channel contrast and very low power consumption has been designed and prototyped. Each channel implements a biomimetic, asymmetric bandpass-like One-Zero-Gammatone-Filter (OZGF) transfer function, using class-AB log-domain techniques. Each channel's quality factor and suppression are controlled by means of a new low power Automatic Gain Control (AGC) scheme which is coupled across the neighboring channels and emulates lateral inhibition (LI) phenomena in the auditory system. Detailed measurements from a five-channel silicon IC prototype fabricated in a 0.35 μm AMS technology confirm the operation of the coupled AGC scheme and its ability to enhance contrast among channel outputs. The prototype is characterized by an input dynamic range of 92 dB while consuming only 28 μW of power in total ( ∼ 6 μW per channel) under a 1.8 V power supply. The architecture is well-suited for fully-implantable cochlear implants.

Radiation-hard Active Pixel Sensors for HL-LHC Detector Upgrades based on HV-CMOS Technology

Luminosity upgrades are discussed for the LHC (HL-LHC) which would make updates to thedetectors necessary, requiring in particular new, even more radiation-hard and granular, sensors forthe inner detector region.A proposal for the next generation of inner detectors is based on HV-CMOS: a new family of silicon sensors based on commercial high-voltage CMOS technology, which enables the fabrication of part of the pixel electronics inside the silicon substrate itself.The main advantages of this technology with respect to the standard silicon sensor technology are: low material budget, fast charge collection time, high radiation tolerance, low cost and operation at room temperature.A traditional readout chip is still needed to receive and organize the data from the active sensor and to handle high-level functionality such as trigger management. HV-CMOS has been designed to be compatible with both pixel and strip readout.In this paper an overview of HV2FEI4, a HV-CMOS prototype in 180 nm AMS technology, will be given. Preliminary results after neutron and X-ray irradiation are shown.

Cosmic ray physics in space: from fundamental physics to applications

One hundred years after their discovery by Victor Hess, cosmic rays are nowadays subject of intense research from space-based detectors, able to perform for the first time high precision measurement of their composition and spectra as well as of isotropy and time variability. On May 2011, the alpha magnetic spectrometer (AMS-02) has been installed on the International Space Station, to measure with high accuracy the cosmic ray properties searching for rare events which could be an indication of the nature of dark matter or presence of nuclear antimatter. AMS-02 is the result of nearly two decades of effort of an international collaboration, involving in particular Chinese and Italian scientists, to design and build a state of the art detector capable to perform high precision cosmic rays measurement. In this paper, I will briefly report on the first results of AMS-02 as well as about two cosmic rays researches related researches which are spinoffs of the AMS technology development: utilization of superconductivity in space to develop magnetic shields capable to protect the astronauts from the intense dose of radiation collected during an interplanetary mission and study of the lithospheric–magnetospheric interactions linking seismology to cosmic rays in the context of the Sino-Italian collaboration on the China seismo-electromagnetic satellite.

Design of 12 bit Successive Approximation Analog-to-Digital Converter

In this paper, a 12 bit Successive Approximation Analog to Digital Converter has been designed which has high resolution, less power consumption and medium speed. The circuit has been designed and simulated on Cadence tool in 0.35μm AMS technology with a supply voltage of 3.3V. Different ADC architectures are present but this SAR ADC has a salient feature of providing high resolution with increased accuracy. In this all the building blocks of SAR ADC have been designed such that they meet the desired specifications. The time domain comparator is used such as to obtain low power consumption. The layout of all the blocks has been done on Cadence Virtuoso and process corner analysis is also done to meet the desired specifications. General Terms Comparator, Phase Detector, Switch Circuit for DAC

A 8-Bit DAC Design in AMS 0.35 <i>μ</i>m CMOS Process for High-Speed Communication Systems

DAC architecture that is designed in this research can be applied in high-speed communication systems. DAC architecture that is presented in this research is based on the R2R ladder method. The design requires three main components, namely switches, resistors, and op-amp. This method has been applied to the 8-bit DAC for high-speed communication system using AMS technology 0.35 μm CMOS process. Resistors that are used in R2R DAC is replaced by transistors, so that the size is smaller and easier layout in the manufacturing process. Mentor graphics software is used as a simulator of the design. DAC design with 8-bit resolution in this research can be applied to the speed up to 1000 Msps. In the way the design can be categorized as high-speed DAC that can be used in a communication system.

An Optimization-Based Reconfigurable Design for a 6-Bit 11-MHz Parallel Pipeline ADC with Double-Sampling S&H

This paper presents a 6 bit, 11 MS/s time-interleaved pipeline A/D converter design. The specification process, from block level to elementary circuits, is gradually covered to draw a design methodology. Both power consumption and mismatch between the parallel chain elements are intended to be reduced by using some techniques such as double and bottom-plate sampling, fully differential circuits, RSD digital correction, and geometric programming (GP) optimization of the elementary analog circuits (OTAs and comparators) design. Prelayout simulations of the complete ADC are presented to characterize the designed converter, which consumes 12 mW while sampling a 500 kHz input signal. Moreover, the block inside the ADC with the most stringent requirements in power, speed, and precision was sent to fabrication in a CMOS 0.35 μm AMS technology, and some postlayout results are shown.

A flexible current‐mode classifier circuit and its applications

AbstractIn this paper a new CMOS classifier circuit is presented, simulated, and compared with other recently introduced circuits. The proposed CMOS circuit operates in current‐mode and can classify several types of data. The architecture is designed using two threshold circuits and a subtraction circuit. Among many possible applications of the classifier circuit, template‐based pattern classification, namely template matching and character recognition with corruption, and in another direction its use as a quantizer are given. Using 0.35‐ µm AMS technology parameters, SPICE simulations as well as hard realization results for the classifier and application circuits are included; detailed Monte Carlo analyses to assess parameter mismatch effects are also performed. Copyright © 2010 John Wiley & Sons, Ltd.

Analog ASIC for improved temperature drift compensation of a high sensitive porous silicon pressure sensor

The paper focuses on the design of a CMOS analog ASIC for temperature-drift compensation of a high sensitivity piezoresistive micro-machined porous silicon pressure sensor to avoid analog-to-digital conversion, limit chip area and reduce power consumption. For implementing the compensation circuitry, multilayered perceptron (MLP) based artificial neural network (ANN) with inverse delayed function model of neuron has been optimized. The temperature drift compensation CMOS ASIC has been implemented to make porous silicon pressure sensor an excellent SMART porous silicon pressure sensor. Using the compensation circuit, the error in temperature-drift has been minimized from 93% to about 0.5% as compared to 3% using conventional neuron model in the temperature range of 25---80°C. The entire circuit has been designed using 0.35 μm AMS technology model and simulated using mentor graphics ELDO Simulator.

Method for evaluating the potential of 14C labeled plant polyphenols to cross the blood–brain barrier using accelerator mass spectrometry

Bioactive compounds in botanicals may be beneficial in preventing age-related neurodegenerative diseases, but for many compounds conventional methods may be inadequate to detect if these compounds cross the blood brain barrier or to track the pharmacokinetics in the brain. By combining a number of unique technologies it has been possible to utilize the power of AMS to study the pharmacokinetics of bioactive compounds in the brain at very low concentrations. (14)C-labeled compounds can be biosynthesized by plant cell suspension cultures co-incubated with radioisotopically-labeled sucrose and isolated and separated into a series of bioactive fractions.To study the pharmacokinetics and tissue distribution of (14)C labeled plant polyphenols, rats were implanted with jugular catheters, subcutaneous ultrafiltration probes and brain microdialysis probes. Labeled fractions were dosed orally. Interstitial fluid (ISF) and brain microdialysate samples were taken in tandem with blood samples. It was often possible to determine (14)C in blood and ISF with a β-counter. However, brain microdialysate samples (14)C levels on the order of 10(7) atoms/sample required AMS technology. The Brain Microdialysate(AUC)/Serum(AUC) ranged from .021- to .029, with the higher values for the glycoside fractions. By using AMS in combination with traditional methods, it is possible to study uptake by blood, distribution to ISF and determine the amount of a dose which can reach the brain and follow the pharmacokinetics in the brain.