Alternative Gate Dielectrics Research Articles

High-temperature phase stability of hafnium aluminate films for alternative gate dielectrics

Hafnium aluminate films with different compositions were deposited at room temperature by jet vapor deposition. The as-deposited films were amorphous. After annealing at 1100 °C, the microstructure of the films was analyzed by high-resolution transmission electron microscopy, electron diffraction and electron energy loss spectroscopy (EELS). The crystalline phase in pure HfO2 films was monoclinic. With an increase in the Al content in the films, the amount of metastable HfO2 with a tetragonal distorted fluorite structure increased. In addition, the grain sizes decreased, making the detection of crystallization by x-ray diffraction difficult. No crystalline Al2O3 phase could be unambiguously detected in electron diffraction patterns in films with up to 30 mol % Al2O3. However, an Al-rich intergranular phase was identified by EELS. Films with ∼64 mol % Al2O3 crystallized as tetragonal HfO2 and metastable cubic Al2O3 with the spinel structure. The complex microstructures of the films should be considered in the interpretation of their dielectric and electrical properties after high temperature anneals.

Thermodynamic considerations in the stability of binary oxides for alternative gate dielectrics in complementary metal–oxide–semiconductors

A number of binary oxides have been predicted to be thermodynamically stable in contact with Si and are candidates to replace SiO2 in complementary metal–oxide–semiconductors. However, reactions leading to the formation of interfacial silicide, silicate, or SiO2 layers have been reported when these oxides are exposed to high temperatures during device processing. Different pathways have been proposed in the literature to explain these reactions. In this article, a thermodynamic analysis of the proposed reactions is performed. The analysis includes gaseous species, because typical gate dielectrics are ultrathin layers and diffusivities for species from the surrounding atmosphere, such as oxygen, may be high. Furthermore, nonstoichiometry of the high-k oxide, as may be resulting from nonequilibrium deposition processes or reducing atmospheres during processing is also considered. Studies are proposed to distinguish between possible reaction mechanisms. Finally guidelines for stable interfaces are presented.

Gate oxide metrology and silicon piezooptics

We describe the use of spectroscopic ellipsometry and other characterization techniques for gate oxide process metrology in manufacturing of CMOS transistors for the 130 nm node and beyond. Specifically, we describe the difficulties associated with the introduction of silicon-on-insulator (SOI) substrates, alternative gate dielectrics (silicon oxynitride or metal oxides), and strained Si channels. We predict that spectroscopic ellipsometry by itself will no longer be sufficient for gate oxide metrology, which will make the CMOS gate stack process much more difficult to control.

Effects of radiation and charge trapping on the reliability of high-κ gate dielectrics

The radiation response and long term reliability of alternative gate dielectrics will play a critical role in determining the viability of these materials for use in future space applications. The total dose radiation responses of several near and long term alternative gate dielectrics to SiO2 are discussed. Radiation results are presented for nitrided oxides, which show no change in interface trap density with dose and oxide trapped charge densities comparable to ultra thin thermal oxides. For aluminum oxide and hafnium oxide gate dielectric stacks, the density of oxide trapped charge is shown to depend strongly on the film thickness and processing conditions. The alternative gate dielectrics discussed here are shown to have effective trapping efficiencies that are up to ∼15 to 20 times larger than thermal SiO2 of equivalent electrical thickness. A discussion of single event effects in devices and ICs is also provided. It is shown that some alternative gate dielectrics exhibit excellent tolerance to heavy ion induced gate dielectric breakdown. However, it is not yet known how irradiation with energetic particles will affect the long term reliability of MOS devices with high-κ gate dielectrics in a space environment.

Charge trapping in SiO 2/HfO 2 gate dielectrics: Comparison between charge-pumping and pulsed ID– VG

Charge-pumping (amplitude sweep) and the pulsed I D– V G technique have recently been introduced to study fast transient charging effects in alternative gate dielectrics. In this work, a detailed comparison between the two techniques is made using various experimental conditions. It is demonstrated that charge-pumping and pulsed I D– V G measurements yield equivalent results, when base level, charging times and device geometry are chosen carefully.

A novel approach for determining the effective tunneling mass of electrons in HfO 2 and other high- K alternative gate dielectrics for advanced CMOS devices

There has been a search for alternative dielectrics with significantly increased dielectric constants, K, which increases physical thickness in proportion to K, and therefore would significantly reduce direct tunneling. However, increases in K to values of 15–25 in transition metal and rare earth oxides are generally accompanied by decreases in the conduction band offset energy with respect to Si, E B, and the effective electron tunneling mass, m eff, which mitigate gains from increased thickness. A novel technique, based on stacked dielectrics, is used to obtain the tunneling mass-conduction band offset energy product. When combined with optical measurements of tunneling barriers, this yields direct estimates of the tunneling mass.

Atomic Layer Deposition of Hafnium Silicate Thin Films Using HfCl[sub 2][N(SiMe[sub 3])[sub 2]][sub 2] and H[sub 2

Hafnium silicate thin films were deposited on Si substrate for alternative gate dielectrics by atomic layer deposition (ALD) using a single metallorganic precursor, dichlorobis[bis(trimethylsilyl)amido]hafnium and as an oxidant in the temperature range of 150-400°C. The effect of pulse time for purge and precursor injection confirmed the self-limiting characteristic of ALD. Film growth rate and composition were investigated as a function of deposition temperature. Growth rate reached to a maximum value of 1.3 A/cycle at 250°C and rapidly decreased to 0.3 A/cycle at 400°C. The composition analysis of as-deposited films using X-ray photoelectron spectroscopy showed that the composition ratio of increased linearly from 0.15 to 0.3 as the deposition temperature increased. © 2004 The Electrochemical Society. All rights reserved.

On the evaluation of performance parameters of MOSFETs with alternative gate dielectrics

This brief discusses a benchmarking methodology for the evaluation of performance parameters (g/sub mmax/ and I/sub dsat/) of MOSFETs with alternative gate dielectrics. It is shown that assuming ideal scaling for either or with electrical oxide thickness (g/sub mmax/ or I/sub dsat/ /spl prop/ T/sub oxinv//sup -/spl alpha// with /spl alpha/ = 1) instead of using experimental scaling trends for a baseline dielectric results in unrealistically pessimistic conclusions about the performance of alternative gate dielectrics. Factors In addition to mobility reduction which can contribute to sub-ideal scaling (/spl alpha/ < 1) for any dielectric are discussed. This bench marking methodology for performance evaluation is demonstrated for oxynitride gate dielectric films with equivalent oxide thickness (EOT) approaching 11 /spl Aring/.

Amorphous stability of HfO 2 based ternary and binary composition spread oxide films as alternative gate dielectrics

A ternary alloyed thin film library of HfO 2–Y 2O 3–Al 2O 3 was grown on a Si(1 0 0) substrate in a few hours by a new pulsed laser deposition (PLD) system installed with a masking and substrate rotating scheme. This specially designed combinatorial ternary composition spread method enabled us to fabricate continuous ternary and binary composition spread film libraries. It is noteworthy that the library made by this system is addressable; each film composition covers the full range (from 0 to 100%) and can be directly correlated with the film location in the ternary and binary phase diagram. Rapid permittivity measurement on the film libraries was carried out by a scanning microwave microscope, while the crystal structure was by a combinatorial X-ray diffractometer (XRD). The (HfO 2) 6(Y 2O 3) 1(Al 2O 3) 3 ternary composition area in an amorphous phase was found to have a dielectric constant higher than HfO 2–Y 2O 3 binary area. This ternary oxide is promising as amorphous gate dielectric material.

Simple estimation of the effect of hot-carrier degradation on scaled nMOSFETs

The influence of parasitic charge at the Si–SiO2 interface on the characteristics of n-channel metal oxide semiconductor field effect transistors (nMOSFETs) scaled down to a feature size of 25 nm is studied. The results are that the impact of parasitic charge on threshold voltage and drain current degradation significantly decreases. Additionally, as the hot-electron injection current densities are lowered for scaled-down nMOS transistors, less charge build-up occurs. This opens the perspective to make use of alternative gate dielectrics even if they have a higher interface trap density. These materials offer the advantage of greater dielectric constants than silicon oxide, so that a physically thicker dielectric will limit the gate tunnelling current.

Electronic structure of transition metal/rare earth alternative high-K gate dielectrics: interfacial band alignments and intrinsic defects

Electronic structure of transition metal/rare earth alternative high-K gate dielectrics: interfacial band alignments and intrinsic defects

Mathematical description of atomic layer deposition and its application to the nucleation and growth of HfO2 gate dielectric layers

Alternate gate dielectrics will be necessary for continued scaling in the microelectronics industry, and atomic layer deposition is a likely technology for growth of such films. A phenomenological mathematical model of atomic layer deposition has been developed and applied to a large body of HfO2 growth data. The model is based on classical chemical kinetics theory, and assumes that OH groups are the nucleation sites for film growth. Two differential equations, one describing the deposition rate of HfO2 per cycle, and another the creation rate of new OH groups per cycle, completely describe the atomic layer deposition process. The entire body of HfO2 growth data can be explained by the model: linear growth behavior in the presence of large initial OH concentrations such as are present on chemical oxides; the ∼17 steric hindrance factor for linear growth, based on the size of the tetrahedral HfCl4 molecule, and a combination of adsorption modes; initial parabolic growth behavior in the presence of small initial OH concentrations such as are present on hydrogen (H)-terminated Si; and the transition from nonlinear to linear growth behavior after about 80 cycles of growth on H-terminated Si. Although applied to HfO2, for which the largest body of nucleation and growth data for thin atomic layer deposited films on differently treated substrate surfaces exists, the model is completely general and can describe any atomic layer deposition process. This is a comprehensive model of the atomic layer deposition process.

MOSFET gate leakage modeling and selection guide for alternative gate dielectrics based on leakage considerations

In this paper, we explore the scaling limits of alternative gate dielectrics based on their direct-tunneling characteristics and gate-leakage requirements for future CMOS technology generations. Important material parameters such as the tunneling effective mass are extracted from the direct-tunneling characteristics of several promising high-/spl kappa/ gate dielectrics for the first time. We also introduce a figure-of-merit for comparing the relative advantages of various gate dielectrics based on the gate-leakage current. Using an accurate direct-tunneling gate-current model and specifications from the International Technology Roadmap for Semiconductors (ITRS), we provide guidelines for the selection of gate dielectrics to satisfy the projected off-state leakage current requirements of future high-performance and low-power technologies.

Rapid thermal annealing effect on crystalline yttria-stabilized zirconia gate dielectrics

Crystalline yttria-stabilized zirconia (YSZ) gate dielectrics have been successfully fabricated on silicon wafers. By carefully controlling the annealing condition, the crystalline YSZ gate dielectrics show promising performances following the rapid thermal annealing process. The equivalent electrical oxide thickness only increases about 2.0 Å after annealing in O2 gas, while the leakage current decreases by more than two orders of magnitude compared with that of as-deposited samples. The results indicate that zirconia is potentially an alternative gate dielectrics for application in present silicon-based technology.

Thermally Grown and Reoxidized Nitrides as Alternative Gate Dielectrics

ABSTRACTThe use of high-k materials as gate dielectric still meets a lot of unsolved problems such as thermal instability during post deposition anneals resulting in the formation of interfacial oxide layers or bad process compatibility. As long as these requirements are not accomplished alternative gate dielectrics have to be formed by oxynitrides or gate stacks built of oxynitrides and some high-k material. In order to achieve a low equivalent oxide thickness (EOT) it is necessary to grow homogeneously thin oxynitrides which are nitrogen-rich and which have a high interface quality. Therefore we have studied the growth of thin nitrides and oxynitrides (EOT = 1 – 2nm) formed by rapid thermal nitridation in NH3 and wet reoxidation. By varying the partial pressure of NH3 in the process gas ambient NH3/Ar the nitride quality could be optimized: it was found that an optimized ratio of NH3 and Ar during nitridation improves the electrical properties of the nitrides and oxynitrides significantly. Interface state densities as low as those of dry thermal oxides and leakage current densities reduced by four orders of magnitude compared to SiO2 of the same EOT have been obtained. Due to the high incorporation of nitrogen into the oxynitride by rapid thermal nitridation and following oxidation the leakage current densities are also lower than those of most oxynitrides reported in literature. In addition we present data concerning the suppression of boron diffusion from p+ poly-Si electrodes. In summary the developed oxynitrides are suitable to bridge the gap between common SiO2 and new alternative gate dielectrics or to form gate stacks in combination with high-k materials.

HfO 2 and ZrO 2 alternative gate dielectrics for silicon devices by liquid injection chemical vapour deposition

Capacitance-voltage measurements are reported on MOSC devices with ZrO2 and HfO2 gate dielectrics fabricated using novel zirconium and hafnium alkoxide volatile mononuclear complexes. These complexes are significantly less reactive to air and moisture than existing Zr and Hf alkoxides. Feasibility is shown of using this liquid injection chemical vapour deposition method with these precursors for high-k gate dielectric realisation for submicron MOS devices.

Direct tunneling leakage current and scalability of alternative gate dielectrics

We explore the scaling limits of alternative gate dielectrics based on their direct tunneling characteristics and gate leakage requirements for future complementary metal–oxide–semiconductor technology generations. Important material parameters such as the tunneling effective mass are extracted for several promising high-κ gate dielectrics. We also introduce a figure of merit for comparing the relative advantages of gate dielectric candidates. Using an accurate direct tunneling gate current model and specifications from the International Technology Roadmap for Semiconductors, we provide guidelines for the selection of gate dielectrics to satisfy the off-state leakage current requirements of future high-performance and low power technologies.

Ultrathin gate oxide reliability: physical models, statistics, and characterization

The present understanding of wear-out and breakdown in ultrathin (t/sub ox/ < 5.0 nm) SiO/sub 2/ gate dielectric films and issues relating to reliability projection are reviewed in this article. Recent evidence supporting a voltage-driven model for defect generation and breakdown, where energetic tunneling electrons induce defect generation and breakdown will be discussed. The concept of a critical number of defects required to cause breakdown and percolation theory will be used to describe the observed statistical failure distributions for ultrathin gate dielectric breakdown. Recent observations of a voltage dependent voltage acceleration parameter and non-Arrhenius temperature dependence will be presented. The current understanding of soft breakdown will be discussed and proposed techniques for detecting breakdown presented. Finally, the implications of soft breakdown on circuit functionality and the applicability of applying current reliability characterization and analysis techniques to project the reliability of future alternative gate dielectrics will be discussed.

Alternative Gate Dielectrics for Microelectronics

AbstractThis brief article sets the context for the March 2002 issue of MRS Bulletin focusing on Alternative Gate Dielectrics for Microelectronics. Contributors are several experts from industry and academia engaged in the search for manufacturable solutions for a suitable alternative gate dielectric to SiO2 using high-dielectric-constant (high-ĸ) materials. Issues discussed in the articles include thermodynamics criteria for materials selection, materials interactions in the construction of the transistor gate stack, characterization of alternative materials, determination of suitable band offsets for candidate dielectrics, and integration of these alternative gate dielectrics in a manufacturable environment.

A Thermodynamic Approach to Selecting Alternative Gate Dielectrics

AbstractAs a first step in the identification of suitable alternative gate dielectrics for metal oxide semiconductor field-effect transistors (MOSFETs), we have used tabulated thermodynamic data to comprehensively assess the thermodynamic stability of binary oxides and nitrides in contact with silicon at temperatures from 300 K to 1600 K. Sufficient data exist to conclude that the vast majority of binary oxides and nitrides are thermodynamically unstable in contact with silicon. The dielectrics that remain are candidate materials for alternative gate dielectrics. Of these remaining candidates, the oxides have a significantly higher dielectric constant (ĸ) than the nitrides. We then extend this thermodynamic approach to multicomponent oxides comprising the candidate binary oxides. The result is a relatively small number of silicon-compatible gate dielectric materials with ĸ values substantially greater than that of SiO2 and optical bandgaps ≥ eV.