Gate oxide metrology and silicon piezooptics

Abstract

We describe the use of spectroscopic ellipsometry and other characterization techniques for gate oxide process metrology in manufacturing of CMOS transistors for the 130 nm node and beyond. Specifically, we describe the difficulties associated with the introduction of silicon-on-insulator (SOI) substrates, alternative gate dielectrics (silicon oxynitride or metal oxides), and strained Si channels. We predict that spectroscopic ellipsometry by itself will no longer be sufficient for gate oxide metrology, which will make the CMOS gate stack process much more difficult to control.