After Etch Inspection Research Articles

EUV Metal Oxide Resist Development Technology for Improved Sensitivity, Roughness and Pattern Collapse Margin for High Volume Manufacturing

One of the critical challenges for delivering next nodes or high-NA extreme ultraviolet (EUV) lithography to high volume manufacturing (HVM) in the semiconductor industry is to have a high-performance EUV resist process. The high-performance resist process needs to simultaneously meet multiple requirements, such as high resolution, high sensitivity, low roughness, a low defect level, and good global CD uniformity (CDU). In this paper, we will introduce a new wet development (DEV) method to improve the performance of metal oxide resists (MOR), which is named ESPERTTM** (Enhanced Sensitivity develoPER Technology). This newly invented method can meet multiple requirements together where it is not possible with the conventional development method. With 36 nm pitch pillar patterns, we have confirmed with after etch inspection (AEI) data that the new method produced 22% improvement in EUV dose and 7% improvement in LCDU, simultaneously. No pattern collapse was observed at least up to 15.4 nm pillar size. In the case of 30 nm pitch line/space (L/S) pattern, the improvements were 26% in EUV sensitivity and 12.3% in LWR also with AEI results. Furthermore, the new method could also shift the bridging cliff 0.5 nm to the larger line CD while its global CDU was improved 2.6 times. The new data achieved by the new wet development method make us believe that MOR are mostly ready for HVM and this new method is also aiming to be used in high NA EUV lithography in the near future.**) ESPERTTM is trademarks of Tokyo Electron Limited.

Review of scanning electron microscope-based overlay measurement beyond 3-nm node device

Overlay control has been one of the most critical issues for manufacturing of leading edge semiconductor devices. Introduction of the double patterning process requires stringent overlay control. Conventional optical overlay (Opt-OL) metrology has technical challenges with measurement robustness, solving overlay discrepancy between overlay mark and device pattern, and measuring smaller marks laid out in large numbers within the die accurately for high-order correction. In contrast, scanning electron microscope-based overlay (SEM-OL) metrology can directly measure both overlay targets and actual devices or device-like structures on processed wafers with high spatial resolution. It can be used for reference metrology and optimization of Opt-OL measurement conditions. SEM-OL uses small structures, including actual device patterns, which allows insertion of many SEM-OL targets across a die. Precise overlay distribution can be measured using dedicated SEM-OL mark, improving measurement accuracy and repeatability. To extend SEM-OL capability, we have been developing SEM-OL techniques that can measure not only surface patterns by critical dimension SEM but also buried patterns for leading edge device processes. There are two techniques to detect buried patterns. One is to use high-acceleration voltage SEM, which detects backscattering electron emphasizing material contrast. It has been adopted for overlay measurements for memory and logic devices at after-etch inspection or even after-develop inspection. The other is to utilize charging effect, which reflects voltage contrast at the surface depending on the material properties of underneath structure. SEM-OL measurement using transient voltage contrast has been developed and its capability of overlay measurement has been proven. An overlay measurement algorithm using template matching method has been developed and was applied to dynamic random access memory (DRAM) process monitor in manufacturing. In order to extend SEM-OL metrology to beyond 3-nm node logic and cutting-edge DRAM devices (half pitch = 14 nm), we are improving measurement precision of detecting buried patterns and measurement throughput by developing optimized SEM-OL mark.

Influence of e-beam aperture angle on critical dimensions-scanning electron microscopes measurements for high aspect ratio structure

The influence of the e-beam aperture angle on the critical dimensions (CD)-scanning electron microscope measurements for a high aspect ratio (AR) structure is investigated. The Monte Carlo simulator JMONSEL is used for evaluating the measurement sensitivity to the variation in the bottom CD. The aperture angle of the primary electron greatly influences the measurement precision of the bottom CD in the high AR structure. Then, we applied an energy-angular selective detection technique to the Monte Carlo simulation results and found that the measurement sensitivity for the large aperture angle was improved. In addition, the experimental results are qualitatively consistent with the results of the Monte Carlo simulation. These results indicate that the energy-angular selective detection technique is effective for improving the measurement resolution of CD at trench bottom of a high AR structure and the technique is also useful for the overlay measurement during after-etch inspection.

Device-correlated metrology for overlay measurements

One of the main issues with accuracy is the bias between the overlay (OVL) target and actual device OVL. In this study, we introduce the concept of device-correlated metrology (DCM), which is a systematic approach to quantify and overcome the bias between target-based OVL results and device OVL values. In order to systematically quantify the bias components between target and device, we introduce a new hybrid target integrating an optical OVL target with a device mimicking critical dimension scanning electron microscope (CD-SEM) target. The hybrid OVL target is designed to accurately represent the process influence on the actual device. In the general case, the CD-SEM can measure the bias between the target and device on the same layer after etch inspection (AEI) for all layers, the OVL between layers at AEI for most cases and after develop inspection for limited cases such as double-patterning layers. The results have shown that for the innovative process compatible hybrid targets the bias between the target and device is small, within the order of CD-SEM noise. Direct OVL measurements by CD-SEM show excellent correlation between CD-SEM and optical OVL measurements at certain conditions. This correlation helps verify the accuracy of the optical measurement results and is applicable for the imaging base OVL method using several target types advance imaging metrology, advance imaging metrology in die OVL, and the scatterometrybase OVL method. Future plans include broadening the hybrid target design to better mimic each layer process conditions such as pattern density. Additionally, for memory devices we are developing hybrid targets which enable other methods of accuracy verification.

Optical Critical Dimension Measurement for AEI Structures at Sub 65 Nm Node

In this work, Optical Critical Dimension (OCD) spectroscopy was used to monitor the critical dimension for After-Etch Inspection (AEI) structures at sub 65 nm node, such as Poly Gate, Shallow Trench Isolation, Offset Spacer, and Oxide-Nitride Spacer. The dynamic repeatability of the measurement was obtained through a 10-cycle measurement process with loading and unloading wafers. The long-term stability was examined with more than 3 day’s measurements. The good correlation results between the OCD spectroscopic tool and reference tools, such as, CD Scanning Electron Microscope and Transmission Electron Microscopy, were obtained. The results demonstrated that the OCD spectroscopic tool has advantages of high precision and high stability for 65 nm node and beyond.

Critical Dimension Measurement Using OCD Spectroscopy for Gate and STI AEI Structures

In this work, optical critical dimension (OCD) spectroscopy was used to monitor the critical dimension for gate and STI AEI (After-Etch Inspection) structures. The reference measurements with CD-SEM (CD Scanning Electron Microscope) and TEM (Transmission Electron Microscopy) were also carried out. The OCD results show high precision, high stability and good correlation. This work demonstrates the capability of the OCD as an important metrology technique for IC process control.