Abstract
One of the main issues with accuracy is the bias between the overlay (OVL) target and actual device OVL. In this study, we introduce the concept of device-correlated metrology (DCM), which is a systematic approach to quantify and overcome the bias between target-based OVL results and device OVL values. In order to systematically quantify the bias components between target and device, we introduce a new hybrid target integrating an optical OVL target with a device mimicking critical dimension scanning electron microscope (CD-SEM) target. The hybrid OVL target is designed to accurately represent the process influence on the actual device. In the general case, the CD-SEM can measure the bias between the target and device on the same layer after etch inspection (AEI) for all layers, the OVL between layers at AEI for most cases and after develop inspection for limited cases such as double-patterning layers. The results have shown that for the innovative process compatible hybrid targets the bias between the target and device is small, within the order of CD-SEM noise. Direct OVL measurements by CD-SEM show excellent correlation between CD-SEM and optical OVL measurements at certain conditions. This correlation helps verify the accuracy of the optical measurement results and is applicable for the imaging base OVL method using several target types advance imaging metrology, advance imaging metrology in die OVL, and the scatterometrybase OVL method. Future plans include broadening the hybrid target design to better mimic each layer process conditions such as pattern density. Additionally, for memory devices we are developing hybrid targets which enable other methods of accuracy verification.
Highlights
Overlay (OVL) continues to be one of the key challenges for lithography in semiconductor manufacturing, especially in light of the accelerated pace of device node shrinks, and the continuous delay in extreme ultraviolet lithography
Among all the methods with excellent accuracy and device correlation, the only one which has high volume manufacturing (HVM) ease of use is utilizing critical dimension scanning electron microscope (CD-SEM) OVL targets integrated into the optical targets
When approaching the issue of verifying the optical OVL measurements, one needs to take into account that the CD-SEM has its own error budget
Summary
Overlay (OVL) continues to be one of the key challenges for lithography in semiconductor manufacturing, especially in light of the accelerated pace of device node shrinks, and the continuous delay in extreme ultraviolet lithography. According to the ITRS Roadmap, the 20-nm node requires a 4-nm OVL for critical layers. This is a very tight OVL challenge by itself. Another OVL accuracy challenge is emerging due to the difference between the OVL of the metrology target versus the OVL of the actual device. There are several practical difficulties to achieve the exact same OVL for the device by measuring the OVL of an OVL target. One difficulty is that the current OVL measurement is performed on an OVL target, not on the actual device pattern. Since the design of the device pattern is different from previous generation OVL targets, the lithographic influence, e.g., image placement error and
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