AMOLED Research Articles

Gate Driver on Array With Multiple Outputs and Variable Pulse Widths for Low-Temperature Polysilicon and Oxide (LTPO) TFTs Driven AMOLED Displays

A gate driver on array (GOA) circuit was proposed for low-temperature polysilicon and oxide (LTPO) thin-film transistor (TFT) hybrid-driven active matrix organic light-emitting diode (AMOLED) displays with both high and low refresh rate operation. The GOA generates multiple types of scanning signals by reusing shift registers so that three signal pulses are output parallelly within a single stage to scan p- and n-type switching TFTs and emission TFT of the AMOLED pixels, respectively, leading to a 30% reduction in the layout area. Furthermore, the pulse-width of the scan signals for the emission TFT can be programed simply by changing the number of input pulses to vary refresh rates. The fabricated GOAs work well even with the pulse width reduced to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2.9 \mathbf {\mu }\text{s}$ </tex-math></inline-formula> .

Analysis of heat diffusion considering driving images on 6-inch flexible AMOLED display

We report the heat diffusion on flexible active-matrix organic light-emitting diode (AMOLED) displays. Two-dimensional heat diffusion is used for the heat conduction and convection analysis, generated on the surface of a flexible AMOLED display. The heat diffusion parameters and the time constant are studied in terms of the driving conditions of a 6-inch flexible AMOLED display. The temperature distribution on the screen is obtained by applying heat diffusion using the finite difference method (FDM) with an FPGA driving board. We can predict temperature more precisely by calculating temperature changes according to the images. The proposed method improves the accuracy of predicting the temperature. The average and standard deviation of the temperature error (TER) are ∼0.5°C and ∼0.5°C for the proposed method, respectively. For the conventional method, the values are ∼4.5°C and ∼0.7°C, respectively, neglecting the increase in temperature based on the images. This method can be used in compensation technology for OLEDs and thin film transistors (TFTs) that require accurate temperature distribution on the screen.

Emission Gate Driver With Five Low-Temperature Poly-Si Oxide TFTs Without Capacitor for Narrow-Bezel AMOLED Display

We report a highly simplified emission (EM) gate driver circuit for high resolution and narrow bezel active-matrix organic light emitting diode (AMOLED) display using low-temperature poly-Si oxide (LTPO) thin film transistors (TFTs). The proposed circuit consists of five TFTs, three low-temperature poly-Si (LTPS) and two oxide TFTs. The output signal can be controlled with variable pulse width by starting signal of different pulse width. The fabricated circuit operates well with depletion mode oxide TFTs having threshold voltage of -3.5 V. The output swing from 3 V to -7 V and peak to peak voltage of 10 V were used for the output measurement. The output signals with different duty ratio of 10, 50, and 90% are demonstrated. The power consumption is only 41.5 mW when the duty ratio of EM signal is 90% at refresh rate of 120 Hz for 4k (3840 × 2160) AMOLED display.

A New External Compensation method for AMOLED Display

A New External Compensation method for AMOLED Display

Using angle-selective optical film to enhance the light extraction of a thin-film encapsulated 3D reflective pixel for OLED displays.

Light extraction improvement is still an important issue for active-matrix organic light-emitting diode displays (AMOLEDs). In our previous work, a three-dimensional (3D) reflective pixel configuration embedding the OLED in the concave 3D reflector and patterned high-index filler had been proposed for significant enhancement of the pixel light extraction. In this work, influences of thin film encapsulation (TFE) on light extraction of such reflective 3D OLED pixels are considered as well by simulation studies. Unfortunately, the optical simulation reveals strong reduction of the light extraction efficiency induced by TFE layers. As such, an additional angle-selective optical film structure between the pixel and the encapsulation layers is introduced to control the angular distribution of the light coupled into the encapsulation layers and to solve TFE-induced optical losses. As a result, TFE-induced losses can be substantially reduced to retain much of light extraction efficiency. The results of this study are believed to provide useful insights and guides for developing even more efficient and power-saving AMOLEDs.

A mirrored 5T1C OLED pixel circuit for compensating characteristics variations and voltage drop

A pixel circuit with p-type low temperature poly-silicon thin-film transistors (TFTs) is presented for active-matrix organic light-emitting diode displays. This circuit consists of five TFTs and one capacitor. In the circuit, the characteristics, i.e., the threshold voltage and the mobility, are extracted by the mirroring structure, and an adaptive voltage is generated at the gate of the TFT in the programming stage. Therefore, only one capacitor is needed to compensate both the threshold voltage variation and the mobility variation. Meanwhile, in the circuit, the voltage drop of the power line is also compensated. Moreover, the circuit can prevent the image flicker because the organic lighting-emitting diode (OLED) only operates in the emission stage. The circuit simulation results indicate that the OLED current error rates are lower than 4.61% when the threshold voltage variation is ±0.5V, lower than 6.92% when the mobility variation is ±30%, and lower than 3.96% when the voltage drop is −0.5V.

Mechanical simulation for the bending process of the AMOLED panel pad

Panel pad bending is a critical process to improve the screen-to-body ratio of an active-matrix organic light-emitting diode (AMOLED) panel. The failure analysis of the metal wirings is the key to ensure the reliability of signal transmission when the pad be bent to the back of the panel. In the present work, the sub-modeling technique combined with the periodic boundary condition was used to simulate the stress distribution of the bending area of the pad. The progressive failure of bent metal wirings was investigated by the extended finite element method. It is proved to be rational to prevent the wirings damage if the interlayer dielectric is replaced by an organic layer. In order to reduce stress of metal wirings, it is a measure to replace the original ultraviolet (UV) curable adhesive with a higher-modulus UV adhesive. The simulated results also show that rectangular perforations can avoid the stress concentration caused by the holes compared with circular perforations. For better stress distribution of metal wirings, it is necessary to increase the lengths of the rectangular holes and decrease the widths of that to a certain extent, which is helpful for restraining crack propagation by means of low-stress zones and holes.

(Invited) Short Channel Coplanar Amorphous-Indium-Gallium-Zinc-Oxide Thin-Film Transistors on Polyimide Substrate for High Resolution Displays

High-resolution active-matrix organic light-emitting diode (AMOLED) thin-film transistor (TFT) backplane with lower power consumption is needed for augmented reality (AR) applications. The near-to-eye format of AR terminals needs facing several technical challenges, such as higher optical efficiency, wider field of view, lighter weight, and smaller size to accelerate widespread applications. For these reasons, downscaling of TFTs with amorphous-indium-gallium-zinc-oxide (a-IGZO) or LTPS is required. The channel length should be less than 1 μm and the flexible substrate is better than glass because of light weight and very thin structure. TFT technologies on polyimide (PI) substrate can support the applications for foldable and rollable displays. For flexible AMOLED, PI layer of 10 to 20 um is widely used for foldable displays. The PI layer is coated by slot coating on the top of a carrier glass with a buffer layer of carbon nanotubes (CNTs) and graphene oxide (GO) mixture coated by spray. This layer can reduce the adhesion force between PI and glass and thus mechanical detachment can be possible. The CNTs are conducting so that it can release the electrostatic discharge (ESD) damage because CNTs/GO layer exists on the bottom side of the PI substrate. The PI substrate is covered by SiO2 and ZrAlOx layers (five layers in total starting with SiO2) by plasma enhanced chemical vapor deposition and spray pyrolysis, respectively, which acts as a gas barrier. The amorphous ZrAlOx film by spray coating can be used as a high-k gate insulator and also a gas barrier. The threshold voltage of a-IGZO TFTs tends to shift toward negative gate voltage with decreasing the channel length. In this work, a ZrAlOx passivation layer is introduced for the short channel, coplanar a-IGZO TFT. A very thin ZrAlOx layer is deposited by spray pyrolysis on the top of a-IGZO TFT at the substrate temperature of 350 ℃ before interlayer deposition. The a-IGZO TFT with a very thin ZrAlOx layer exhibits the stable threshold voltage dependence with decreasing the channel length. The 0.8 μm channel length a-IGZO TFT with ZrAlOx layer by spray pyrolysis at the substrate temperature of 350 ℃ exhibits the field-effect mobility of 7.09 cm2 V-1 s-1, the threshold voltage of -0.6 V, and on/off current ratio of 3.3 × 107. The formation of Zr-O bonds on the a-IGZO surface region reduces the carrier concentration in the a-IGZO TFT offset region, between source/drain contact and the channel, and blocks the carrier diffusion into the channel. This is the first reported self-aligned coplanar a-IGZO TFT under 1 μm channel length on a flexible substrate. Figure 1

High-Speed Shift Register with Dual-Gated Thin-Film Transistors for a 31-Inch 4K AMOLED Display.

In this work, a promising dual-gated thin film transistor (TFT) structure has been proposed and introduced in the shift register (SR)-integrated circuits to reduce the rising time. The threshold voltage can be simultaneously changed by the top gate and the bottom gate in the proposed dual-gated TFTs. When the SR circuits start to export the scan signals in the displays, the driving currents in the SR circuits are increased by switching the working station of driving TFTs from the enhancement characterization to the depletion characterization. Subsequently, the detailed smart spice simulation has been used to study the function of the proposed SR circuits. In the next step, the proposed SR circuits have been fabricated in a G4.5 active-matrix organic light-emitting diode manufacture factory. The simulated and experimental results indicate that the shift register pulses with the full swing amplitude can be obtained in the SR circuits. Moreover, in contrast to the conventional SR circuits employing with the single-gated TFTs, it has been found that the rising time of the output signals can be reduced from 3.75 μs to 1.23 μs in the proposed SR circuits with the dual-gated TFTs, thus exhibiting the significant improvement of the driving force in the proposed SR circuits. Finally, we demonstrated a 31-inch 4K AMOLED display with the proposed SR circuits.

12.2: High Performance AMOLED Pixel Circuit Using Interleaved Emit Signals Based on Low‐Temperature Poly‐Si and Oxide (LTPO) TFTs

A concise pixel circuit with interleaved Emit signals is proposed for active matrix organic light‐emitting diode (AMOLED) displays, on the basis of low‐temperature polycrystalline silicon oxide (LTPO) TFTs. The oxide TFT can be re‐used for both initialization and threshold voltage extraction periods, using interleaved Emit signals of adjacent lines with overlapped waveforms. The proposed pixel circuit consists of 1 oxide TFT and 5 p‐type LTPS TFTs, while only 2~3 types of line‐by‐line scanning driving signals, i.e. the Emit signal and the Scan signal, are required. Implementation of the proposed pixel circuit shows that the occupation can be reduced to 40 μm × 56.7 μm. Furthermore, optimization of the pixel circuit shows the emission current error is less than 2.3% with threshold voltage variation of ± 0.5 V, while refresh rate from 1 to 120 Hz can achieved.

P‐4.2: De‐Mura Processing Integrated in Display Drivers for AMOLED Display

High‐performance Mura artifact reduction (De‐Mura) processing is developed and integrated in display drivers for raising panel yield. The proposed De‐Mura processing, designed to compensate an active‐matrix organic light‐emitting diode (AMOLED) panel's luminance Mura (L‐Mura) and color Mura (C‐Mura), shows excellent display performance, and the major display properties include a diminished luminance nonuniformity from about 50% to about 10% under different gray levels, and an improved visually imperceptible color nonuniformity. Among 500 pieces of 5.83” (1128×2436, 460 PPI) retina AMOLED panels, panel yield is improved up to 96.8%. Our works reveals an effective external De‐Mura solution integrated in display drivers for panel factories and module suppliers to obtain high panel yield.

P‐13.8: The Effect Analysis of FMM Tension Wrinkle According to the Shape Parameters of Pixel Slot Arrangement

P‐13.8: The Effect Analysis of FMM Tension Wrinkle According to the Shape Parameters of Pixel Slot Arrangement

10.2: 31‐inch AMOLED Display with T/G IGZO Oxide Backplane produced in the Gen.11 line

A top gate IGZO TFT back panel for AMOLED display was fabricated on the G11 substrate, which exhibits excellent electrical properties and uniformity, the performance can meet the electrical requirements for large‐size display devices. The 108 points measurement was carried out to evaluate the Vth distribution on the G11 substrate, which shows the Vth range is ‐0.5V~0.5V, also the ΔVth under PBTS and NBTiS for 1 hour on the G11 substrate are less than +0.59 V and −0.22 V, respectively. Finally, we have successfully demonstrated a 31‐inch OLED display driven by the backplane produced in the G11 facility.

Effect of Interlayer Stress on U Bends and Water Droplet Bends

The interlayer stress (IS) analysis of the flexible active-matrix organic light-emitting diode (AMOLED) panel is critical for decreasing the stress concentration and reducing the risk of overall screen failure. This article relies on the linear elastic models of ABAQUS to simulate finite element analysis of foldable panels. This article discussed three sensitive locations of the flexible AMOLED panel caused by two different bending methods including U bends and water droplet bends. The finite element method for simulating the layer analysis was constructed to analyze the effect of optically clear adhesive (OCA) film thickness on the distribution of stress and strain. The module can be optimized by changing the thickness and shear modulus of OCA. With the decrease of OCA thickness and the increase of stiffness, the maximum stress of the organic light-emitting diode (OLED) layer is decreased by 20% which is 55 Mpa; meanwhile, the IS of the entire module is reduced by about 30%.

AMOLED Pixel Circuit Using LTPO Technology Supporting Variable Frame Rate from 1 to 120 Hz for Portable Displays.

This paper proposes a new 6T1C pixel circuit based on low-temperature polycrystalline oxide (LTPO) technology for portable active-matrix organic light-emitting diode (AMOLED) displays with variable refresh rates ranging from 1 to 120 Hz. The proposed circuit has a simple structure and is based on the design of sharing lines of switch-controlling signals. It also provides low-voltage driving and immunity to OLED degeneration issues. The calculation and analysis of programming time are discussed, and the optimal storage capacitor for the proposed circuit’s high-speed driving is selected. The results of the simulation reveal that threshold voltage variations in driving thin-film transistors of ±0.33 V can be well sensed and compensated with a 1.8% average shift of OLED currents in high-frame-rate operation (120 Hz), while the maximum variation in OLED currents within all gray levels is only 3.56 nA in low-frame-rate operation (1 Hz). As a result, the proposed 6T1C pixel circuit is a good candidate for use in portable AMOLED displays.

LTPS Pixel Driving Scheme to Improve Motion Blur for AMOLED Displays

This article proposes a new driving scheme based on an n-type low-temperature polycrystalline silicon (LTPS) four-transistor-two-capacitor (4T2C) pixel circuit to improve the quality of motion images of active matrix organic light-emitting diode (AMOLED) displays. The proposed driving scheme can prevent the effect of the lateral leakage current flowing through the OLED common layer by keeping the pixels in the upper and lower row lines in a nonemitting hold period during the program period. The simulation results show that all RGB colors maintain a shooting amount ratio (SAR) below 1% from the first frame when the image is switched from black to white, even for a concentration of the high p-doped hole transport layer (p-HTL). In addition, the parasitic capacitances of the 4T2C pixel circuit that causes OLED current errors are thoroughly analyzed for high luminance uniformity. A 1.5-in 326 pixels per inch (PPI) AMOLED panel based on the proposed driving scheme was fabricated. The results of our measurements show that the SARs of RGB colors are 0.8%, 0.2%, and 0.9%, respectively, and the average <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${x}$ </tex-math></inline-formula> -coordinate shift of the color is 0.007 during the transition between black and white images due to the effective suppression of the lateral leakage current. Therefore, we demonstrate that the proposed driving scheme is suitable for AMOLED displays that require high-quality motion images.

Lopsided Schumpeterian competition and the superstar firm phenomenon in OLED flat-panel displays

ABSTRACT Lopsided Schumpeterian competition and the emergence of ‘superstar’ firms are examined in the flat-panel display industry, where the difficulty of commercialising active-matrix OLED (AMOLED) flat panels led to patterns of innovation and competition vastly dissimilar to those that had prevailed in Liquid Crystal Display (LCD) flat panels. Applying the concept of a Schumpeterian ‘Ultra-Mark II’ technological regime, the study sheds light on how superstar firms build industry dominance through R&D and the building of exclusive supplier networks when their industry (or a certain segment of it) morphs into a quasi-monopolistic type of arena.

Vertical Oxide Channel Thin Film Transistor for Ultra-High-Resolution Display

The significance of backplane devices for ultra-high-resolution (UHR) display has increased with the recent development of augmented reality (AR) and virtual reality (VR) devices. Since the human visual resolution can distinguish up to 60 pixels per degree (PPD), the AR/VR device panel needs at least 3000 pixels per inch (PPI) to exceed the human retina resolution limit for clear display without screen effect. As a results, the unit pixel pitch of thin film transistor (TFT) for UHR display should be not only smaller than a few micrometers (~3 μm), TFT channel length should also be sub-micrometers level. In active matrix organic light emitting diode (AMOLED) display type, self-aligned top gate (SATG) TFT has been widely used as a planar backplane device structure because of its low parasitic capacitance and tolerance of illumination degradation caused by the light from emitting layer [1-2]. However, SATG TFT has fundamental disadvantages for device miniaturization due to its essentially required area of metallization region for reducing contact resistance and scaling limit of channel induced by carrier diffusion shrinking effective channel length. For this reason, we suggested a size tunable oxide channel VTFT structure that can achieve a high pixel density on account of structural benefit on device footprint.In this work, we fabricated amorphous indium gallium zinc oxide (a-IGZO) based VTFT. The previously published VTFT structure, channel length is determined by the thickness of spacer between source and drain electrodes [3]. Owing to spacer etching process, uneven backchannel roughness and high off current has become well-known issues of VTFT. On the contrary, the proposed VTFT structure has a controllability of effective channel aspect ratio because source and drain electrodes are able to be patterned by photolithography process. Furthermore, the parasitic capacitance is also relatively less than the formerly reported VTFTs controlled by inevitable thickness limit structurally due to the electrodes.To sum up, we not only realized the oxide channel VTFT that meets high performance for AR/VR display, but opened new application possibility to UHR electronic devices platform. Figure 1. (a) Schematic of the proposed VTFT (b) Transfer characteristic of VTFT Acknowledgement This work was supported by the Korea Evaluation Institute of Industrial Technology(KEIT) grant funded by the Korea government (MOTIE) (No. 2021-11-1283) References Kang, Dong Han, et al. "Self-aligned coplanar a-IGZO TFTs and application to high-speed circuits." IEEE electron device letters 32.10 (2011): 1385-1387.Wang, Guoying, et al. "8.3: High Stability Against Light and Heat Based on the Top Gate Self‐Aligned a‐IGZO TFTs under OLED Dislplay." SID Symposium Digest of Technical Papers. Vol. 49. 2018.Petti, Luisa, et al. "Flexible quasi-vertical In-Ga-Zn-O thin-film transistor with 300-nm channel length." IEEE Electron Device Letters36.5 (2015): 475-477. Figure 1

Numerical simulation theory and structural optimization of a flexible AMOLED module subjected to the impact of a falling ball

When the flexible active-matrix organic light-emitting diode (AMOLED) module is subjected to external impact, the key display device is easily damaged, so it is necessary to optimize the module structure to improve the impact resistance of the module. The adhesives in the module make the structural optimization of the module extremely complicated. In this paper, the viscoelastic and hyperelastic constitutive models of adhesives are established, and the method of simplifying the simulation model of the impact test is studied. Through the attenuation of the stress wave in the transmission, the reason why the dead pixels appear in the center of the module impacted by the ball is explained. According to the actual result that the area of dark spots does not expand with time, it is inferred that the AMOLED layer is damaged, and the maximum principal strain of that is extracted for analysis. In order to ensure the impact resistance of the module, the thickness of each layer should be increased to a certain extent. Slightly increasing the modulus of the film on the upper side of the AMOLED layer is likely to reduce the impact resistance of the module, whereas greatly increasing the modulus of that can improve the impact resistance of the module. An experimental method for determining the critical height of the falling ball is proposed, and it proves that the simulation theory and the optimization scheme are reasonable.

P‐1: Uni‐Color Column Line Pentile‐Type Pixel Arrangement Design for Low Driving Power Consumption AMOLED Displays

As active‐matrix organic light emitting diode (AMOLED) displays have rapidly become the primary choice for high performance mobile devices, reducing their power consumption to enable long battery life continues to be a very important challenge. In particular, the power consumption required to drive the display electronic circuits has recently increased significantly due to the industry trends for high resolution, high refresh rates, and high screen aspect ratio. In this paper, we propose a uni‐color pixel column design for the typical Pentile‐type pixel arrangement used for AMOLED displays in order to lower the driving power consumption. Considering a QHD+, 6.x inch‐diagonal smartphone application, the estimated power saving benefits of the proposed architecture are 10% for averaged image contents, and up to 42% for red/blue saturated images in the analog driving power consumption.