Active Switched-capacitor Research Articles

Augmented ASC Network for Photo Voltaic Applications

This work uses a DC-DC converter that employs an Active Switched Capacitor (ASC) to provide high gain that makes it appropriate for the Photo Voltaic (PV) system. The transformer less converter with an ASC network consists of a capacitor and a diode that boosts voltage effectively. The well-liked converter operates effectually on both Continuous Conduction Mode (CCM) and Discontinuous Conduction Modes (DCM). The suggested topology of converter is easy to design, and it renders a less stress on auxiliary diode and capacitors. This preferred converter scheme is validated through MATLAB Simulink and the outcomes are confirmed using hardware prototype.

A high step-up non-isolated DC-DC converter with active switched-inductor and switched-capacitor networks

ABSTRACT This article proposes an enhanced non-isolated high-gain DC-DC converter for interfacing renewable energy sources (RESs). This converter utilizes active switched-inductor (ASL) and switched-capacitor (SC) networks in which the ASL network increases the voltage gain. Furthermore, using the SC network as a multiplier cell helps to reach a high voltage conversion ratio with a proper duty cycle. The main advantages of the proposed converter are the high voltage gain, continuous input current, and low voltage stress on the semiconductor switch and the passive component. Since the voltage stress of the semiconductor element is low, a low ON-state resistance switch is used, which leads to reduced conduction losses. Comprehensive analysis of the steady-state operation in continuous conduction mode (CCM), inductor and capacitor design, and a comparison considering other similar topologies are presented in this article. Also, the parasitic elements are assumed to calculate the DC-Voltage gain and the efficiency of the converter. Finally, simulation results are presented in the PSIM environment to validate the feasibility of the proposed converter.

Active Switched-Capacitor Embedded Quasi-Z-Source Inverter and PWM Methods for High Boost Capability and Switching Loss Reduction

This paper proposes a novel topology, named a single-phase active switched-capacitor embedded quasi-Z-source inverter (ASC-EqZSI), and two pulse-width modulation (PWM) methods, namely, PWM1 and PWM2 methods for the proposed ASC-EqZSI topology to improve the boost capability and reduce switching loss. The boost capability can be improved by using an additional non-shoot-through (NST) state, referred to as the NST2 state, besides conventional shoot-through (ST) and NST states. In the NST2 state, the switch in the impedance network is switched on to boost the dc-link voltage while generating the ac output voltage. A PWM1 method is suggested to control both the NST2 and ST time intervals with one carrier signal for improving the boost capability. A PWM2 method aims to reduce the commutation count of the switches and diodes in the proposed topology while maintaining the enhanced boost capability. The switching loss can be reduced by almost 40%. A comparative analysis between the proposed topology with the PWM2 method and five other topologies with an active switched Z-network is performed. The proposed topology with the PWM2 method has a higher ac voltage gain and efficiency with fewer components. Simulation and experimental results are carried out to validate the performances of the proposed topology and PWM methods.

A High Gain DC-DC Boost Converter with Active Switched LC-Network Employing BLDC Motor Drive for Water Pumping

The classical DC-DC boost converter switches has high power rating, since it is the voltage stress on the active switch that is obtained as the output voltage. As a result the conduction loss is increased and the voltage gain is limited accordingly. Active switched LC based high gain boost converter efficiently increases the voltage gain by combination of active switched inductor (ASL) and active switched capacitor(ASC) network. The voltage stresses on the additionally added diode and capacitor is low. In addition, high current transients which is a problem in switched capacitor circuits is also avoided in this topology. This network is used as first stage to generate required dc bus voltage for a BLDC motor drive fed via a three phase voltage source inverter(VSI). The above mentioned system is simulated in MATLAB Simulink environment and satisfactory results are obtained.

An Active Switched-Capacitor Half-Wave Receiver With High Efficiency and Reduced Components in WPT System

There is an increasing attention on wireless power transfer (WPT) technology in many applications. However, for WPT systems, the changing coils distance and variable load make the output power fluctuant. In this article, a switched-capacitor-based half-wave rectifier with active impedance matching ability is proposed in the WPT system to solve the issue. Different from typical half-wave rectifier, the conducting time of the diode in the proposed topology becomes adjustable, making the equivalent impedance controllable. Compared with the universal methods, where an additional dc-dc converter located at the end of the rectifier for power adjustment, fewer components are employed and soft-switching is achieved for the rectifier switch in the proposed topology, leading to lower cost, higher power density, and higher efficiency. In the theoretical analysis, the operation principle is given and the relationship between the diode conducting time and the equivalent load is obtained. A prototype was built to verify the performance of the proposed topology, the experiments agree with the calculation well.

Proposal, Analysis and Experimental Verification of Nonisolated DC-DC Converters Conceived from an Active Switched-Capacitor Commutation Cell

This paper introduces a new family of nonisolated dc-dc converters that are generated by the integration of the active switched-capacitor (ASCC) and the conventional commutation cell (CCC). Based on the commutation cell concept, the new conceived hybrid active commutation cell (HACC) provides three different types of hybrid converters: buck, boost and buck-boost. All three converters are investigated in this study through the following approaches: topological stages, static gain analysis considering the switched - capacitor features,generalization of the HACC and gain for M cells and steady-state analysis. The buck version presents a high conversion rate, which demonstrates that it has potential for step-down applications. To verify the proposed topologies, a prototype was built with the following specifications: 600 V input voltage, 150 V output voltage, 70 kHz switching frequency and 1 kW rated power. Efficiency close to 95% was obtained at 1 kW for the buck topology, which demonstrates that the proposed HACC can provide gain and high efficiency at the same time.

High Step-Up DC–DC Converter With Active Switched <italic>LC</italic>-Network for Photovoltaic Systems

A high step-up DC–DC converter with active switched LC -network is proposed in this paper, which can be used in the photovoltaic system as the front-end stage to generate the required DC bus voltage. Based on the transformerless DC–DC converter with an active switched inductor (ASL) network, this proposed converter introduces an active switched capacitor (ASC) network, where only one capacitor and one diode are added, while the voltage gain is efficiently increased by a compound of ASL and ASC networks. The structure of the proposed converter is simple and voltage stresses on the additional diode and capacitor are low. In addition, unlike other voltage-boosting structures that utilized switched capacitor, the proposed converter avoids the extreme instantaneous currents of capacitor. The detailed analysis of the proposed converter and performance comparison with recently published ASL network-based converters are presented. Finally, a 100 W, 20/200 V prototype circuit is operated to verify its performance.

Improving the Linearity and Power Efficiency of Active Switched-Capacitor Filters in a Compact Die Area

The die size of multistandard wireless transceivers in ultrascaled CMOS is dominated by the baseband low-pass filters (LPFs), which typically count on passive- $RC$ components to define the time constant. To break this area constraint, this paper revisits the active switched-capacitor (SC) LPF for its united benefits of clock-rate-defined bandwidth, accurate cutoff frequency, and small die size due to capacitor-ratio-based sizing and no spare elements. The key challenges of active-SC LPFs are the speed- and linearity-to-power tradeoffs, which are addressed by two circuit techniques: 1) switched-current assisting (SCA) and 2) precharging (PC). The SCA accelerates the charging speed of the integration capacitor, while the PC improves the linearity when charging the load capacitor. Three prototypes (first order, biquad, and fifth-order Butterworth) fabricated in a 65-nm CMOS process validate the feasibility of the proposed SCA and PC techniques.

Development of Multi-Cell Active Switched- Capacitor and Switched-Inductor Z-Source Inverter Topologies

This paper proposes new active switched-capacitor and switched-inductor Z-source inverter (ASC/SL-ZSI) topologies, which can provide a higher boost ability with a small shoot-through time. The proposed ASC/SL-ZSIs inherit all of the advantages of the classical ZSI, and have a stronger voltage boost inversion ability when compared with the classical ZSI. Thus, the output ac voltage quality is significantly improved. In addition, more cells can be cascaded in the impedance network in order to obtain a very high boost ability. The proposed topologies can be applied to photovoltaic or fuel-cell generation systems with low-voltage renewal sources due to their wide range of obtainable voltages. Both simulations and the experimental results are carried out in order to verify performance of the proposed topologies.

A High-Performance PLL With a Low-Power Active Switched-Capacitor Loop Filter

A 2.5-GHz phase-locked loop (PLL) employing a low-power active switched-capacitor loop filter is presented. A subthreshold inverter-based active loop filter is presented and analyzed. Advantages such as type-II loop dynamics, low reference spurs, and small on-chip capacitors are achieved. In addition, 1/f noise of the inverter amplifier can be suppressed by the filter's auto-zeroing operation. The prototype is designed and fabricated in a 0.18- μm CMOS technology. Measurement results show phase noise of -86 dBc/Hz at a 100-kHz offset, -124.0 dBc/Hz at a 3-MHz offset, and a reference spur level of -64 dBc. The PLL consumes about 16 mW with 0.46 mW dedicated to the loop filter active components.

Tunable Bandwidth Third Order Switched-Capacitor with Multiple Feedbacks Filter for Different Center Frequencies

This paper proposes third order tunable bandwidth active Switched-Capacitor filter. The circuit consists of only op-amps and switched capacitors. The circuit is designed for circuit merit factor Q = 10. The proposed circuit implements three filter functions low pass, band pass and high pass simultaneously in single circuit. The filter circuit can be used for both narrow as well as for wide bandwidth. For various values of cut-off frequencies the behaviour of circuit is studied. The circuit works properly only for higher central frequencies, when f0 > 10 kHz.

An Efficient and Accurate DC Analysis Technique for Switched-Capacitor Circuits

A simple but highly accurate method is proposed to find the dc parameters of active or passive switched-capacitor (SC) circuits. It is based on the dc model of a general SC branch.

A novel two-amplifier universal active switched-capacitor filter

A switched-capacitor (SC) filter circuit realizing low-pass (LP), high-pass (HP), and bandpass (BP) transfer functions is described. This circuit uses only two operational amplifiers (OAs) and is bottom-plate stray-insensitive.

The derivation of switched-capacitor filters from active- RC prototypes

A general procedure is given for the design of an active switched-capacitor filter from an actlve-RC model. The process is based on trapezoidal integration. The resulting sampled-data circuit response is related to that of the model through the bilinear z-transformation.