64-bit Block Research Articles

DLSEA-64: dynamic lightweight symmetric encryption algorithm for secure data transmission in IoT based pervasive sensing applications

ABSTRACT Remote patient monitoring, particularly for the elderly, is gaining popularity due to the Internet of Medical Things (IoMT). However, IoMT devices are highly vulnerable to cyber attacks related to data confidentiality. Hence, lightweight cryptographic algorithms are found to be highly necessary to ensure safe data transfer in such devices. This paper introduces a Dynamic Lightweight Symmetric Encryption Algorithm (DLSEA) in order to challenge issues related to real-time data security and privacy. DLSEA is executed on Arduino Uno (ATmega328P) and Arduino Mega (ATmega2560) microcontrollers by using the Proteus simulation tool that employs a 64-bit temporal secret key and a 64-bit block cipher for encryption of data. Several experiments were conducted using payloads of varying sizes to record execution time, energy consumption, RAM usage, ROM usage and avalanche effect. The experiments demonstrated that for data sizes between 128-512 bytes, DLSEA requires 2.49-3.27 ms on the ATmega2560, which is 47% faster than a similar algorithm known as PRESENT. Additionally, DLSEA is 46% more energy-efficient, with RAM usage decreased by 41.81% and ROM usage decreased by 57.19% compared to PRESENT. Experimental results also show that DLSEA satisfies the plaintext sensitivity test, the key sensitivity test, and the rigorous avalanche criteria test (i.e., ~50%).

Enabling low-latency IoT communication for resource-constrained devices with the led cipher and decipher protocol

Block cipher algorithms are crucial for securing applications on resource-constrained devices. This paper introduces the modified light encryption device (MLED) cipher-decipher architecture, specifically designed to accommodate both 64-bit and 128-bit key sizes while maintaining a consistent 64-bit block and data size. MLED comprises 8-step and 12-step processes for MLED-64 and MLED-128 modules, respectively. Each stage involves a four-round operation followed by an add-round key operation. The add constant module (ACM) and mixed column modules (MCMs) within the round operation have been optimized for improved latency and throughput. Performance analysis reveals that MLED-64/128 requires less than 1% of the available slices and operates at 125 MHz on the Artix-7 FPGA. It achieves delays of 7.5 and 12.5 clock cycles for MLED-64 and MLED-128, respectively, translating to throughputs of 1366.5 Mbps and 819.89 Mbps. Additionally, MLED-64/128 exhibits hardware efficiencies of 2.373 and 0.986 Mbps/slice, respectively. Comparative evaluations with existing LED and other block ciphers (BCs) demonstrate that MLED-64/128 achieves significant improvements in latency, throughput, and efficiency, making it a compelling choice for securing resource-constrained IoT applications.

DRcipher: A pseudo-random dynamic round lightweight block cipher

The Internet of Things (IoT) has gained popularity in various fields, including components such as embedded devices and wireless sensors. However, ensuring the security of data transmission from these devices is of critical importance. In light of these challenges, a novel lightweight encryption method called DRcipher is proposed in this paper for resource-constrained IoT devices. DRcipher has a 64-bit block size and supports either 96-bit or 128-bit key sizes. In order to improve the security, DRcipher employs a pseudo-random number of encryption rounds determined by the primary key. DRcipher adopts the structure of Generalized Feistel Network (GFN) with 4 branches, and its round functions consist of F-function, FF-function and RP permutation components. In particular, there is a negative feedback mechanism between the FF-function and the overall round of encryption functions. In addition, DRcipher is synthesised using Synopsys Design Compiler version A-2007.12-SP1 and the UMCL18G212T3 standard cell library. DRcipher-96 has an area footprint of 1546 Gate Equivalents (GE), while DRcipher-128 has a slightly larger area footprint of 1646 GE. Moreover, a comprehensive security analysis shows that the proposed DRcipher ensures high-level security redundancy against differential cryptanalysis, linear cryptanalysis, and so on.

On the dynamic reconfigurable implementations of MISTY1 and KASUMI block ciphers.

Novel hardware architectures for dynamic reconfigurable implementation of 64-bit MISTY1 and KASUMI block ciphers are proposed to enhance the performance of cryptographic chips for secure IoT applications. The SRL32 primitive (Reconfigurable Look up Tables-RLUTs) and DPR (Dynamic Partial Reconfiguration) are employed to reconfigure single round MISTY1 / KASUMI algorithms on the run-time. The RLUT based architecture attains dynamic logic functionality without extra hardware resources by internally modifying the LUT contents. The proposed adaptive reconfiguration can be adopted as a productive countermeasure against malicious attacks with the added advantage of less reconfiguration time (RT). On the other hand, the block architecture reconfigures the core hardware by externally uploading the partial bit stream and has significant advantages in terms of low area implementation and power reduction. Implementation was carried out on FPGA, Xilinx Virtex 7. The results showed remarkable results with very low area of 668 / 514 CLB slices consuming 460 / 354 mW for RLUT and DPR architectures respectively. Moreover, the throughput obtained for RLUT architecture was found as 364 Mbps with very less RT of 445 nsec while DPR architecture achieved speed of 176 Mbps with RT of 1.1 msec. The novel architectures outperform the stand-alone existing hardware designs of MISTY1 and KASUMI implementations by adding the dynamic reconfigurability while at the same achieving high performance in terms of area and throughput. Design details of proposed unified architectures and comprehensive analysis is described.

IVLBC: An Involutive Lightweight Block Cipher for Internet of Things

Nowadays, the use of the Internet of Things has reached a commanding height in a new round of economic and technological upsurge. Its data transmission security has attracted much attention. It is well known that substitution permutation networks (SPNs) ciphers with high diffusion are not advantageous in unified encryption and decryption circuits with extremely resources constrained. Although some research has been carried out to address this issue, there are still insufficiencies. In this article, we propose a new 64-bit lightweight block cipher based on SPN named IVLBC, whose key allows 80 and 128 bits. The components of IVLBC are involutions. In particular, we propose a Feistel with tree structure to obtain a compact and involutive S-box. Also, the nibble-based involutive permutation is proposed to obtain the involutive permutation. Decryption can reuse encrypted code and circuitry in both software and hardware implementations. We prove that the costs of IVLBC are less than PRESENT, PRINCE, Midori, I-PRESENTTM, CRAFT, etc., in unified encryption and decryption circuits. In addition, we conduct other performance tests on IVLBC such as the differential attack, linear attack, integral attack, algebraic attack, invariant attacks, etc.

Description of Image encryption Using AES-256 bits

Abstract: Image Encryption using AES Algorithm is a technique to secure the confidentiality of images. One of the most popular and secure encryption algorithms is the AES (Advanced Encryption Standard) algorithm. It is a symmetric encryption algorithm that encrypts data using a 128-bit block cipher. In this process, the image is first converted into a binary format. Then, a random 128-bit key is generated, which is used to create a sequence of subkeys that will be used for each round of encryption. The binary image is then divided into 128-bit blocks, and the encryption algorithm is applied to each block using the subkeys generated earlier. This process ensures that the image is encrypted securely and is only accessible to those who have the key to decrypt it. One of the advantages of using AES is that it provides a high level of security, making it difficult for hackers to decrypt the encrypted data. Additionally, AES is a fast algorithm and can be implemented easily in hardware or software. The use of AES for image encryption ensures that the image is protected against unauthorized access and provides a secure way of transmitting sensitive images over the internet. Thus we can say that Image Encryption using AES Algorithm is a secure and efficient way to protect the confidentiality of images. It uses AES, a widely used encryption algorithm, to encrypt images securely, making it difficult for hackers to decrypt them without the key.

Development and Study of an Encryption Algorithm

A new symmetric block cipher algorithm called AL02 has been developed. The algorithm scheme provides five-round encryption of 128-bit blocks, while the data size at the input and output of the S-box is 8 bits. The main transformation is the F transformation. The difference between the proposed algorithm and the classical scheme is that the F transformation provides the maximum possible dependence of the output vector bits on the input bits and is based on “modulo 2 addition” and a substitution S-box. To assess the strength of the AL02 algorithm, it was programmatically implemented in the C programming language. During the analysis, the cryptographic properties of the developed encryption algorithm were tested. The algorithm was tested for statistical security. For an experimental assessment, in order to ensure that the ciphertext is not inferior to a random sequence in its properties, the well-known sets of statistical tests by NIST (National Institute of Standards and Technology) and Donald Knuth were used. The property of the avalanche effect was also checked. The strength was evaluated using the methods of differential and linear cryptanalysis.

Differential Analysis of a Cryptographic Hashing Algorithm HBC-256

The article observes the new hashing algorithm HBC-256. The HBC-256 algorithm is based on the block cipher of the compression function CF (Compression Function) and produces a 256-bits hash value. Like any new cryptographic structure, the HBC-256 algorithm requires careful research process in order to confirm its cryptographic properties, namely: pre-image resistance and resistance to collisions of the first and second order. As a result of the research, for the HBC-256 hashing algorithm differential properties of nonlinear elements (S-boxes) and various options for constructing round characteristics are considered. A hypothesis has been advanced about the existence of paired differences, which will make it possible to construct round characteristics for hashing and for the function of round keys generating. It is shown that even for the most optimal way of constructing chains of differences, the probability of finding correct pairs of texts is less than the probability of a complete enumeration of one 128-bit block of input data, which makes the method of differential cryptanalysis unsuitable for finding collisions.

Differential cryptanalysis of WARP

WARP is an energy-efficient lightweight block cipher that is currently the smallest 128-bit block cipher in terms of hardware. It was proposed by Banik et al. in SAC 2020 as a lightweight replacement for AES-128 without changing the mode of operation. This paper proposes key-recovery attacks on WARP based on differential cryptanalysis in single and related-key settings. We searched for differential trails for up to 20 rounds of WARP, with the first 19 having optimal differential probabilities. We also found that the cipher has a strong differential effect, whereby 16 to 20-round differentials have substantially higher probabilities than their corresponding individual trails. A 23-round key-recovery attack was then realized using an 18-round differential distinguisher. Next, we formulated an automatic boomerang search using SMT that relies on the Feistel Boomerang Connectivity Table to identify valid switches. We designed the search as an add-on to the CryptoSMT tool, making it applicable to other Feistel-like ciphers such as TWINE and LBlock-s. For WARP, we found a 21-round boomerang distinguisher which was used in a 24-round rectangle attack. In the related-key setting, we describe a family of 2-round iterative differential trails, which we used in a practical related-key attack on the full 41-round WARP.

Cloud Based Secure File Sharing Using Access Control

In the current environment, data security is paramount, and any confidential files we must have with us everywhere we go raise the chance of losing such files. To prevent this inconvenient method of transporting private information, our suggested solution uses the cloud to store users' myriad of files of any size in encrypted form, encrypting them using the AES-256 version technique to ensure that your private data remains secret. The user no longer has to be concerned about security breaches when sharing his file with the intended recipient, since he may now provide permission to access his document to only the people he chooses, and it will only be accessible to him. With this approach, the saving and exchange of data is made possible. Our encryption algorithm uses the AES-256 version, in which all data is grouped into a string of bits and is subsequently converted into 128-bit blocks.

Impossible differential cryptanalysis of FBC-128

To promote the theory and application of cryptology, the design and implementation of cryptographic algorithms, in 2018, the Chinese Association for Cryptologic Research held the National Cryptographic Algorithm Design Competition. After the first round evaluation of security and implementation, FBC is selected one of the 10 block ciphers for the second round. FBC adopts 4-branch Extended Generalized Feistel Networks (EGFN) and it is designed with efficient implementation and good resistance against side-channel attacks. In this paper, we focus on the impossible differential attack, which is one of the most basic cryptanalytical methods, against FBC with 128-bit block size and key size (FBC-128). First, an equivalent expression with improved clarity of the round functions was derived. Then a structural property concerning the relationship among branches was explored. Combining those properties of its round function and structure, 9-round truncated impossible differentials were constructed for FBC-128, which is 2 rounds longer than previous works. Using this distinguisher, 13-round key recovery attack was mounted. The data and time complexity is 2126 chosen-plaintexts and 2122.96 encryptions respectively. To our knowledge, this is the best attack so far in terms of attacked rounds. Our attack exploited the properties of both structure and round function of FBC, and those observation and analysis would be beneficial to the understanding of FBC. Moreover, our results demonstrate when constructing impossible differentials, differentials with low hamming weight input and output difference may not always be optimal, which calls for more comprehensive analysis of the differential pattern.

A New Modified MARS Cryptosystem Based on Niho Exponent with an Enhanced S-Box Generation

As an essential cryptological element, symmetric-key block ciphers have long been utilized to offer information security. Even though they were created to provide data confidentiality, their adaptability grants them to be utilized in the creation of various cryptological techniques, including message authentication protocols, hash functions, and stream cryptograms. MARS is a symmetric shared-key block cryptosystem that supports 128-bit blocks and keys with sizes ranging from 128 to 448 bits. The cryptographic cores of MARS come in a variety of rounds, each constructed to take benefit of the robust outcomes in order to enhance security and performance over earlier ciphers. The MARS cipher is given a new function in this work that uses the operations ROT, XOR, NOP, INV, hash 512, Quotient, and MOD for improving the technique of the cipher. The goal of our modification is attaining a superior confusion level whilst retaining the MARS cryptosystem’s differential and linearity aspects.

Security Analysis and Encryption Time Comparison Description on Cryptography Advanced Encryption Standard (AES)

<p><em>AES is a cryptographic computation intended to work on 128bit, 192bit, and 256bit message blocks. The four main calculation procedures consist of a process (ShiftRows) and three substitution processes (SubBytes, MixColumns, and AddRoundKey). The AES encryption procedure is intended to perform encryption confidentially with a non-linear level of security with time complexity as effectively as possible, using a light change procedure in its implementation. On the other hand, the inverse of this procedure has low effectiveness, so the AES description procedure is slow. By examining the calculations, it was found that AES has complexity in the O(n) level for both encryption and decryption procedures. From a security check, AES has a very high level of security. From the speed correlation test results, it can be concluded that AES has a high level of effectiveness. Meanwhile, through testing encryption versus description, it can be understood that from timeliness, encryption is not equivalent to description, with the effectiveness of description being quite low.</em></p>

DSIT: A Dynamic Lightweight Cryptography Algorithm for Securing Image in IoT Communication

One of the most significant challenges appears to be securing the Internet of Things (IoT) communication network. As a corollary, information security has become the basis for establishing trustworthiness in IoT network communication. Cryptography is one of the ways for securing information in this case. However, the majority of current approaches are static, making them subject to security threats. As a consequence, a new concept, dynamic encryption, is growing rapidly in IoT communication. In this paper, a dynamic encryption algorithm (DSIT) has been proposed to secure IoT communication. This algorithm is based on Feistel and Substitution–Permutation Network. DSIT is a block cipher that takes the 64-bit block of plaintext, 64-bit secret key, and a secret dynamic box (D-box) as input. It produces a 64-bit ciphertext by performing eight rounds of the DSIT algorithm. For each round, the key and D-box are updated. This dynamic effect provides high security to a dynamic IoT network. The proposed algorithm has been executed in IoT environment using Raspberry Pi 3 Model B[Formula: see text] and 50% average Avalanche effect has been achieved. The proposed algorithm efficiently encrypts the image data to secure the communication and high resistant to cryptanalysis attacks.

128-Bit LEA Block Encryption Architecture to Improve the Security of IoT Systems with Limited Resources and Area

The LEA block encryption algorithm is an architecture suitable for IoT systems with limited resources and space. It was developed by the National Security Technology Research Institute in 2013 and established as an international standard for cryptography by the International Electrotechnical Commission in 2019, drawing much attention from developers. In this paper, the 128-bit LEA block encryption algorithm was light weighted and implemented in a hardware environment. All modules share and reuse registers and are designed and implemented in a bottom area through the resource sharing function. As a result of synthesis using Xilinx ISE 14.7 Virtex-5 as a design environment, the maximum frequency achieved 190.88 MHz and has a processing speed of up to 128 Mbps. Compared to the previously designed architecture, we present a bottom-level hardware design with a 128-bit LEA algorithm implemented with a 49.8% reduction in Flip-Flop, 18.8% reduction in LUTs, and 67.6% reduction in Slices.

Integral Cryptanalysis of WARP based on Monomial Prediction

WARP is a 128-bit block cipher published by Banik et al. at SAC 2020 as a lightweight alternative to AES. It is based on a generalized Feistel network and achieves the smallest area footprint among 128-bit block ciphers in many settings. Previous analysis results include integral key-recovery attacks on 21 out of 41 rounds. In this paper, we propose integral key-recovery attacks on up to 32 rounds by improving both the integral distinguisher and the key-recovery approach substantially. For the distinguisher, we show how to model the monomial prediction technique proposed by Hu et al. at ASIACRYPT 2020 as a SAT problem and thus create a bit-oriented model of WARP taking the key schedule into account. Together with two additional observations on the properties of WARP’s construction, we extend the best previous distinguisher by 2 rounds (as a classical integral distinguisher) or 4 rounds (for a generalized integral distinguisher). For the key recovery, we create a graph-based model of the round function and demonstrate how to manipulate the graph to obtain a cipher representation amenable to FFT-based key recovery.

A Lightweight FPGA Compatible Weak-PUF Primitive Based on XOR Gates

In this brief we introduce a novel lightweight FPGA compatible Physical Unclonable Function (PUF) primitive based on XOR gates. The proposed XOR-PUF is the most compact FPGA-compatible PUF ever presented in the literature, allowing the implementation of four PUF bits in a single Configurable Logic Block (CLB) and providing very good statistical performance. The architecture of the proposed PUF exploits two cross-coupled XOR gates which can be configured to behave as ring oscillators or SRAM cells. A 128-bit weak-PUF block based on the proposed XOR-PUF basic cell has been implemented on Xilinx Spartan-6 and Artix-7 devices and an extensive measurement campaign on 16 FPGA devices for each family has been carried out. Measurement results have shown that the proposed architecture and implementation are able to fit in just 64 Slices (32 CLBs) on both the Spartan-6 and Artix-7 devices without sacrificing statistical performance and guaranteeing a good robustness against supply voltage variations.

Lightweight ANU-II block cipher on field programmable gate array

Nowadays the number of embedded devices communicating over a network is increasing. Thus, the need for security appeared. Considering various constraints for the limited resources devices is very important. These constraints include power, memory, area and latency. A perfect environment for satisfying requirements of security in limited resources devices is lightweight cryptography. A recent lightweight algorithm that has a low area and high throughput which is the ANU-II block cipher. Many technologies like the internet of things (IoT) needed lightweight hardware architectures to provide security for it. In IoT issues like the size of memory, power consumption and smaller gate counts need to take care of by using lightweight cryptography. This paper presents hardware lightweight data path implementation for the ANU-II algorithm using field programmable gate array (FPGA). This paper presents a hardware implementation of a 64-bit ANU-II block cipher. Also, this research presents comparisons based on various design metrics among our data path for the ANU-II cipher and other existing data path designs. The result of the proposed design shows a high throughput of 1502.31, 1951.86, and 2696.47 Mbps. Also, it shows the high efficiency of 7.0201, 31.9977, and 10.6579 Mbps/slice as compared to other ciphers in this paper.

New differential cryptanalysis results for the lightweight block cipher BORON

BORON is a 64-bit lightweight block cipher based on the substitution–permutation network that supports an 80-bit (BORON-80) and 128-bit (BORON-128) secret key. In this paper, we revisit the use of differential cryptanalysis on BORON in the single-key model. Using an SAT/SMT approach, we look for differentials that consist of multiple differential characteristics with the same input and output differences. Each characteristic that conforms to a given differential improves its overall probability. We also implemented the same search using Matsui’s algorithm for verification and performance comparison purposes. We identified high-probability differentials which were then used in key recovery attacks against BORON-80/128. We used 8-round differentials with a probability of 2−58.16 and 2−62.42 in key recovery attacks against 9 and 10 rounds of BORON-80 and BORON-128 with time/data/memory complexities of 259.18/259.16/224 and 2111.34/263.42/271 respectively. Our key recovery framework provides a more accurate estimate of the attack complexity as compared to previous work. The attacks proposed in this paper are the best differential attacks against BORON-80/128 in the single-key model to date.

The Implementation Of Discrete Cosine Transform (DCT) And Blowfish Methods In Digital Video Security

Collecting data partially or completely illegally without the permission of the owner causes losses to the copyright owner. This has a big impact in proving ownership of a digital media. To be able to prove ownership of the copyright, the Discrete Cosine Transform watermarking technique can be used by inserting the Blowfish cryptographic algorithm. Discrete Cosine Transform (DCT) is a method that converts digital data into the form of a frequency domain. The method used in the DCT transformation technique is to break the digital image into small blocks with a fixed size and then convert it from the spatial domain to the frequency domain. Blowfish works by dividing the message into 64-bit blocks of equal length with varying aty lengths that encrypt the data in 8 byte blocks. Messages that are not multiples of 8 bytes will be added extra bits (padding), so that the size for each block is the same. After the final result is obtained, the value is inserted into the digital video without destroying the original digital video. From the research that has been done in the implementation of digital video watermarking, it can be concluded that the Blowfish cryptography method and the Discrete Cosine Transform (DCT) watermarking cryptography method can be applied properly. In the watermarking process, digital image insertion does not damage the watermaratd video and at the security level it is provided with blowfish cryptographic encryption, so that it can increase security in copyright protection