3C-SiC Layers Research Articles

Evaluation of Mechanical and Optical Properties of Hetero-Epitaxial Single Crystal 3C-SiC Squared-Membrane

The aim of this work is to develop the bulge test technique combined with the micro-Raman analysis and a refined load-deflection model for high quality 3C-SiC squared-membranes. By the minimization of the total elastic energy, starting from the isotropic relation between the stress tensor and the strain tensor, it is possible to calculate the relationship between the maximum deflection and the applied pressure, in both regime of small and large deflection. Furthermore, the relationship between the measured shift of Raman Transverse Optical (TO) phonon modes and the total residual strain (Δa/a) within the epitaxial 3C-SiC layer was found and in order to understand the stress distribution within the membrane, TO Raman shift maps were performed along the corner and the border of the membrane.

Heteroepitaxial CVD Growth of 3C-SiC on Diamond Substrate

This work presents the successful CVD heteroepitaxial growth of 3C-SiC on diamond (100) substrates. When performing a direct SiC growth at 1500°C on such substrate, it leads to polycrystalline deposit. The use of a substrate pretreatment involving silicon deposition allows forming a more continuous and smoother layer. Electron BackScatter Diffraction and Transmission Electron Microscopy all revealed that the 3C-SiC layer grown on the (100) diamond substrate is monocrystalline and well oriented.

Properties of GaN grown on Si(111) substrates dependent on the thickness of 3C-SiC intermediate layers

Crack-free GaN epilayers were grown with the mask less epitaxial lateral overgrowth (ELO) on Si substrates with various thicknesses of 3C-SiC intermediate layers. The defects in 3C-SiC and GaN layers were studied to reveal the impact of 3C-SiC intermediate layer on GaN epitaxy. In the 3C-SiC layer, a gradient density of stacking faults (SFs) was observed along the growth direction. Most of the SFs locate in the first 500-nm-thick 3C-SiC layer. Thanks to the maskless ELO method, the defects in under layer could not extend into GaN layer, even grown on a 100-nm-thick 3C-SiC layer with high density. The threading dislocation density in GaN varies in the range of ∼(1 ± 0.3) × 109 cm−2. Investigation of GaN nucleation indicated a correlation between GaN quality and surface roughness of 3C-SiC layers. Meanwhile, the surface morphology of 3C-SiC is affected by double positioning domains, which revealed as a result of strain relaxation process during growth on Si substrate.

Ge Mediated Surface Preparation for Twin Free 3C-SiC Nucleation and Growth on Low Off-Axis 4H-SiC Substrate

In this work, we report on the effect of adding GeH4 during 3C-SiC heteroepitaxial growth on low off-axis 4H-SiC substrate using chemical vapor deposition technique. When added together with SiH4 and C3H8, GeH4 does not significantly modify the 3C layer quality which contains a high density of twin boundaries. But when it is introduced before the growth, i.e. during a surface pretreatment step at 1500°C, a remarkable change in the layer morphology is seen. Furthermore for optimal GeH4 flux, twin boundaries are completely eliminated. Investigation of the results obtained when varying growth parameters (temperature, C/Si ratio, gas composition during the surface preparation) allowed proposing a mechanism leading to twin boundary elimination. It involves a transient homoepitaxial growth step followed by 3C nucleation when large terraces are formed by step faceting. Preliminary electrical characterizations of the twin free 3C-SiC layers, using conductive atomic force microscopy (c-AFM), are given.

Double-Position-Boundaries Free 3C-SiC Epitaxial Layers Grown on On-Axis 4H-SiC

High quality double-position-boundaries free 3C-SiC epilayers have been successfully grown on on-axis (0001) 4H-SiC by chemical vapor deposition at optimized conditions as observed with optical microscopy and X-ray diffraction. The effect of the growth parameters, including temperature, C/Si ratio, ramp-up condition, Si/H2 ratio, N2 addition and pressure, on the quality of the grown layers is investigated. Different techniques, including microscopic and spectroscopic techniques, are used to characterize the epilayers. High resolution X-ray diffraction shows 2θ-ω curve with full width at half maximum of only 16 arcsec for the (111) reflection detected from a 35 μm thick 3C-SiC layer, showing the good structural quality of the layer. Reciprocal space maps confirm the absence of double-position-boundaries in a large depth of the layers. Low temperature photoluminescence measurement shows clear near-bandgap emission with sharp and single peaks, which further verifies the high quality of the epilayers.

The influence of pressure on growth of 3C-SiC heteroepitaxial layers on silicon substrates

3C-SiC epitaxial layers were grown on on-axis (100)- and (110)-oriented silicon substrates in a RF heated horizontal hot-wall CVD reactor. We focused on the relationship between the pressure used during carbonization growth and the crystalline quality of obtained layers. A comprehensive analysis of the surface morphology of the 3C-SiC carbonization layer was performed, after which two pressure values guaranteeing top crystalline quality were determined. The carbonization layer with the lowest surface roughness was obtained at around 20mbar, while for 30mbar, the surface roughness was slightly worse but more homogenous. To sum up, we successfully grew 1.5µm thick 3C-SiC layers on silicon substrates with both orientations using the said pressure conditions.

Carrier dynamics and photoelectrical parameters in highly compensated sublimation grown 3C-SiC layers studied by time-resolved nonlinear optical techniques

Excess carrier dynamics in compensated n-type and p-type 3C-SiC layers grown by sublimation epitaxy and doped with nitrogen and aluminum has been studied using time-resolved optical pump-probe techniques. We show that carrier recombination pathway in both layers is strongly affected by the optical recharge of compensating aluminum impurities (Al−) through trapping of holes and their thermal release, providing recovery to the initial state within 0.1 ms to 10 ns in the 80–300 K range. The dynamics of aluminum charge states and hole density were also analysed using numerical modelling, which provided a hole capture cross-section for aluminum sh(Al) = (1.0 ± 0.3)×10−15 cm−2 and its activation energy Ea(Al) = (176 ± 4) meV in both layers. Free carrier lifetimes of 0.5 and 2 ns (for the p- and n-type layer, respectively) were measured at the injected carrier densities (ΔN0) well above that of Al. We also observed a strong impact of the compensating Al impurities on carrier diffusivity at room temperature, which dropped to negligible values of D < 0.1 cm2 s−1 at injection levels below the aluminum trap density (ΔN0 < [Al−]eq) and reached its typical value of D = 2 cm2 s−1 only at ΔN0 ≥ 1019 cm−3.

Investigation of the transition layer in 3C-SiC/6H-SiC heterostructures

Transmission electron microscopy and the cathodoluminescence method are used to study the transition region in 3C-SiC/6H-SiC heterostructures. It is shown that this region is, as a rule, constituted by alternating 3C-SiC and 6H-SiC layers with the possible inclusion of other silicon carbide polytypes. An assumption is made that this structure of the transition region can be explained in terms of the model of spinodal decomposition.

Comparative study of 3C-SiC layers sublimation-grown on a 6H-SiC substrate

n-3C-SiC/n-6H-SiC heterostructures grown by vacuum sublimation on CREE commercial 6H-SiC substrates are studied. Transmission electron microscopy (TEM) demonstrated that a transitional layer of varying thickness, composed of a mixture of 3C- and 6H-SiC polytypes, is formed on the substrate. A 3C polytype layer was obtained on the interlayer. Cathodoluminescence study of the surface of the film demonstrated that defects in the form of inclusions of another phase (6H-polytype), stacking faults, and twin boundaries (separating domains of cubic modification, grown in various orientations) are found on the surface and in the surface layer with a thickness on the order of 100 μm. Varying the growth conditions changes the concentration of various types of defects.

Investigation of stacking faults in 4H-SiC using the electron-beam-induced current method

Stacking faults in 4H-SiC crystals introduced upon plastic deformation at 550°C are studied using the electron-beam-induced current (EBIC) method. The types of stacking faults are determined by measuring the cathodoluminescence spectra. The stacking faults are shown to give a bright contrast in the EBIC mode. The nature of such contrast is discussed. The possibility of increasing the efficiency of semiconductor detectors based on structures with stacking faults equivalent to thin 3C-SiC layers is demonstrated.

Structural Characterization of 3C-SiC Grown Using Methyltrichlorosilane

3C-SiC layers were grown on Si substrates using standard precursors (SiH4 and C3H8) and by adding methyl trichloro silane (MTS) to the gas phase, with growth temperatures between 1200 and 1300 °C. Characterization of the 3C-SiC layers shows that 3C-SiC grown with MTS has higher polycrystalline and amorphous content as well as lower residual stress.

Elaboration of Core Si/Shell SiC Nanowires

Silicon nanowires obtained by a top-down approach have been carburized at high temperature and atmospheric pressure with two different gaseous precursors: CH4 and C3H8. These processes reveal core silicon / shell 3C-SiC nanowires. After being characterized by SEM, FIB-SEM and TEM microscopies, the 3C-SiC layer has been used as seed layer for the growth of epitaxial 3C-SiC on the nanowires. Preferential growth of 3C-SiC on the sidewalls of nanowires has been observed. Thanks to the biocompatibility of SiC compared to Si, this layer could act as a protective shell for biosensors based on Si nanowires transistor.

Innovative 3C-SiC on SiC via Direct Wafer Bonding

In this paper, we report on a novel direct wafer bonding technique; Si (111) wafers to polycrystalline silicon carbide carrier wafers. The purpose of this work is to provide a platform for 3C-SiC epitaxial growth above the wafer bonded Si (111) wafers. We have demonstrated reduced wafer bow, confirmed by optical microscopy together with a digital camera. 3C-SiC epitaxial layers have been grown by conventional chemical vapor deposition techniques above Si/SiC structures. All of these 3C-SiC epitaxial layers are highly crystalline in nature. In the future, the realization of thick, bow-free 3C-SiC layers suitable for power device fabrication is achievable.

Polytype Inclusions in Cubic Silicon Carbide

The 3C-SiC layers on nominally on-axis 6H-SiC substrates were grown using sublimation epitaxy. More than 90% coverage by 3C-SiC is typically achieved at growth temperature of 1775°C. The main reason for the polytype inclusions to appear is local supersaturation non-uniformities over the sample surface which appear due to the temperature gradient and spiral growth nature of 6H-SiC. On the 6H-SiC spirals with small steps supersaturation is smaller and 3C-SiC nucleation and growth is diminished. Due to surface free energy and surface diffusion differences, polytype inclusions appear differently when 3C-SiC is grown on the Si- and C-faces. The 6H-SiC inclusions as well as twin boundaries act as neutral scattering centers and lower charge carrier mobility.

Surface acoustic wave devices on AlN/3C–SiC/Si multilayer structures

Surface acoustic wave (SAW) propagation characteristics in a multilayer structure including a piezoelectric aluminum nitride (AlN) thin film and an epitaxial cubic silicon carbide (3C–SiC) layer on a silicon (Si) substrate are investigated by theoretical calculation in this work. Alternating current (ac) reactive magnetron sputtering was used to deposit highly c-axis-oriented AlN thin films, showing the full width at half maximum (FWHM) of the rocking curve of 1.36° on epitaxial 3C–SiC layers on Si substrates. In addition, conventional two-port SAW devices were fabricated on the AlN/3C–SiC/Si multilayer structure and SAW propagation properties in the multilayer structure were experimentally investigated. The surface wave in the AlN/3C–SiC/Si multilayer structure exhibits a phase velocity of 5528 m s−1 and an electromechanical coupling coefficient of 0.42%. The results demonstrate the potential of AlN thin films grown on epitaxial 3C–SiC layers to create layered SAW devices with higher phase velocities and larger electromechanical coupling coefficients than SAW devices on an AlN/Si multilayer structure. Moreover, the FWHM values of rocking curves of the AlN thin film and 3C–SiC layer remained constant after annealing for 500 h at 540 °C in air atmosphere. Accordingly, the layered SAW devices based on AlN thin films and 3C–SiC layers are applicable to timing and sensing applications in harsh environments.

Bow Free 4'' Diameter 3C-SiC Epilayers Formed upon Wafer-Bonded Si/SiC Substrates

The physical and electrical properties of 4-inch 3C-SiC epitaxial layers, deposited on Si (111) wafers, which were wafer bonded to polycrystalline silicon carbide carrier wafers, are presented. We show that this novel Si/SiC wafer bonding process leads to reduced wafer bow, confirmed by imaging, in the form of optical microscopy (×100 objective lens) together with a digital camera. All 3C-SiC layers grown above Si/SiC structures by conventional chemical vapor deposition techniques are shown to be single crystal in nature. 3C-SiC metal oxide semiconductor capacitors have been fabricated via thermal oxidation at 1100°C in pure oxygen for 90 minutes, with a density of interface states measured at ∼2 × 1011 cm−2 eV−1 at 0.2 eV beneath the conduction band edge. These structures have the potential to realize thick, bow-free 3C-SiC layers suitable for power device fabrication.

Al2O3/3C-SiC/n-Si Nonvolatile Resistance Memory

We propose a new nonvolatile resistance memory device having a metal/Al2O3/3C-SiC/n-Si/metal metal–insulator–semiconductor (MIS) structure. The on/off behavior of the resistance change memory is suggested to be explained by electron trapping and detrapping through the Al2O3 layer in the defect states generated in the Al2O3/3C-SiC interface region of the 3C-SiC layer. Compared to our previously reported metal/SiOx/3C-SiC/n-Si/metal MIS memory device, where electron trapping and detrapping are caused through the 3C-SiC layer, the device exhibits higher switching endurance characteristics.

Investigation of 3C-SiC growth on Si(111) by vapor–liquid–solid transport using a SiGe liquid phase

The crystal growth of 3C-SiC onto silicon substrate by Vapor–Liquid–Solid (VLS) transport, where a SiGe liquid phase is fed with propane, has been investigated. Three sample configurations were used. In a preliminary approach, the VLS growth of SiC was conducted directly onto Si substrate using a Ge film as liquid catalyst. It led to the growth of a thick continuous SiC polycrystalline layer which was floating over a SiGe alloy located between the silicon substrate and the topping SiC layer. In the second configuration, a thin seeding layer of 3C-SiC grown by chemical vapor deposition (CVD) was used and the VLS growth was localized using a SiO2 mask. The liquid phase was a CVD deposited SiGe alloy. The growth of a few hundred nanometers thick 3C-SiC epitaxial layer was demonstrated but the process was apparently affected by the presence of the oxide which was dramatically etched at the end. In the last configuration, the silicon substrate was patterned down to 10μm and a thin seeding layer of 3C-SiC was grown by CVD onto this patterned substrate. The liquid phase was again a CVD deposited SiGe alloy. In this last configuration, the presence of epitaxial SiC was evidenced but it grew as trapezoidal islands instead of an uniform layer.

Micromechanical Resonators: AlN/3C–SiC Composite Plate Enabling High‐Frequency and High‐Q Micromechanical Resonators (Adv. Mater. 20/2012)

An AlN/3C–SiC composite is used to realize high-frequency and high-Q acoustic wave resonators by exploiting the third-order quasi-symmetric (QS3) Lamb wavemode, as described by C.-M. Lin, Y.-Y. Chen, and co-workers on page 2722. The epitaxial 3C–SiC layer enhances the electromechanical coupling of the QS3 mode and boosts the Q due to the intrinsic low acoustic loss of SiC crystals. This AlN/3C–SiC composite plate structure enables production of high-performance micromechanical acoustic wave resonators for frequency control and sensing applications.

On Stabilization of 3C-SiC Using Low Off-Axis 6H-SiC Substrates

Heteroepitaxial growth of 3C-SiC on 0.8 and 1.2 degree off-oriented 6H-SiC substrates was studied using a sublimation growth process. The 3C-SiC layers were grown at high growth rates with layer thickness up to 300 µm. The formation and the quality of 3C-SiC are influenced by the off-orientation of the substrate, the growth temperature (studied temperature range from 1750 °C to 1850°C), and the growth ambient (vacuum at 5*10-5 mbar and nitrogen at 5*10-1 mbar). The largest domains of 3C-SiC and the lowest number of double positioning boundaries were grown using nitrogen ambient and the highest growth temperature. The combined use of low off-axis substrate and high growth rate is a potential method to obtain material with bulk properties.