Wafer level LED packaging with optimal light output and thermal dissipation for high-brightness lighting

Abstract

Market size of high-brightness LED lighting has been rapidly growing upon the continual improvement of quantum efficiency and light extraction. However some key breakthroughs must be made before this technology can be fully adopted into the broad market, such as efficient thermal dissipation and low manufacturing cost. A major portion of cost of an LED module falls in the packaging processes after the emissive device stack has been fabricated. Also given the thin thickness of device stack, the packaging structure holds the bottleneck for thermal dissipation. We address these two key challenges with a novel wafer-level packaging structure integrated into the device stack, which enables maximal thermal dissipation rate from active device stack to substrate while allowing high aperture ratio and optimal light output. Our approach applies full wafer-level batch process from epitaxial growth all the way down to packaging for light extraction and wavelength conversion, in order to achieve high throughput and high yield at low cost. Initial prototypes of GaN based blue LED with big chip size have been fabricated without selective electrodes for minimized contact resistance, exhibiting high brightness at relatively low drive voltage (3.5V). As one key step in wafer level packaging, the wafer bonding process was characterized with Moiré patterning to understand the temperature-dependent warpage profile, with simulation performed in guidance to final solution for compensating the warpage profile along the bonding process and afterwards. Different approaches were applied in learning the most effective bonding technique for this packaging structure. Further development is ongoing to improve the overall power efficiency and color quality, including optimal materials for ohmic contacts at both electrodes, large-area light extraction structure, and integrated phosphor material. This wafer-level packaging technology is scalable to large wafer size for achieving superior thermal and optical performance at high-throughput and low cost.