Abstract

Wafer level packaging (WLP) has been growing continuously in electronics packaging due to its low cost in batch manufacturing and the potential of enabling wafer test and burn-in. A variety of wafer level packages have been devised, among which four important categories are identified including thin film redistribution and bumping, encapsulated package, compliant interconnect, and wafer level underfill. This chapter reviews the different WLP technologies with an emphasis on challenges and processes of the wafer level underfill. The wafer level packaging integrated with wafer burn-in, test and module assembly shows great attraction due to the dramatic cost reduction. Cost effective ways of building wafer level test and burn-in are under investigation.

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