Abstract

Wafer level molding is an important process step in the chip on wafer approach and seems currently required in stacking first process flow. Thermo-mechanical properties of molding material has to be controlled to limit stress induce by CTE mismatch with silicon wafer and also to assure planarization and protection functions. 2D and 3D finite element simulations have been performed to evaluate strain and stress impact at wafer level of material properties of silicone based and epoxy based molding compounds. Impacts of Si interposer thickness, design and chips arrangement on wafer warpage are presented and compared with experimental results.

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