Vertically Integrated Reconfigurable Nanowire Arrays

Abstract

This letter discusses a feasible variant of vertically integrated reconfigurable field effect transistors (RFET) based on top–down nanowires. The structures were studied by 3-D device simulations. Subdividing the structure into two vertical pillars allows a lean technological realization as well as simple access to the electrodes. In addition of enabling p- and n-FET operations like a horizontal RFET, the device delivers higher performance. We show that by the integration of additional vertical pillars and select gates, a higher device functionality and flexibility in interconnection are provided.