Vertical Silicon Nanowire Gate-All-Around Field Effect Transistor Based Nanoscale CMOS

Satish Maheshwaram,S K Manhas,Bulusu Anand,Gaurav Kaushal,Navab Singh

doi:10.1109/led.2011.2157076

Vertical Silicon Nanowire Gate-All-Around Field Effect Transistor Based Nanoscale CMOS

Satish Maheshwaram, S K Manhas + Show 3 more

https://doi.org/10.1109/led.2011.2157076

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Journal: IEEE Electron Device Letters	Publication Date: Aug 1, 2011
Citations: 50

Affiliation: Indian Institute of Technology Roorkee, Institute of Microelectronics, Agency for Science, Technology and Research

#Fin-shaped Field Effect Transistor #Complementary Metal-oxide-semiconductor + Show 8 more

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Abstract

In this letter, we investigate a novel vertical silicon nanowire-based (NW) complementary metal-oxide-semiconductor (CMOS) technology for logic applications. The performance and the behavior of two- and single-wire CMOS inverters are simulated and analyzed. We show that vertical NW based CMOS offers a reduction of up to 50% in layout area, along with delay reductions of 50% (two wire) and 30% (single wire) compared with fin-shaped field effect transistor (FinFET) technology. The results show that vertical NW CMOS technology has a very high potential for ultralow-power applications with a power saving of up to 75% and offers an excellent overall performance for deca-nanoscale CMOS.

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