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Abstract
The previous thin film transistor studies involved planar process that means channel parallel to the substrate surface. Another way passes by a modification of the spatial geometry, more especially by the creation of vertical channels. This allows an increase of the equivalent current density flowing in the circuit thanks to two major modifications, the channel length that can be much shorter and the channel width that can be much higher, for the same design rules and for the same substrate area. The approach is thus similar to the recent evolution of the monolithic silicon technology. After the presentation of the interest of such vertical channel ways on both ULSI and thin film technologies, results on vertical TFTs are presented and discussed. We finally give comments on the common approaches between nano- and giga-electronics involving three dimensional geometry, in order to show that their basic scientific principles are roughly the same.
Published Version
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