Vertical Oxide Thin-Film Transistor with Solution-Processed Channel Define Layer

Abstract

High performance thin-film transistor (TFT) is essential for the next-generation display. Especially, scale-downed TFT becomes very important to develop high resolution display. The vertical-channel TFTs (V-TFTs) attracts lots of interests from the view point of minimizing pixel size because V-TFTs have very small footprint compared to the lateral TFT. V-TFTs provide the smallest pixel size without the limitation of channel length. [1] In addition, V-TFTs could show high strain stress stability due to the small channel size formed vertically when they are adapted in flexible display. Channel length of V-TFTs is controlled by the thickness of spacer placed between source and drain. Since the main purpose of adoption of V-TFTs is to increase the current driving ability, typical channel length of V-TFT is shorter than 1 um (~0.5 um). The length of channel in vertical TFT, however, should be adjustable according to the TFT applications. The major method to deposit spacer which determine the channel length (channel define layer) is vacuum process such as plasma-enhanced chemical vapor deposition (PECVD). Such vacuum process could provide high film performance, quality and good uniformity. Nonetheless, vacuum process has disadvantage in the deposition of spacer with thick thickness because of very long process time. In contrast, solution-process coating is easy and fast method. By controlling coating speed and time, solution process provides thick films uniformly. Furthermore, solution process can be applied using both of organic and inorganic materials. While inorganic materials result in films with low defects, the space processed with organic materials yields low stress, making this suitable for the flexible vertical TFTs. In this study, we fabricate vertical TFT with spacers deposited with various materials such as organic and inorganic by solution-process coating. We also investigate back-channel effect and TFT strain stress depending on the kinds of spacer materials. We select three different types of materials for the spacer; SiO2, PI, carbon based organic material. Solution-processed SiO2 film have dielectric constant of 4.27 and similar film quality with PECVD SiO2. The solution-processed films show very low leakage current of 1.35x10-9A/cm-2at 0.1MV/cm. Carbon based organic material also has low dielectric constant and is approximately 1um~3um thick. We studied the effect of back-channel according to various spacer materials. Instead of V-TFTs, top gate staggered TFTs were fabricated to mimic the structure of V-TFT because both TFTs have same process sequence. Figure 1(a) shows the schematic structure of top-gate TFT. The various buffer layers corresponding to the spacer in V-TFT were deposited by solution processes. The TFT with solution-processed film did not show degradation of electrical characteristics in comparison to that with PECVD SiO2. After confirming the feasibility of solution-processed spacer for the vertical TFT, three types of solution-processed layer are applied to actual vertical TFT as a spacer. The patterned source ITO electrode was coated with solution processed spacer, followed by the deposition of drain electrode. Drain and spacer were patterned with spacer mask. In sequence, active, gate insulator and gate are deposited and patterned at once. We will report the performance of V-TFTs with solution processed spacer in terms of mobility, stability, and thermal stability. Figure 1. (a) Schematic diagram of top-gate TFT, (b) Schematic structure of vertical TFT with solution processed spacer Acknowledgements This work was supported by 'The Cross-Ministry Giga KOREA Project' grant from the Ministry of Science, ICT and Future Planning, Korea [GK15D0100].