Abstract
As CMOS devices become smaller, the process variations (PVs) and aging variations (AVs) become major issues for circuit reliability and yield. In this paper, we analyze the effects of PVs on aging effects such as hot carrier injection (HCI) and negative bias temperature instability (NBTI). Using Monte Carlo-based transistor-level simulations including principal component analysis, the correlations between PVs and AVs are considered, by which the accuracy of analysis is improved (1.2% for standard deviation and 1.7% for Vth99%) compared to other methods that ignore the correlations, especially in the smaller technology. In addition, we perform regression analysis with various models to improve the efficiency of variation-aware aging analysis. All models show an error rate about 1% for NBTI, and quadratic and custom models show an error rate of about 10% on average for HCI.
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