Abstract

Thermal sensors (TS) are essential for achieving optimized performance and reliability in the era of nanoscale microprocessor and system on chip (SoC). Compiling with the low-power and small die area of the mobile computing, the presented TS supports a wide range of sampling frequencies with an optimized power envelope. The TS supports up to 45 K samples/s, low average power consumption, as low as 20 μW, and small core Si area of 0.013 mm2. Advanced circuit techniques are used in order to overcome process variability, ensuring inaccuracy lower than ±2 °C without any calibration. All this makes the presented thermal sensor a cost-effective, low-power solution for 22 nm nanoscale digital process technology.

Highlights

  • Integrated thermal sensor (TS) circuits have become key elements in high performance systems, especially in processors and system on chip (SoC)

  • In addition to the TS analog core circuit of 0.013 mm2, there are other pieces of collateral, including: (1) a thermal diode used in the calibration process; (2) a logic core required for digital DSP, filtering and processing the SD-Analog to Digital Converter (ADC) output; (3) two analog ports for Si testing that are connected directly to critical points in the circuit or through analog to frequency converters (A2F); (4) clamps and decoupling capacitors; and (5) Jtag interface for independent accessibility

  • The suggested SD-ADC based thermal sensor was implemented in a 22 nm process and was verified in two generations of test chips on typical and skew material

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Summary

Introduction

Integrated thermal sensor (TS) circuits have become key elements in high performance systems, especially in processors and system on chip (SoC). 2014, 4 precision thermal sensor (typically ±3 °C in a wide temperature range), in order to achieve high reliability and performance [1,2]. Better linearity is achieved using the Analog to Digital Converter (ADC) based thermal sensor [3,4]. ADC-based architecture has very good linearity over a wide range of temperatures The accuracy of this architecture can be improved by using a calibration process during production. There are a few errors which require compensation during calibration if an improved accuracy is required The sources of these errors are process variations of diode parameters, such as the ideality factor, variation of the conversion factor of the ADC dominated by capacitor mismatch, and Bandgap reference voltage variation in Vref mode only. The High Volume Manufacture (HVM) calibration result is stored in on-die fuses for use by the thermal sensor

The Sense Stage
The Sigma-Delta Modulator
The TS Top Hierarchy and Layout
Results
Summary
Full Text
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