Abstract
This paper reviews and compares the thermal and noise characterization of CMOS (complementary metal-oxide-semiconductor) SOI (Silicon on insulator) transistors and lateral diodes used as temperature and thermal sensors. DC analysis of the measured sensors and the experimental results in a broad (300 K up to 550 K) temperature range are presented. It is shown that both sensors require small chip area, have low power consumption, and exhibit linearity and high sensitivity over the entire temperature range. However, the diode’s sensitivity to temperature variations in CMOS-SOI technology is highly dependent on the diode’s perimeter; hence, a careful calibration for each fabrication process is needed. In contrast, the short thermal time constant of the electrons in the transistor’s channel enables measuring the instantaneous heating of the channel and to determine the local true temperature of the transistor. This allows accurate “on-line” temperature sensing while no additional calibration is needed. In addition, the noise measurements indicate that the diode’s small area and perimeter causes a high 1/f noise in all measured bias currents. This is a severe drawback for the sensor accuracy when using the sensor as a thermal sensor; hence, CMOS-SOI transistors are a better choice for temperature sensing.
Highlights
IntroductionNanometric partially-depleted CMOS-SOI technology, is an established technology in a wide range of low-cost, low power and high temperature applications including sensors, high-performance
Nanometric partially-depleted CMOS-SOI technology, is an established technology in a wide range of low-cost, low power and high temperature applications including sensors, high-performanceRF, mobile, and mixed-signal chips [1,2,3,4,5,6,7,8]
In spite the enhanced performance of SOI (Silicon on Insulator) devices offered by the buried oxide (BOX) layer, this layer severely impedes heat conduction to the substrate due to the low thermal conductivity of silicon dioxide
Summary
Nanometric partially-depleted CMOS-SOI technology, is an established technology in a wide range of low-cost, low power and high temperature applications including sensors, high-performance. In order to implement effective thermal management, multiple temperature sensors should be placed in strategic chip areas. An ideal on-chip temperature sensor should be accurate, compatible with the target process, and have reasonable silicon area so that it can be placed non-invasively across the chip without drastically changing the chip design plan. This paper reviews the concepts, advantages and limitations of the leading temperature sensors and thermal sensors fabricated using nanometric CMOS-SOI technology. We compare these sensors in terms of sensitivity, linearity, accuracy, calibration needs, area, and the possibility to measure temperature during the chip operation (on-line) in the temperature range of 300–550 K. The specific dimensions, determined by W/L, were designed by the authors
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