Abstract
Monolayer MoS2, MoSe2, MoTe2, WS2, WSe2, and black phosphorous field effect transistors (FETs) operating in the low-voltage (LV) regime (0.3V) with geometries from the 2019 and 2028 nodes of the 2013 International Technology Roadmap for Semiconductors (ITRS) are benchmarked along with an ultra-thin-body Si FET. Current can increase or decrease with scaling, and the trend is strongly correlated with the effective mass. For LV operation at the 2028 node, an effective mass of ~0.4 m0, corresponding to that of WSe2, gives the maximum drive current. The short 6 nm gate length combined with LV operation is forgiving in its requirements for material quality and contact resistances. In this LV regime, device and circuit performance are competitive using currently measured values for mobilities and contact resistances for the monolayer two-dimensional materials.
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