Abstract
The threshold voltage hysteresis in SiC power MOSFETs is rarely studied. This paper investigates the captureand emission-time constants of positive and negative charge trapped in the gate oxide and at the interface as a function of gate bias. We present a measurement technique which enables time-resolved measurement of the real ${V} _{\text {th}}$ during application-relevant bipolar ac high temperature gate stress. In addition, we use capture and emission time maps to explain the temperature dependence of $\Delta {\text V}_{\text {th}}$ after stress and are able to simulate $\Delta {\text V}_{\text {th}}$ after positive ac stress considering the full stress-history. Furthermore, we will show that the threshold voltage hysteresis has no harmful impact on switching operation in real applications.
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