Underlap channel silicon-on-insulator quantum dot floating-gate MOSFET for low-power memory applications

Abstract

We propose herein the underlap channel silicon-on-insulator (SOI) quantum dot (QD) floating-gate (und-SOIQDFG) metal---oxide---semiconductor field-effect transistor (MOSFET). It is found that, although the reduced effective gate voltage due to the voltage drop across the underlap lengths reduces the on-state drive current ($$I_\mathrm{ON}$$ION), the increased effective channel length due to the underlap at the gate---source/drain reduces not only the short-channel effects, gate-induced drain leakage, and off-state leakage current ($$I_\mathrm{OFF}$$IOFF) but also the parasitic overlap capacitances of the proposed und-SOIQDFG device. Furthermore, in comparison with the conventional QD floating-gate (conv-QDFG) MOSFET, the capacitive coupling ratio and memory window of the proposed device are improved by $${\sim }5$$~5 and $${\sim }25$$~25 %, respectively. Furthermore, the $$I_\mathrm{ON}/I_\mathrm{OFF}$$ION/IOFF ratio for the proposed device is improved while the static power dissipation is significantly reduced compared with the conv-QDFG device. This clearly shows that use of the gate---source/drain underlap in the quantum dot floating-gate MOSFET not only eliminates potential weaknesses of the device but also makes it suitable for low-power nanoscale flash memory applications.