Ultra low-power low-voltage FGMOS based-configurable analog block for current-mode fractional-power functions

Abstract

In this paper, a novel ultra low-power low-voltage configurable analog block (CAB) for current-mode fractional-power functions is proposed. The proposed CAB architecture consists of capacitance matrixes and four FGMOS transistors that operate in weak inversion region. Since this CAB is both programmable and reconfigurable, thus is capable to implement the positive/negative and integer/fractional powers. As the unique property, it does not use approximation technique thus benefits from greatly reduced error advantage. To increase the power resolution of the proposed design, enough capacitors are used in capacitance matrixes. The proposed circuit has been simulated using HSPICE simulator in 0.18-µm (level-49) TSMC CMOS technology. Simulation results with 0.5-V supply voltage show the maximum power consumption and linearity error as 355–480 nW and 1.8%, respectively, while the RMS Error (RMSE) is 0.85%. Also post-layout simulation results are extracted that favorably show maximum linearity error and RMSE as 2.3% and 1.05%, respectively.